Reflector Design for Orthogonal Frequency (OFC) Coded Devices

D.C. Malocha, D. Puccio, and N. LoboSchool of Electrical Engineering & Computer Science

University of Central Florida

Orlando, Fl 32816-2450

Acknowledgements: Funding is provided through the NASA STTR grants with industry partners of MSA and ASRD, and through the NASA Graduate Student Research Program.

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Normalized Frequency

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nit

ude (

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ear)

Schematic of OFC SAW ID TagBackground: OFC Bit – 7chips/bit

Piezoelectric Substrate

f1 f4 f6 f0f2 f5 f3

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Normalized Time (Chip Lengths)

Chip length

Bit Length

Approach

• Study a methodology to optimize reflective structures for OFC devices– Minimize device insertion loss– Find optimum values for bit length, chip

length, and strip reflectivity as a function of device fractional bandwidth

– Maintain processing gain– Minimize ISI effects

Boundary Conditions for Analysis

• Assume only a single in-line grating analysis.

• Assumes no weighting within each reflective region which composes a chip.

• First order assumptions are made to understand the phenomenon and then verified by COM models and simulation.

• Multiple parallel tracks can be approached in a similar manner.

SAW OFC Reflector Coding

• Ideal OFC code using a SAW reflective structure assumes that the ideal chip can be accurately reproduced by a reflector– Chip frequency response: Sin(x)/x – Chip time response: – Uniform amplitude of chips for maximum coding,

processing gain (PG) and correlation output

)Rect(t/ chip

Intra-chip & Inter-chip Reflector Considerations

• Chip reflector uniformity

• Processing gain

• Coding diversity

• Orthogonality of chips

• Frequency & time domain distortion

• Intersymbol interference (ISI)

OFC Reflector Bank Uniformity

cNc* cf

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0OFC Reflector Responses

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constantc fc=chip frequency determined by orthogonality

As fc increases, Nc increases and chip reflectivity increases

Response of Reflector Test Structure

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Time (s)

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Direct SAW response

Reflector response

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Time (s)

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Direct SAW response

Reflector response

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Frequency ( MHz )

| R |

Measured responsePredicted-fit

Under proper conditions, a SAW reflector looks similar to a Sampling function in frequency and a Rect function in time. Reflectivity is a function of the substrate and reflector material, reflector film thickness, substrate coupling coefficient and line-to-width ratio. The reflector width is approximately the chip length. How approximate is it???

Simulation of a reflector grating frequency response for 1% reflectivity per strip, and 4 different grating lengths. Ng equals the number of reflective strips in each grating.

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0Ng=25, Ng*r=0.25Ng=50, Ng*r=0.5 Ng=100, Ng*r=1.0Ng=200, Ng*r=2.0

Normalized Frequency

Mag

nitu

de (

dB)

For Ng*r small, reflector response looks like sin(x)/x

Plot of magnitude of reflectivity versus the product of the number of strips and reflectivity per strip (Ng.r).

For small reflector loss, chip reflectivity, Ng.r,

should be large but for reasonable sin(x)/x frequency response, Ng.r product should definitely be less than 2.

OFC Adjacent Frequency Reflection

• OFC yields reduced reflections between reflectors compared to single frequency PN due to orthogonality

• Non-synchronous orthogonal frequencies are partially reflected

• The closer the adjacent frequency chips the greater the partial reflection

• Must understand non-synchronous reflectivity for all chips

Adjacent Frequency Reflection• Assume an RF burst near

fo as interrogation signal• Very small reflection of

incident adjacent frequency RF burst from weak reflector

• Large adjacent frequency reflection from strong reflector

• Transmission through the reflector bank can be compromised if chip reflectivity is too large which causes energy rolloff for trailing chips.

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Reflected Pulse ResponseReflector ResponseRF Burst Response

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Normalized Frequency

Reflected Pulse ResponseReflector ResponseRF Burst Response

Small Reflectivity

Large Reflectivity

Frequency Transmission vs Reflectivity as a Function of Frequency Offset

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rNg

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Low center frequencies

fref = f0 - 1-1

fref = f0 - 2-1

fref = f0 - 3-1

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High center frequencies

fref = f0 + 1-1

fref = f0 + 2-1

fref = f0 + 3-1

• COM simulations used to determine non-synchronous reflector transmission coefficient

• Analysis performed for reflector center frequencies 1,2,3 orthogonal frequencies higher and lower than incident wave

fSAW is the synchronous reflector of interest

is a prior asynchronous reflector in bank

nf

For 90% transmission, r*Ng<2

Adjacent Frequency Reflector Transmission Example

f3 f6 f4 f7 f1 f5 f2

SAW Substrate

Reflectors

f3f6 f4f7 f1f5 f2

1 02 23 04 15 26 07 1

Sum 6

Interrogation Frequency

Adjacent Frequency Interactions

Independent of the OFC frequency code sequence, the sum of the adjacent frequency interactions is always equal to Nf-1, but the interactions for a given frequency is code dependent.

Total Reflected OFC Power- Simple Model

– Ptot= total output power

– Tadj=adjacent center frequency transmission

– Ro=chip reflectivity– r= electrode

reflectivity– Ng= # of reflector

chip electrodes– Nf= # of frequencies

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b btot adj f adj

b

P R R T N T

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1.40 2

1.437 tanh 0.3771 2

tanh 0.3771 2

g g

g g

r N r NR

r N r N

%f

g

NN

BW

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6.231gr N

adjT e

Equations defined to relate several OFC reflector bank parameters, (approximate and empirically derived)

Example Reflected Power Prediction

• 10% bandwidth• 2% electrode

reflectivity• No repeated

frequencies• Predictions compared

with COM simulations• Large variations

caused by multi-reflection interference

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Number of Frequencies (1 GHz bank size on YZ lithium niobate)

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Predicted reflection using equationPredicted reflection using COM simulation

Approximate analysis and COM model agree well for Nf<10. Optimum reflected power for 10<Nf<15.

Optimal Reflection Coefficient

Strip Reflectivity (%)

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of

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sReflected Power (%) for BW=5%

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Strip Reflectivity (%)

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Reflected Power (%) for BW=10%

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• Reflected power for 5% and 10% fractional bandwidths• Optimal empirically derived relationship for # of frequencies

(Nf), strip reflectivity (r) and %BWbit:

• Total reflected power is maximized for R0 ~ 80%

rBWN bitf /%6.2 *

Colors represent reflectivity, white is maximum reflected power

Reflector Test Structure Time Response

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Direct SAW response

Reflector response

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Direct SAW response

Reflector response

How approximate is the time domain reflector compared to a Rect function???

Simulation of a SAW grating time response for 1% reflectivity and 4 different grating lengths.

Time scale is normalized to reflect the number of wavelengths at center frequency

As Ng*r increases:

1. Impulse response length of reflector increases beyond desired chip -ISI

2. Energy leakage beyond desired chip increases- energy loss

Ng*r=1 appears to be maximum for acceptable ISI

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Relative time (Normalized to Ng*r)

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Chip Correlation with Synchronous Interrogator Pulse

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Relative Time (Normalized to Ng*r)

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Relative Time (Normalized to Ng*r)

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Correlation is greater than ideal, IR length is near ideal and sidelobes are low.

Correlation is greater but sidelobes apparent due to intra-chip-reflections

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Relative Time (Normalized to Ng*r)

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Chip Correlation with Adjacent Frequency Asynchronous Interrogator Pulse

Near ideal response.

Cross correlation shows null at chip center, as expected due to OFC properties.

Cross correlation shows reduced null at chip center, and trailing correlation sidelobe distortion.

Measured Device Example

• fo= 250 MHz

• %BW=28%; BW=69 MHz

• YZ LiNbO3, k2=.046, r~3.4%

• (# frequencies) = (# chips) =7

• # of reflectors at fo = 24

• Ng*r ~ .72

• Chip reflector loss~4dB

nsec 98~c

COM Simulation versus Experimental Results – Time Domain Reflections

COM Predictions

Experimental Measurement

Piezoelectric Substrate

f1 f4 f6 f0f2 f5 f3f1f4f6f0 f2f5f3

Dual delay OFC device having two reflector banks and 7 chips/bank

For Ng*r ~ .72, chips are clearly defined, ISI is minimal, predictions and measurements agree well

COM Simulation versus Experimental Results - Correlation

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Time Normalized to a Chip Length

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Time Normalized to a Chip Length

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Time Normalized to a Chip Length

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Dual delay OFC device having two reflector banks and 7 chips/bank

Piezoelectric Substrate

f1 f4 f6 f0f2 f5 f3f1f4f6f0 f2f5f3

For Ng*r ~ .72, ideal, COM predictions, and experimentally measured autocorrelation results agree well

General Results and Conclusions

• Various OFC chip criteria were investigated to provide guidance in choosing optimal design criteria.

• The ISI and pulse correlation distortion appear to be a limiting or controlling factor for maximizing the chip reflectivity and suggests Ng*r<1.

• For Ng*r=1, chip reflector loss is approximately 2.5 dB.

• Based on reflective power predictions and simulations, the largest number of chip frequencies should be between 10 and 15, with the precise number of frequencies dependent on the bit fractional bandwidth and strip reflectivity.