Report copyright - LMK05028 Low-Jitter Dual-Channel Network Synchronizer ... · IN0 IN1 IN2 IN3 I2C/SPI LOGIC I/O STATUS PLL1 ÷R TCXO_IN PLL2 XO OUT7 OUT1 OUT6 OUT5 OUT4 OUT3 OUT2 OUT0 VDD 3.3 V VDDO
Please pass captcha verification before submit form