resume

4
ANAND KUMAR SRIVASTAVA Year Degree (or Examination) | College (or School) | University (or Board) % / Marks 2008- 2012 M. Tech |Electronics & Communication (VLSI Design) | HCST, Mathura| G. B. Tech. University Lucknow 64.50% 2003- 2007 B. Tech. | Electronics & Instrumentation | AEC, Agra | U. P. Tech University Lucknow 66.72% 2000- 2001 Class XII | Govt Queens Inter, Varanasi | U P Board Allahabad 51.20% 1998- 1999 Class X | Udai Pratap Inter College , Varanasi | U P Board Allahabad 68.78% WORK EXPERIENCE Duration: 6Years 2 Months SHEAT College of Engineering, Varanasi Asst. Professor Aug’13-Present Roles and Responsibilities: Subject related to Electronics Deptt. Teaching of different level of student . Practical labs, Project and Tutorial. College Other function like event , cultural program, etc. Integrated Microsystem, GURGAON Sr. Application Engineer April’11-March’13 (2 years) Roles and Responsibilities: EDA tools Support to solve functional issues to Design. Part of one or more Competence team globally, to help designer’s solve their tool problems. Setup Project environment for designers as per global Way of Working. Technology Worked on Silvaco ICCAD ,Silvaco TCAD ,CrossLight (Process and Device fabrication Tools) Specialization of Solar cell, organic solar cell, MOSFET. Tanner Tools for MEMS, Circuit level design, Layout, DRC , LVS. Verilog Coding, VHDL Coding, Xilling Tools, ModelSim. Impeccable Solution, Lucknow Technical Support Aug’10-March’11 (7 months) Roles and Responsibilities: Support of the Computer and machine level issue. Promote the SEO work. Act as a team leader for the SEO, BPO work. Setup Project environment for any kind of web design and software development. DOB: 11/07/1985| Email: [email protected] / [email protected] | Phone No: +91 9358499164/8953825702 Address: SH. 16/189 A.P. Kadipur Shivpur, Varanasi, U.P. ACADEMI C & PROFESS IONAL QUALIFI CATIONS

Upload: anand-srivastava

Post on 11-Apr-2017

23 views

Category:

Documents


3 download

TRANSCRIPT

Page 1: Resume

ANAND KUMAR SRIVASTAVA Year Degree (or Examination) | College (or School) | University (or Board) % / Marks

2008-2012 M. Tech |Electronics & Communication (VLSI Design) | HCST, Mathura| G. B. Tech. University Lucknow 64.50%

2003-2007 B. Tech. | Electronics & Instrumentation | AEC, Agra | U. P. Tech University Lucknow 66.72%2000-2001 Class XII | Govt Queens Inter, Varanasi | U P Board Allahabad 51.20%1998-1999 Class X | Udai Pratap Inter College , Varanasi | U P Board Allahabad 68.78%

WORK EXPERIENCE Duration: 6Years 2 MonthsSHEAT College of Engineering, Varanasi Asst. Professor Aug’13-Present

Roles and Responsibilities: Subject related to Electronics Deptt. Teaching of different level of student . Practical labs, Project and Tutorial. College Other function like event , cultural program, etc.

Integrated Microsystem, GURGAON Sr. Application Engineer April’11-March’13 (2 years)

Roles and Responsibilities: EDA tools Support to solve functional issues to Design. Part of one or more Competence team globally, to help designer’s solve their tool problems. Setup Project environment for designers as per global Way of Working.Technology Worked on

Silvaco ICCAD ,Silvaco TCAD ,CrossLight (Process and Device fabrication Tools) Specialization of Solar cell, organic solar cell, MOSFET.Tanner Tools for MEMS, Circuit level design, Layout, DRC , LVS.Verilog Coding, VHDL Coding, Xilling Tools, ModelSim.

Impeccable Solution, Lucknow Technical Support Aug’10-March’11 (7 months)

Roles and Responsibilities: Support of the Computer and machine level issue. Promote the SEO work. Act as a team leader for the SEO, BPO work. Setup Project environment for any kind of web design and software development.

Compack Packaging Solution, Mumbai Technical Support Mar’08-Aug’08 (5 months)

Roles and Responsibilities: Installation, troubleshooting and Training of packing machine at customer site (LG Pune, Cadbury) . Lead the technical team on site.

P-N-P Engineering Corporation, Mumbai Sales & Technical Support Sept’07-Jan’08 (4 months)

Roles and Responsibilities: Installation and troubleshooting of power sector equipment customer site (NTPC, BHEL, Mumbai Power Corpo.)

DOB: 11/07/1985| Email: [email protected] / [email protected] | Phone No: +91 9358499164/8953825702

Address: SH. 16/189 A.P. Kadipur Shivpur, Varanasi, U.P.

ACADEMIC & PROFESSIONAL QUALIFICATIONS

Page 2: Resume

Traffic Light Signal Control System: Wrote a successfully running Ladder Programming Logic Controller using

Allen Bradley 1200 Logic. Real Time Clock - RTL Design and Implementation: Implemented the Real Time Clock using Verilog HDL.

Verified the RTL uses Verilog HDL. Synthesized the design. Implemented the design on the Spartan, Xilinx FPGA and verified the design on the board.

Dual Port RAM And Real Time Clock: Verification: Architected the class based verification environment using System Verilog. Verified the RTL module using System Verilog. Generated Functional and code coverage for the RTL.

SPI (Serial Peripheral Interface) Master Core Verification: Wrote a successfully running code using System Verilog, Modelsim, Verification Platform and ISE. Generate functional and code coverage for RTL verification.

Technical Support and Bug Fix in Coding in silvaco TCAD and papers publication

1) GaN based Light Emitting Device Characterization Using Silvaco TCAD software at CEERI Pilani.2) A Novel Partial-Ground-Plane-Based MOSFET on Selective Buried Oxide: 2-D Simulation Study,

HIGHK material using for MOS devices chataterization Indian Institute of Information Technology, Allahabad.

3) Two-dimensional ATLAS Device Simulation of Pentacene Organic Thin-film TransistorsIndian Institute of Technology , Patna.

4) Modelling and Simulation of SiO /Si N as Anti-reflecting Coating for Silicon Solar Cell by Using Silvaco Software R V Engineering College, Bangalore.

SUMMER INTERNSHIP Duration: 5 months

Quick Logic Controllers, Janakpuri, New Delhi PLC Jun‘06 – July ‘06 (2 month) A study about the Automation controlling of any system using a PLC. Design the basic logic circuit function using LADER programming. Using different kinds of PLC’s (Allen Bradley, Siemens )

Maven Silicon, Bangalore Design & Verification May‘10 – Aug ‘10 (3 month) Verilog HDL. Verified the RTL uses Verilog HDL. Synthesized the design. Implemented the design on the Spartan, Xilinx FPGA and verified the design on the board. Verified the RTL module using System Verilog. Generated Functional and code coverage for the RTL.

OPERATING SYSTEM: Windows XP, Windows 98, Linux Windows/Linux Application : ModelSim, Silvaco TCAD, Silvaco ICCAD, QwamtamWise (NANO Technology),Xilling

Subject Studied: VLSI Design And Verification, Digital Electronics, VLSI Technology Languages: Verilog HDL, System Verilog, VHDL, Silvaco

National Conference ETEIC 2012 Proceeding, April 6-7, April, Anand Engineering College, Agra “Fabrication and Simulating Solar Cell Devices Using Silvaco TCAD Tools” National Conference ETEIC 2012 Proceeding, April 6-7, April, Anand Engineering College, Agra “SPI Master Core Verification Using System Verilog Verification”

1) Indian Institute of Technology , Hydrabad, Application on Solar cell and Organic Devices Simulation.2) Indian Institute of Technology , Khdakpur, Application on Solar cell and Organic Devices Simulation.3) Indian Institute of Technology , Guwahati, Application on Solar cell and Organic Devices Simulation.4) Indian Institute of Technology , Patna, Application on Organic Thin Film Transistor Devices Simulation.5) Indian Institute of Technology , BHU, Varanasi, Application on MOS level Devicesfabrication and

Simulation.6) R V Engineering College, Bangalore, Application on Solar cell and Organic Devices Simulation.7) Conference on VLSI TCAD tools using silvaco software,

DOB: 11/07/1985| Email: [email protected] / [email protected] | Phone No: +91 9358499164/8953825702

Address: SH. 16/189 A.P. Kadipur Shivpur, Varanasi, U.P.

LIVE PROJECTS / ACADEMIC PAPERS

COMPUTER PROFICIENCY

PAPER PRESENTATION

Two Day’s WORKSHOPS / Training on TCAD software and EDA tools

Page 3: Resume

8) CERRI Pilani, Rajasthan, Application of Silvaco Tools.9) University Of Hyadrabad, Application of Silvaco Tools.10) Birla Institute of Technology, Mesra, Ranchi, Application of Silvaco Tools.11) Birla Institute of Technology, Pilani, Rajasthan, Application of Silvaco Tools.12) Tezpur University, Assam, Full flow of VLSI of Schamtic level to Fabrication level.13) Indian Institute of Information Technology, Gawalior, Full flow of VLSI of Schamtic level to Fabrication

level.14) Indian Institute of Information Technology, Allahabad, MEMS tools, Tanner Tools, TCAD Tools.15) Delhi Technological University, VLSI TCAD tools using silvaco software.16) Agriculture University Allahabad, VLSI TCAD tools using silvaco software.17) GATE, Hyderabad (DRDO LAB), at Scientics LEVEL18) National Physics Laboratory, New Delhi, at Scientices LEVEL19) Calcutta University, Application of Silvaco Tools

PERSONAL DETAILS

Father’s Name: - Mr. Prem Narayan Lal

Permanent Address: - SH. 16/189 A.P Kadipur, Shivpur , Varanasi-221003

Sex: - Male Nationality: - Indian Marital Status: - Married

I hereby declare that the particulars given are true to the best of my knowledge and belief.

DATE:-

PLACE:- ANAND KUMAR SRIVASTAVA

DOB: 11/07/1985| Email: [email protected] / [email protected] | Phone No: +91 9358499164/8953825702

Address: SH. 16/189 A.P. Kadipur Shivpur, Varanasi, U.P.

DECLARATION