RF Triangulator: Indoor/Outdoor RF Triangulator: Indoor/Outdoor Location FindingLocation Finding

18-525 Architecture Proposal18-525 Architecture Proposal Giovanni FonsecaGiovanni Fonseca

David FuDavid FuAmir GhitiAmir Ghiti

Stephen RoosStephen RoosDesign Manager: Myron KwaiDesign Manager: Myron Kwai

Project Objective:Project Objective:Design a Radio-Frequency indoor/outdoor navigation Design a Radio-Frequency indoor/outdoor navigation system, utilizing the existing wireless infrastructure.system, utilizing the existing wireless infrastructure.

Project DescriptionProject Description

►Using existing 802.11 wireless signals Using existing 802.11 wireless signals it is possible to calculate one’s location it is possible to calculate one’s location without the use of GPS.without the use of GPS.

►The RF Triangulator will use current The RF Triangulator will use current infrastructures to act as an infrastructures to act as an indoor/outdoor local positioning indoor/outdoor local positioning systemsystem

►By acquiring signal data from 3 or By acquiring signal data from 3 or more wireless access points it will be more wireless access points it will be possible to determine one’s possible to determine one’s coordinates to within 1 meter.coordinates to within 1 meter.

RF Triangulator Applications:RF Triangulator Applications:

►Our chip can be integrated into Our chip can be integrated into handheld computers, watches, or handheld computers, watches, or shopping carts for locations ranging shopping carts for locations ranging from large theme parks to office from large theme parks to office buildings.buildings.

► It will be able to quickly provide your It will be able to quickly provide your current location as well as provide a current location as well as provide a distance and heading to a future distance and heading to a future location for path-finding purposes.location for path-finding purposes.

Triangulation ProcessTriangulation Process

►Our chip will solve Our chip will solve for the for the simultaneous simultaneous solution of 3 circle solution of 3 circle equations.equations.

Major Functional Major Functional Components:Components:

►Top 3 / Queue moduleTop 3 / Queue moduleGives priority to the top 3 signals based on their Gives priority to the top 3 signals based on their Signal-to-Noise RatiosSignal-to-Noise Ratios

►Lookup Table ModuleLookup Table ModuleHard coded data of MAC addresses, X and Y Hard coded data of MAC addresses, X and Y coordinates.coordinates.

►Calc ModuleCalc Module Given the coordinates of 3 Access Points and Given the coordinates of 3 Access Points and

their distance, it will calculate the current their distance, it will calculate the current position.position.

Hardware Priority QueuingHardware Priority Queuing

►Our chip dynamically sorts the three Our chip dynamically sorts the three strongest signals in the Top 3 and strongest signals in the Top 3 and maintains a queue of four more maintains a queue of four more recently used signals.recently used signals.

►Each signal information is the average Each signal information is the average of the last four received signals from of the last four received signals from that access point to prevent random that access point to prevent random noise to interfere with a correct noise to interfere with a correct triangulation calculation.triangulation calculation.

Programmable MemoryProgrammable Memory

►An SRAM lookup table stores individual An SRAM lookup table stores individual access point data including: MAC access point data including: MAC address, X and Y coordinates.address, X and Y coordinates.

►Map information can be loaded into Map information can be loaded into memory (off-chip) and as required the memory (off-chip) and as required the chip can load the on-chip SRAM with chip can load the on-chip SRAM with smaller chunks of map information. smaller chunks of map information.

Calc: A Custom DatapathCalc: A Custom Datapath►The calculation requires 1 12-bit FP The calculation requires 1 12-bit FP

Multiply/Divider, 2 12-bit FP Adders, 1 Multiply/Divider, 2 12-bit FP Adders, 1 12-bit Comparator, 1 Log Shifter.12-bit Comparator, 1 Log Shifter.

►Entire calculation requires 32 cycles, Entire calculation requires 32 cycles, with up to four mathematical with up to four mathematical computations per cycle (including data computations per cycle (including data forwarding to save cycles and square forwarding to save cycles and square root approximation).root approximation).

The ComputationThe Computation

Design ProcessDesign Process

►Original specifications for the chip Original specifications for the chip included 16-bit floating point included 16-bit floating point calculations and a waypoint finder that calculations and a waypoint finder that would calculate distance and direction would calculate distance and direction to your desired location.to your desired location.

►Size and complexity constraints Size and complexity constraints reduced floating point numbers to 12-reduced floating point numbers to 12-bits and eliminated waypoint bits and eliminated waypoint calculation.calculation.

Floorplan: Original ProposalFloorplan: Original Proposal

Floorplan EvolutionFloorplan Evolution

Floorplan EvolutionFloorplan Evolution

Floorplan EvolutionFloorplan Evolution

Floorplan EvolutionFloorplan Evolution

Road to VerificationRoad to Verification

►Verify Behavior (done)Verify Behavior (done)►Verify Logic (done)Verify Logic (done)►Verify Schematic (done)Verify Schematic (done)►Verify Layout (in progress)Verify Layout (in progress)►Verify Timing (in progress)Verify Timing (in progress)

SpecificationsSpecifications► Total: 52,072 transistors*► Top Three: 29,322 trans.

3 x FPU Add/Sub Units: 4500 trans. Registers: 16104 trans. Muxes & Computation: 8718 trans.

► Calc: 19,976 trans. 2 x FPU Add/Sub Unit: 3000 trans. 1 x FPU Mult/Div Unit: ~5000 trans. 1 x Shifter: 206 trans. 1 x Comparator: 800 transistors. FSM Logic: 1106 transistors 25 x 12-bit Registers: 6600 trans. total 8-1,6-1,4-1,2-1 Mux Sets: 3264 trans. total

► Lookup: 2,774 trans. Control Registers & Muxes: 2000 trans. Control Logic: 163 trans. Computation: 611 trans. SRAM: 12k trans.

► * count not including SRAM, with SRAM: ~64k► Area: 750x680 square microns► Density: 0.102 trans/sq. micron

ConclusionsConclusions

►Our project turned out to be much Our project turned out to be much bigger than any of us imagined.bigger than any of us imagined.

►Lots of work to do…very little time.Lots of work to do…very little time.