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Ribbon Cutting Ceremony Microelectronics Process Engineering Laboratory College of Engineering September 25, 2003

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Ribbon Cutting Ceremony

Microelectronics Process Engineering Laboratory

College of Engineering September 25, 2003

Founding Partners Award

Intel CorporationDr. Jai Hakhu

Founding Partners Award

Applied Materials, Inc.Dr. David N.K. Wang

Microelectronics Process Engineering Program Highlights

• BS degree curriculum• Fab-based courses• Enhancements to traditional BS curricula• Workforce development activities

Current process capabilities

Metal Depositionand Etch

DiffusionandOxidation

Photo-lithography

OxideRIE

Wet ChemEtch/Clean

Intel

Applied Materials

NovellusAMDCypress

Quintel

Current design facilities

• Hardware:– 500MHz Logic Analyzer– 40 Sun workstations– 280 Sunfire server

• CAD Software– Cadence Design Systems– Synopsys– Silvaco

Student Impact 2000-03ProE Courses

• Basic IC Processing (EE/MatE129)

– Fabricate and test devices

– NMOS technology

– 207 students

• Advanced Thin Film Processes (MatE/ChE166)

– Statistics/DOE

– Metrology and thin film dep/etching

– 32 students

• Microelectronics Mfgr Methods (EE/MatE167)

– CMOS technology/SPC

– Sea of Gates developed

– 37 students

Student Impact 2000-03Related Courses

• Electronic Design I (EE122)– Pilot study in which students designed

a current mirror• Introduction to Engineering (E10)

– Solar cell testing– 500 students/year

• Electronic Properties of Materials (MatE153)– Solar cell processing– 300 students/year

• Introduction to Materials (MatE25)– Lithography (souvenirs)– 250 student/year

Research Activity

• LDMOS devices• Nitride Gate oxide• MEMs projects• RIE characterization• Photovoltaics• Internships

Impact 2000-03Workforce Development

• Creating interest in semiconductor technology and engineering

• High school/community college instructor workshop

• SEMI’s Workforce Development Institute Workshop (HS students)

• Community college class visits• Discover Camp (high school students)

Next Big Things

• Addition of CVD/polysilicon growth – Allow self-aligned gate technology– Reduction in mask set– Allow Analog Leaf Cell manufacture entirely in-house – Allow MEMs research – Enhanced materials science component

• Analog-Mixed Signal (AMS) designs – very sensitive to manufacturing variations– Students will do design/manufacture/test– Enhancement to EE curriculum

• Materials Characterization Facility

Let’s go meet the students and

tour the facility!