RISC vs CISC

RISC vs CISCWhat have mr aldreds dirty clothes got to do with the cpu

Mr Aldreds Dirty Laundry Folding a t shirt

You work in a Tokyo Laundry and there is loads of dirty laundry that needs to be washed, dried, and foldedIt takes the washer for 30 minutes, Drying takes 40 minutes, Folding the clothes takes 20 minutes Then pick up the second load and wash, dry, and fold, and repeat for the third and fourth loads and firth loads. Supposing we started at 18:00 and worked as efficiently as possible, what time would you finish?What is the finish time?Create a diagram that shows this

What does a processor do?

High Level language to Machine codeWe program in High Level Languages e.g. C++.The CPU deals with machine code.We need a compiler to convert from our High LL to an Assembly language which in turn is Assembled into Machine Code. (LMC)The complexity of the code the CPU can handle is higher for a CISC processor than a RISC processor.The more we break a program down into smaller steps the longer the code gets.The Python interpreter is a program which is compiled tomachine code (i.e.bit patterns). When that program runs it interprets (i.e. decodes and executes) your Python program.8RISCReduced instruction set computingSimple instructions are faster to process

What do these complex instruction do?Take this number and store itIf the number that is loaded into the accumulator is equal to zero then break the loop

Make this more complexOpen the doorStand up

RISCReduced Instruction Set ComputerSimple hardwareFurther away from high level languagesLonger code requiring more RAMCompiler has to do more workEvery operation takes place in one clock cycle.

Show the main points to the studentsAsk each / groups to act / draw each statement - could model with playdoh, other students guess10CISCComplex Instruction Set Computer.More complex hardwareCloser to High Level LanguageLess work for the compiler to doSmaller code requiring less RAMSome instructions take multiple clock cycles to complete.

Show the main points to the studentsAsk each / groups to act / draw each statement - could model with playdoh, other students guess

11Consider how to add two numbersLoad the first number from RAM into a registerLoad the second number from RAM into a registerAdd them togetherStore the answer in a register.

2 + 3 = ?Why use risc processors then ?The physical construction of RISC chips is simpler. They need less complicated circuitry as they perform fewer instruction types. Therefore they can be madeSmallerTo use less powerTo generate less heatSpeedIf we look at a single Fetch-Execute cycle a CISC processor would appear to be much faster as it only has to fetch and decode a single instruction.However, that instruction may take it several cycles to complete.A RISC processor would take one cycle per instruction.PipelinesTo speed up processors we can use pipelines.To do this we need to break the Fetch Execute cycle into stages, e.g.fetch instructions from memoryread registers and decode the instructionexecute the instruction or calculate an addressaccess an operand in data memorywrite the result into a registerInstead of taking (4 x 5 = 20) cycles the CPU can process 4 lines of code in just 8 cycles.

Why pipelines dont work as well with CISC processors.Each line of RISC code takes 1 cycle to execute.CISC code can take 1, 2 or more cycles to execute.Therefore the compiler has a harder job of queuing up the jobs in the pipelines of CISC processors.The larger commands, particularly branched commands can cause the pipelines to stall which slows the computer down.Key questionsWhat is the comparison between the laundry and the RISC processingWhat are the RISC instructionsDoes the Laundry task represent CISC?Where is the pipelining comparison?What impact does it have on the washing?How could the Laundry Task be written for a CISC?

Discuss the relative merits of CISC and RISC architectures when a chip manufacturer is planninga new processor