s-domain analysis - cae...
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S-Domain Analysis
s-Domain Circuit AnalysisTime domain
(t domain)Complex frequency domain (s domain)
LinearCircuit
Differentialequation
Classicaltechniques
Responsewaveform
Laplace Transform
Inverse Transform
Algebraicequation
Algebraictechniques
Responsetransform
L
L-1
Laplace Transform
LTransformed
Circuit
Kirchhoff’s Laws in s-Domaint domain s domain
Kirchhoff’s current law (KCL)
Kirchhoff’s voltage law (KVL)
)(1 ti
)(4 ti
)(2 ti
)(3 ti
0)()()()( 4321 =+−+ titititi 0)()()()( 4321 =+−+ sIsIsIsI
0)()()( 321 =++− tvtvtv 0)()()( 321 =++− sVsVsV
−+ )(2 tv −+ )(4 tv
−
+)(1 tv
−
+)(3 tv
−
+)(5 tv
Signal Sources in s Domain
L
L
t domain s domain
)(tv_
+
)(tvS_+
)(ti
circuiton depends)(
)()(==
titvtv S
Voltage Source:
_
+
)(sV )(sVS_+
)(sIVoltage Source:
circuiton depends)(
)()(==
sIsVsV S
+
_
)(tv )(tiS
)(ti
circuiton depends)(
)()(==
tvtiti S
Current Source:)(sV )(sIS
+
_)(sI
Current Source:
circuiton depends)(
)()(==
sVsVsI S
Time and s-Domain Element ModelsImpedance and Voltage Source for Initial Conditions
Time Domain
L
L
L
s-Domain
_
+
)(tvR R
)(tiR
)()( tRitv RR =Resistor:
_
+
)(sVR R
)(sIR
)()( sRIsV RR =Resistor:
_
+
)(tvL L
)(tiL
dttdiLtv L
L)()( =
Inductor:
_+_
+
)(sVL
Ls
)0(LLi
)(sIL
)0( )()(
L
LL
LisLsIsV −=
Inductor:
_
+
)(tvC C
)(tiC
)0(
)(1)(0
C
t
CC
v
diC
tv
+
= ∫ ττ
Capacitor:
_+
_
+
)(sVC
Cs1
svC )0(
)(sIC
s)(v
sICs
sV
C
CC
0
)(1)( +=
Capacitor:
Impedance and Voltage Source for Initial Conditions
RsIsVsZ
R
RR ==
)()()(
0)0(th wi)()()( === L
L
LL iLs
sIsVsZ
00th wi1)()()( === )(v
CssIsVsZ C
C
CC
• Impedance Z(s)
with all initial conditions set to zero
ansformcurrent tr transformvoltage)( =sZ
• Impedance of the three passive elements
Time and s-Domain Element ModelsAdmittance and Current Source for Initial Conditions
Time Domain
L
L
L
s-Domain
_
+
)(tvR R
)(tiR
)(1)( tvR
ti RR =Resistor:
_
+
)(sVR R
)(sIR
)(1)( sVR
sI RR =Resistor:
_
+
)(tvL L
)(tiLInductor:
)0(
)(1)(0
L
t
LL
i
dvL
ti
+
= ∫ ττ
_
+
)(tvC C
)(tiC
dttdvCti C
C)()( =
Capacitor:
Inductor:
s)(i
sVLs
sI
L
LL
0
)(1)( +=
_
+
)(sVLLs
siL )0(
)(sIL
)0( )()(
C
CC
CvsCsVsI −=
Capacitor:
_
+
)(sVCCs1 )0(CCv
)(sIC
Admittance and Current Source for Initial Conditions
RsVsIsY
R
RR
1)()()( ==
0)0(th wi1)()()( === L
L
LL i
LssVsIsY
00th wi)()()( === )(vCs
sVsIsY C
C
CC
• Admittance Y(s)
with all initial conditions set to zero
)(1
transformvoltageansformcurrent tr)(
sZsY ==
• Admittance of the three passive elements
Example: Solve for Current Waveform i(t)
L_+
)(tuVA
R
)(tiL
_
+
)(sVL)0(LLi
−+ )(sVR
_+
sVA
R
)(sI
Ls_+
0)()( =++− sVsVs
VLR
ABy KVL:
)()( sRIsVR =Resistor: )0()()( LL LisLsIsV −=Inductor:
0)0()()( =−++− LA LisLsIsRIs
V
LRsi
LRsRV
sRV
LRsi
LRssLVsI
LAA
LA
++
+−=
++
+=
)0(
)0()(
)(
)()0()( tueieR
VR
Vtit
LR
L
tLR
AA
+−=
−−Inverse Transform:
forced response natural response
Series Equivalence and Voltage Division
)()()()()( 1111 sIsZsIsZsV ==
)())()(()()()(
21
21
sIsZsZsVsVsV
+=+=KVL:
)()(
)()(
)()(
)()(
22
11
sVsZsZsV
sVsZ
sZsV
EQ
EQ
=
=
)()()()()( 2222 sIsZsIsZsV ==
)()()( 21 sZsZsZEQ +=
Restof
Circuit
Z1
Z2
−+ )(1 sV
−
+)(2 sV
−
+)(sV
)(sI
)(1 sI
)(2 sI
Restof
CircuitZEQ
−
+)(sV
)(sI
21 ZZZEQ +=
Parallel Equivalence and Current Division
)()()( 11 sVsYsI =
)())()(()()()(
21
21
sVsYsYsIsIsI
+=+=KCL:
)()(
)()(
)()(
)()(
22
11
sIsYsYsI
sIsY
sYsI
EQ
EQ
=
=
)()()( 22 sVsYsI =
)()()( 21 sYsYsYEQ +=
Restof
CircuitYEQ
−
+)(sV
)(sI
21 YYYEQ +=
Restof
CircuitY1 Y2
−
+)(sV
)(sI
)(2 sI)(1 sI
)(1 sV 1EQZ_+
_
+
Ls
)(2 sV
A
B EQZ
)(1 sV_+
A
B
EQZ)(1 sV 1EQZ_+
_
+
Ls
)(2 sV
A
B EQZ
Example: Equivalence Impedance and Admittance
1
1)()(
2
1
+++=
++=+=
RCsRLsRLCs
RCsRLssZLssZ EQEQ
RRCsCs
RsZsY
EQEQ
11)(
1)(1
1+=+==
L
Find equivalent impedance at A and BSolve for v2(t)
Inductor current = 0capacitor voltage = 0
at t = 0
)(1 tv R C_+
_
+
L
)(2 tv
A
B
)(1 sV RCs1
_+
_
+
Ls
)(2 sV
A
B
)(1 sV 1EQZ_+
_
+
Ls
)(2 sV
A
B
)(
)()(
)(
12
11
2
sVRLsRCLs
R
sVZ
sZsV
EQ
EQ
++=
=)(1 sV R
Cs1
_+
_
+
Ls
)(2 sV
A
B 1EQZ
General Techniques for s-Domain Circuit Analysis
• Node Voltage Analysis (in s-domain)– Use Kirchhoff’s Current Law (KCL)– Get equations of node voltages– Use current sources for initial conditions– Voltage source current source
• Mesh Current Analysis (in s-domain)– Use Kirchhoff’s Voltage Law (KVL)– Get equations of currents in the mesh– Use voltage sources for initial conditions– Current source voltage source
(Works only for “Planar” circuits)
Formulating Node-Voltage Equations
Step 0: Transform the circuit into the s domain using current sources to represent capacitor and inductor initial conditions
Step 1: Select a reference node. Identify a node voltage at each of the non-reference nodes and a current with every element in the circuit
Step 2: Write KCL connection constraints in terms of the element currents at the non-reference nodes
Step 3: Use the element admittances and the fundamental property of node voltages to express the element currents in terms of the node voltages
Step 4: Substitute the device constraints from Step 3 into the KCL connection constraints from Step 2 and arrange the resulting equations in a standard form
Example: Formulating Node-Voltage Equations
L
)(tiS
R C
L
t domain
)(sIS
RCs1
Ls
s domain
siL )0(
)0(CCv
)(sVA
)(2 sI )(1 sI )(3 sI
)(sVB
Referencenode
Step 0: Transform the circuit into the s domain using current sources to represent capacitor and inductor initial conditions
Step 1: Identify N-1=2 node voltages and a current with each element
Step 2: Apply KCL at nodes A and B:
0)()()0()0( :B Node
0)()()0()( :A Node
31
21S
=−++
=−−−
sIsIs
iCv
sIsIs
isI
LC
L
Step 3: Express element equations in terms of node voltages
[ ] [ ]
)()()()(1 where)()()()(
)()(1)()()()(
3
2
1
sCsVsVsYsIRGsGVsVsYsI
sVsVLs
sVsVsYsI
BBC
AAR
BABAL
=====
−=−=
Formulating Node-Voltage Equations (Cont’d)Step 2: Apply KCL at nodes A and B:
0)()()0()0( :B Node
0)()()0()( :A Node
31
21S
=−++
=−−−
sIsIs
iCv
sIsIs
isI
LC
L
Step 3: Express element equations in terms of node voltages
[ ] [ ]
)()()()(1 where)()()()(
)()(1)()()()(
3
2
1
sCsVsVsYsIRGsGVsVsYsI
sVsVLs
sVsVsYsI
BBC
AAR
BABAL
=====
−=−=
Step 4: Substitute eqns. in Step 3 into eqns. in Step 2 and collect common terms to yield node-voltage eqns.
siCvsVCs
LssV
Ls
sisIsV
LssV
LsG
LCBA
LSBA
)0()0()(1)(1 :B Node
)0()()(1)(1 :A Node
+=
++
−
−=
−
+
Solving s-Domain Circuit Equations• Circuit Determinant:
LsGCsGLCs
LsLsCsLsG
LsCsLsLsLsG
s
++=
−++=
+−−+
=∆
2
2)1()1)(1(
1111
)(
Depends on circuit element parameters: L, C, G=1/R, not on driving force and initial conditions
• Solve for node A using Cramer’s rule:
GCsGLCsCvLCsi
GCsGLCssILCs
sLsCsCvsi
LssisI
sssV
CLS
CL
LS
AA
+++−+
+++=
∆++
−+
=∆∆=
22
2 )0()0()()1()(
1)0()0(1)0()(
)()()(
Zero Statewhen initial conditionsources are turned off
Zero inputwhen input sources
are turned off
Solving s-Domain Circuit Eqns. (Cont’d)
• Solve for node B using Cramer’s rule:
GCsGLCsCvGLsGLi
GCsGLCssI
sCvsiLs
sisILsG
sssV
CLS
CL
LS
BB
+++++
++=
∆+−
−+
=∆∆=
22
)0()1()0()()(
)0()0(1)0()(1
)()()(
Zero State Zero input
Network Functions
• Driving-point function relates the voltage and current at a given pair of terminals called a port
Transform SignalInput Transform Response state-Zero function Network =
)(1
)()()(
sYsIsVsZ ==
• Transfer function relates an input and response at different ports in the circuit
)()(FunctionTransfer Voltage)(
1
2
sVsVsTV ==
Circuitin the
zero-state−
+)(sV
)(sI
Circuitin the
zero-state11 or IV 22 or IV
Input Output
_+
1V−
+2V)(sTV
In Out
)()(FunctionTransfer Current )(
1
2
sIsIsTI ==
)()(AdmittanceTransfer )(
1
2
sVsIsTY ==
)()(ImpedanceTransfer )(
1
2
sIsVsTZ == _
+
1V
2I
)(sTY
In Out
1I−
+2V)(sTZ
In Out
1I )(sTI
In Out
2I
Calculating Network Functions
Z1
Z2
−
+)(2 sV)(1 sV_
+Y1 Y2)(1 sI
)(2 sI
)()()( 21 sZsZsZEQ +=
)()()(
)()()(
21
2
1
2
sZsZsZ
sVsVsTV +
==
• Driving-point impedance
• Voltage transfer function:
)()()(
)()( 121
22 sV
sZsZsZsV
+
=
)()()( 21 sYsYsYEQ +=
)()()(
)()()(
21
2
1
2
sYsYsY
sIsIsTI +
==
• Driving-point admittance
• Voltage transfer function:
)()()(
)()( 121
22 sY
sYsYsYsI
+
=
Impulse Response and Step Response
T(s)Circuit)(sX )(sY
Input Output)()()( sXsTsY =
• Input-output relationship in s-domain
)(1)()( sTsTsY =×=• When input signal is an impulse
– Impulse response equals network function– H(s) = impulse response transform– h(t) = impulse response waveform
ssH
ssTsG )()()( ==
• When input signal is a step– G(s) = step response transform– g(t) = step response waveform
)()( tutx =
)()( ttx δ=
(=) means equal almost everywhere,excludes those points at which g(t)has a discontinuitydt
tdgthdhsgt )())(( ,)()(0
== ∫ ττ