FYS 2210

H-08

Department of Physics http://www.uio.no/studier/emner/matnat/fys/FYS2210/h08/ http://www.fys.uio.no/studier/kurs/fys2210/

Halvlederkomponenter

LAB COMPENDIUM SCHOTTKY DIODE N-MOSFET V. Bobal and B.G. Svensson

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Content I Introduction ……………………………………………………………………………..2

I.1 Contact information ...........................................3 II General Remarks ………………………………………………………………….……3 II.1 Safety issues ......................................................3

II.2 How to write a lab report ...................................4 III Syllabus ……………………………..…………………………………………………5 IV Main Process Description of Semiconductor IV Devices…………………………………7 IV.1 Oxidation……………………………………..7 IV.2 Lithography…………………………………...8 IV.3 Etching………………………………………..9 IV.4 Ion Implantation……………………………..11 IV.5 Metallization………………………………....13 V Characterization……………………………………………………………………….14 V.1 Schottky diode………………………………...14 V.2 N-MOSFET…………………………………...16 VI Analysis…………………………………………………16 VI.1 Analysis of Schottky and N-MOSFET processing…………………………16 VI.2 Analysis of Schottky characterization…………………………………...…17 VI.3 Analysis of N-MOSFET characterization………………………………….18 VII Appendix…………………………………………………………………………….19 VII.1 Cleanrooms rules…………………………………….……………………19 VII.2 Cleanroom Authorization Schema……………………………………...…24 VII.3 Chemicals and gasses in the cleanroom………………………………..….25 VII.4 Schottky diode process flow……………………………………………….26 VII.5 NMOSFET process flow………………………………… ……………….27 VII.6 Schottky Laboratory Experiment………………………………………….29 VII.7 NMOSFET Laboratory Experiment……………………………………….33 VII.8 List of equipment………………………………………………………..…42 VII.9 Hierarchy of alignment marks of masks…………………………………...43

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I. Introduction The Lab Compendium for course FYS2210 describes the process of Schottky diodes on n-type silicon and N-MOSFET on p-type silicon substrate [100]. The laboratory experiment concerns a short but effective way to introduce the process and equipment tools which are used in very large scale integration (VLSI) for manufacturing of integrated circuits. It consists of 5 units, each of which having a duration of about 4 hours. The lab will be performed in small groups which will be defined in the first unit. Each of the groups will have to deliver one common lab report (see instructions in Subsection II.2). The final deadline for the delivery is one week after the last lab unit. The lab reports can either be handed in directly to one of the contact persons identified below or by placing them in one of their mail boxes at the Physics department. The course is held in the MiNaLab in Gaustadalleen, close to Forskningsparken. The MiNaLab (see Fig. I.1) has been opened in 2004 and is part of a national program on micro- and nanotechnology. A close collaboration between academia (UiO) and industry (SINTEF) is intended to cover the whole chain from education and basic research to development and industrial production. For that purpose, MiNaLab contains two clean rooms, one for SINTEF (800 m2) with Norway's only independent complete silicon processing line for small-scale production of Si particle detectors, and one for UiO (400 m2), providing equipment for basic semiconductor research and device processing.

Figure I.1 MiNa-lab

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I.1 Contact information To enter the building, a key card and code is needed. In general, these cards are not handed out to students. Therefore, it is very important that you show up IN TIME. If you are late for good reasons, inform one of the persons below. The lab can not be performed on an alternative date! The following persons are available during lectures and the lab course. Please inform one of them in cases of illness or other obstacles and do not hesitate to ask in case of a problem! Bengt Svensson 22852859/22857467 b.g.svensson@fys.uio.no Viktor Bobal 22852892 viktor.bobal@fys.uio.no

II General Remarks

II.1 Safety issues By definition, a laboratory course involves the active handling of samples, measurement equipment, and in a lot of cases, also chemicals by its attendees. The processes of semiconductor device manufacturing imply the direct contact to high-purity semiconductor samples (wafers), chemicals for cleaning and etching them, furnaces operating at temperatures higher than 1000 ˚C, photolithography equipment sensitive to ultraviolet light and the ultraviolet light for exposure, ultra-high vacuum equipment in metallization chambers and ion implanters, high electric fields and so on. Each of the involved steps needs to be understood for a fully safe and self-confident performance during the device fabrication. Therefore, it is very important that you as a lab course attendee

• carefully read and understand the lab manual! • Ask, if something remains unclear to you! • Do not hesitate to tell if you feel unsafe with a specific required action!

The lab course in a clean room requires some further measures beyond the ones typical for a normal measurement lab course. You will be required to wear special protection gear to minimize pollution in the clean room.

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Everyone residing in the clean room must wear a laboratory suit, laboratory shoes and a laboratory hat (hair net), gloves. The protection gear will not allow you to wear other hats, open long hair, or jewelry on your hands. It is recommended wearing socks in your shoes! Clean-room shoes are not very comfortable without them, furthermore it is unhygienic. All chemical handling must be taken place on the wet benches.

The top of the wet benches are equipped with exhaust hoods which are necessary if you work with acids and solvents. Security eyeglasses must be worn whenever handling chemicals. Where indicated a face

mask must be worn. Before working with chemicals, put on respective safety gloves.

Since you will handle chemicals, the use of contact lenses is not recommended and can

even be dangerous. A spill might stick between your eye and the lens, and, hence, will

not be washed away with an eye-shower. Wear glasses instead, on top of those goggles.

Always add acid to water never in reverse order! Don’t mix solvents and acids!

It is strictly forbidden to disarrange and/or mess up the clean room. Do not run or jump inside a clean room! The laboratory must be kept as clean and proper as possible. The wet bench must be cleaned and dried after use. The next user cannot distinguish between water and concentrated acids. Spilled solvents can react with peroxides and nitric acid. Do not interchange chemical labeled test tubes and bins. Inform the lab staff in advance if you have latex or other allergy! For all used chemicals, a detailed list of properties and potential hazards is available. The chemicals you will have to deal with are organic solvents, acids, in particular hydrofluoric acid, metal, photoresist, and highly purified water. So-called Material Safety Data Sheets (MSDS) provide information on potential

hazards in connection with handling the respective chemical. (http://siri.org/msds/

II.2 How to write a lab report Believe it or not: a lab report is first and foremost for YOU! By writing it, you may recollect all your gathered knowledge, sort and analyze it. By putting it down, ideally, a significant thinking process will help you to understand! There are general purposes for attending a lab course, like, for instance, to explain if and why a well-known scientific law or rule is not valid and which additional considerations have to be made. At the end of the lab course, one lab report has to be handed in for each group working together. A typical lab report shall consist of:

• A clear description of the performed experiment in each lab unit

• The (handwritten) protocol sheet obtained during the experiments

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• The analysis according to the requirements in the respective assignment. This

includes a clear definition of all used constants, physical quantities, and equations

• If the assignment requires further discussion and comparison, include that as the last part of the unit report

• Answer all questions

• Characterization presenting the measurement results and analysis of I-V curves of N-

MOSFET’s and C-V curves of Schottky diodes

• Conclusions, summarize the report.

The lab reports have to be handed in one week after the last lab unit.

III Syllabus

Unit 1 Within this unit, the general rules for gowning procedures and behavior in a cleanroom are clarified. A strong focus is put on safety. For your record, the Clean Room Authorization Scheme which you will have to sign after this unit is included in its original form in the Appendix. Only authorized people are admitted to the clean room.

You are made familiar with all chemicals used within the lab course, are informed about which equipment to use for different processes. You will gain knowledge about the diode and the transistor processes. The lab is completed with a guided tour through the cleanroom of SINTEF, where Si particle detectors are produced and the cleanroom of UiO where you will execute your lab experiment.

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Unit 2 Preparation (including complete cleaning processes) of Schottky contacts on an n-type of Si wafer by electron-beam evaporation through a lithography process. The obtained Schottky diodes will be characterized with current- and capacitance-voltage measurements (see unit 3). Start N-MOSFET process

• Cleaning • Oxidation (grow Field oxide) • Lithography (opening of Source and Drain) • Etching

Schottky process

• Lift off • Characterization (C-V; I-V)

Unit 3 N-MOSFET

• Implantation • Lithography (definition of Gate) • Etching

Unit 4

• Oxidation (grow Gate oxide) • Lithography (remove oxide of the Source and Drain area) • Etching • Deposition of metal (Al) for contact

Unit 5

• Lithography (Al contact area) • Etching (remove Al from the wafer surface except of Source, Drain and Gate areas) • Characterization (I-V)

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IV. Main Process Description of

Semiconductor Devices

IV.1 Oxidation

We grow silicon dioxide (field oxide) on the Silicon wafers to isolate devices (diodes, transistors) from one other. The second half of our N-MOSFET process we are going to grow a much thinner layer (100 nm compared with the field oxide thickness of 2000nm) of SiO2 to form the gate oxide.

Before a layer of silicon dioxide is grown on the substrate, the surface is cleaned (RCA cleaning process, see Appendix) to remove contamination and layers from the surface of the wafer such as organics (dust, grease), oxide layers, ionic impurities like heavy metal ions.

After the cleaning process we put the cleaned wafers in the furnace (see Figure IV.1)

The oxidation occurs in atmosphere pressure at 1100 ˚C for 2 hours. Oxygen molecules diffuse into the silicon substrate and form the silicon dioxide layer. Hereby, the surface of the silicon wafer will be consumed gradually.

Si + O2 -> SiO2

Figure IV.1 Thermco 4 stacks furnace

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IV.2 Lithography

Lithography is a process to define the desired geometric features which will form the elements (Schottky diode -> front side contact; N-MOSFET -> source, drain, gate) of the semiconductor components. To transfer the pattern of the geometric shapes of the photomask, which is also created by a photographic process (chrome on quartz glass is used for high resolution UV lithography) we use a special designed photolithography machine (mask aligner, see Figure IV.2) to illuminate the semiconductor wafer through a photomask with UV light (exposing). Alignment of the mask (x, y, rotation) is a necessary and important moment if we want to use lithography steps twice or more. To align the different masks (4 masks for N-MOSFET) exactly to the same point on the wafer for every lithography step, we transfer even reference crosses ( see Figure IV.3) to the wafer at the first lithography step. Before the exposure process the wafer (SiO2 layer on the top) is covered first with primer (HMDS) to aid the adhesion of the photoresist to the SiO2 surface of the wafer. The photoresist will react (chemical reaction) when the UV light hits the surface during the exposure process. Depending of the chemical composition of the resist, the resist can react in two different ways during the development process (direct after exposing):

• The photoresist dissolves in a solution (developer) that was exposed. This type of resist is called positive (this type of resist we use for lithography)

• The photoresist will be polymerized that is exposed and the unexposed area dissolves

in the developer. The resist is called negative. It works on the reverse way than positive resist.

Figure IV.2 Karl Süss Mask Aligner

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Figure IV.3: Details of the contact mask set. Aligner marks on the left bottom corner

IV. 3 Etching To make semiconductor devices (structures) it is necessary to remove layers from the surface of the wafer by etching. (Deposition is the opposite process) There are two different ways to etch material:

• Wet etching (see Figure IV.4, our wet bench). The wafer is placed in a acid bath and the area which was defined by the previous lithography process is etched (removed).

• Dry etching (see Figure IV.5). The wafer is placed in a vacuum chamber filled by

different gases depending of the surface material of the wafer. Wet etching is a chemical reaction process whereas the dry etching is a physical removal of material. In order to be exactly the removed material in deep it is important to determine the etch rate (in our case to etch SiO2 in Buffered HF is about 1000Å/min).

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Figure IV.4 Typical wet-bench. Remember the bag hanging to the right: Hexafluorine, to wash away hydrofluoric acid from skin and eyes!

Figure IV.5 Dry etching in operation

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IV.4 Ion implantation This is a technology to modify silicon and other semiconductor materials to accomplish reliable devices and integrated circuits. The ion implantation process is unlike other doping processes (which have the same purpose) such as a concentration (implanted ions per unit volume) and depth (energy) of the dopants that can be specified directly in the equipment settings (see Figure IV.6). An ion beam (phosphorous in our case) is generated by the ion source (Cs scattering method) and extracted at the energy (max 30 keV from our source) from the source. After this it will be analyzed in a magnetic field. By adjusting the magnetic field strength (Injector and 90 degrees magnet) only the selected ions will enter the accelerating tube. The beam can be accelerated or just can pass through the acceleration column. Out of the acceleration column the beam will be focused by a quadrupole lens. We have 7 different beam lines (15 degrees between) from the switching magnet thereby we can steer the beam on the desired beam line depending of the switching magnet field strength. In our case we steer the beam current on the 15 degrees outlet into the substrate through the raster scanner. In the raster scanner unit there are x- and y-plates which can sweep the beam by applying high voltage, to cover the all wafer (x- and y-direction). The wafers are placed in the target chamber (24 of 2-inches or 12 of 4-inches wafers) and changing position by a pneumatic system. The ions will slow down due to nuclear and electronic stopping. These processes can be simulated by means of a program: The Stopping and Range of Ions in Matter, SRIM (see Figure IV.7) Due to the nuclear stopping some damage is formed in the crystal which needs to be restored by annealing. We put our wafers after the implantation process in the furnace at 850 ˚C for 30 minutes for annealing. As a result, the implanted dopants occupy substitutional crystal sites and electric activation of the dopants takes place.

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Figure IV.6 Ion Implanter

Figure IV.7 Phosphorus depth distribution in silicon for an implantation energy of 36 keV calculated with SRIM.

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IV.5 Metallization

Metallization is the fabrication step in which proper interconnection of circuit elements is made. Aluminum is a common metal to make ohmic contacts to devices like N-MOSFET’s. Aluminum adheres well to both silicon and silicon dioxide, can be easily vacuum deposited and has high conductivity.

In our Schottky diode process we use Palladium to achieve a high Schottky barrier (~0.8 eV on n-type Si substrate).

Metals (Al; Pd) can be easily deposited by an Electron Beam Evaporator (see Figure IV.8) which works by focusing an intense beam of electrons into a crucible that contains (Al; Pd) the desired metal. The metal will be heated to its melting temperature and the melted metal will be evaporated onto the rotating substrate in the vacuum chamber.

Figure IV.8 Laybold E-Beam Evaporator

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V Characterization This lab step will take place outside of the cleanroom in the Probe room (see .Figure V.1)

Figure V.1 Probe station

V.1 Schottky diode C-V characterization Capacitance-Voltage (C-V) method is a common technique for determining Schottky barrier heights. In a C-V experiment the capacitance is measured as a function of the applied reverse bias voltage and subsequently, different ways of data evaluation are performed.

0 1 2 3

1E-8

1E-7

1E-6

1E-5

1E-4

1E-3

Diode Current (A)

Bias Voltage (V)

Figure V.9 Schottky diode characteristic I-V curve

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-20 -15 -10 -5 0

2,00E-011

4,00E-011

6,00E-011

8,00E-011

1,00E-010

1,20E-010

Capacitance (F)

Bias Voltage (V)

Figure V.10 Schottky diode capacitance curve

-20 -15 -10 -5 0

0,00E+000

5,00E+020

1,00E+021

1,50E+021

2,00E+021

2,50E+021

3,00E+021

3,50E+021

Capacitance-2 (1/F

2)

Bias Voltage (V)

Figure V.11 Schottky diode 1/C2 curve

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V.2 N-MOSFET I-V characterization There are three terminals (Source, Drain, Gate) to connect to the power supply. Current flow between the Source and the Drain terminals is controlled by the Voltage, applied between the Gate and the Source terminals (VGS). For conduction, the VGS should be higher than the threshold (VT > 0) voltage. In the physical structure of the N-MOSFET, the Gate terminal is isolated from the Source and the Drain terminals, so that no current can flow into the Gate terminal. The IDS current will increases with increasing VDS as long VGS-VT > VDS. (see Figure below)

0 2 4 6 8

1E-5

1E-4

1E-3 G=5V

G=4V

G=3V

G=2V

I Drain (A)

Bias Voltage (V)

G=1V

Gate length=10µm

Figure V.12 N-MOSFET characteristic I-V curve

VI Analysis

VI.1 Analysis of Schottky diode and N-MOSFET processing See Appendix VII 6-7 Laboratory Experiment

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VI.2 Analysis of Schottky diode characterization Goal: to evaluate the processed Schottky diodes I-V and C-V characteristics Does the characterization reveal if you did a good process job? The link between theory and application is critical. There are many ‘practical’ factors which can affect the results and if Your experimental data do not fit with theory, don’t be too disappointed. You have acquired some experience of semiconductor processing and learned new things.

1. Draw the

a. band structure of your Schottky junction b. charge densities at the junction c. electric field in the depletion region

when the Pd and Si are joined

2. Pick out some diode on your wafer for evaluation of I-V characterization and note the

diameter of the diode (recommended 0.8 mm). Plot the current curves (forward and reverse).

a. Calculate the ideality factor, n b. Calculate the barrier height, ΦBn c. Explain the result of your diode measurement in dark and illuminated room

3. Pick out some diode on your wafer for evaluation of C-V characteristics and note the

diameter of the diode (recommended 3 mm). Plot the capacitance – and 1/C2 curve vs. applied bias voltage.

a. Find the built in voltage (Vbi) b. Calculate the doping concentration through your wafer. Compare the result

with your previous result based on four-probe measurement

c. Calculate the barrier height from your graph. Compare the result with your previous result from the I-V characteristic.

d. Calculate the depletion layer width for the biases you have used.

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VI.3 Analysis of N-MOSFET characterization

1. Pick out some transistor on your wafer for evaluation of the I-V characteristics and discussion of the results.

a. Plot IDrain vs. VDS for different VGS

b. Calculate the ideal threshold voltage if the gate oxide thickness is 200 Å.

c. Find the threshold voltage on your graph

d. Threshold voltage is a very important parameter. Which process(es) are the

most appropriate tools to control the threshold voltage?

e. Find the series resistant on your graph

2. Plot I-V curves for different gate lengths.

3. Plot IDrain vs. VGS (10 µm and 100 µm gate length) to describe the transfer characteristics and the transconductance, gm

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VII. Appendix

VII.1 Gowning Procedures Human beings are the largest source of contamination in a cleanroom. To reduce this source of contamination in the cleanroom the users must enter the cleanroom properly. Before you enter the gowning room you must hung your street clothes (jacket, sweaters, etc.) in the wardrobe which is situated front of the gowning room. You must take off even your shoes. You should wear a minimum amount of clothing under the cleanroom suit. The gowning room is divided in 2 zones: Zone1 You can go to your white box to put on your cleanroom suit. Put your white box on the bench. Take out your cleanroom boots and put them into the zone 2 (cleanroom’s area). Take out your cleanroom suit, make sure it doesn’t touch the floor of the zone 1, and put on the one of trouser leg without touching the floor of the zone 2 with your foot. Put on your cleanroom boot, now you can stand on the floor of the zone 2 with the boot’s leg. Put on the other trouser leg and the cleanroom boot, now you can stand on the zone 2 with your cleanroom boots. Zone 2 = Cleanroom’s area Put properly the rest of your cleanroom suit. Use the mirror in gowning room to inspect your cleanroom clothing. You are ready now to in the cleanroom. The entire cleanroom outfit consists of the following:

1 Coveralls 2 Hoods (hair cover) 3 Cleanroom boots (shoes with blue covers) 4 Gloves-The purpose is to keep all type of contamination (oil, skin flakes) from the

hands from contaminating any part of the cleanroom. 5 Safety glasses. Contact Lenses are not allowed in the cleanroom.

The cleanroom outfits (coveralls, hoods, gloves, boots, blue covers) are stored in the red boxes. If you are a regular user you should wear own permanent coverall in the cleanroom, after using put them into your white box. In your white box you can store only your cleanroom’s objects. These objects should not be contaminated. Do not mix your cleanroom suit with contaminated objects. If you are a visitor you should wear a paper coverall.For all users, it is important to get the proper sized boots. In the front of the gowning room you will find a magnet strip with your name. Please move your strip on left side of the board cleanroom. Please don’t forget to move back your strip

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when you exit the cleanroom. Pay attention to any messages left on the logbook. It could include abnormal conditions (failure of DI water, power, exhaust, ventilation, etc.). Change your coverall every three weeks or depending on the condition of your coverall. Store all personal items which are not in the cleanroom in your white box. Make sure you have everything you need with you to work in the cleanroom. Make sure the main entrance door to the gowning room is closed before opening the door to the cleanroom. If you want bring in new materials (metals, equipment) in the cleanroom , take them throw the decontamination room. Use alcohol wipes to wipe any dust from all surfaces. Use always cleanroom papers, cleanroom notebooks, cleanroom pens if you need to make notes in the cleanroom. Regularly pen and paper are not allowed to bring into the cleanroom. Food, drinks, chewing-gum and snuff are not allowed to bring into the cleanroom. No contact Lenses.

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Equipment Usage Only authorized personnel are allowed to use the cleanroom equipment unsupervised. If you are not authorized you will be trained in the operation, please contact the responsible person for the equipment. The wet benches are considered as other equipment, please contact the responsible person to be trained. Whenever a piece of equipment is used, the logbook will be filled out. Always use the recommended safety outfits (properly gloves, face shield) to protect you from chemicals. If you recognize any problem, please note it in the logbook. All regular users are responsible for the proper operation in the cleanroom. Have it in your mind, it is your cleanroom too. List of all machines and responsible persons are available on request!

Leaving the cleanroom Clean up your working area to be ready for the next person to use. Leave everything in its original condition. Don’t forget to fill out the logbook. Make sure all gas valves are closed, DI water is off, etc. In gowning room store your cleanroom garments in your white box. Throw away your old gloves. Sign out of the logbook. Report everything if you note some problem regarding the cleanroom operation.

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Chemical handling As a cleanroom user, you will be working with toxic and flammable chemicals. It is your responsibility to use these chemicals in a safe and proper way. Work slowly with all chemicals. Do not work with chemicals when you are in hurry. Try to avoid working alone. Always make sure you are familiar with the chemicals that you will use and read their Safety Data Sheet before you start your process. They are available at the wet benches or on request. Before you start working with chemicals make sure you are properly protected. Always use chemical resistant gloves and full face masks during any chemical pouring and mixing process and it is recommended to use them during your chemical process (wet etching, cleaning, etc.). Solvents, bases, HF and the rest of acids must be stored separately to avoid any dangerous reaction. Never mix acids and solvents. When you dilute acids, always pour acids into the water in reverse order, otherwise a violent reaction can be caused. If you can’t find the chemicals you need in the chemical cabinet, please ask Thomas Marthinsen or Viktor Bobal to take the missing chemical into the cleanroom. Uncap chemical bottles over a wet bench container and recap immediately after use and restore the bottles in the (appropriate) chemical cabinet. Do not forget to wipe down the cap and neck area of the bottle with a wet wipe before storing. Chemical handling in beakers outside of the wet benches is forbidden. Chemicals which are poured into a beaker / container must be labeled using a labeling machine. The label must contain the names the all chemicals in the mixture and their percentage proportions. Never leave a solution in any beakers without noting its contents. If you wish to store a mixture longer, place it in a properly labeled bottle, don’t forget write your name and the date. Never pour used chemicals back into a bottle with fresh chemicals even if you didn’t use it. Acids, solvents, developers waste are emptied out into the appropriate (labeled) waste bottles present in the chemical cabinet. Never pour them down in the drain. If you empty a bottle, please rinse the bottle 3 times using DI water and poured down in the drain and put the bottle in the chemicals cabinet. When you have finished your work do not forget to clean up after you. Rinse all

beakers and wash off your working area. All users are responsible for cleaning up their

own spills.

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If you spill a chemical on your coverall dilute the spilling area using water and wash off the chemical and leave the cleanroom immediately and remove your coverall. If the chemical makes contact with your skin wash off the chemicals immediately. If a chemical has caused some injury seek medical treatment immediately. If you spill HF acid on your skin, rinse the spilling area with water for at least 10 minutes. After rinsing, apply a amount of the gel (calcium gluconate) to the skin using kneading motion for 20 minutes. Contact medical person to evaluate what damage has occurred. HF doesn’t burn immediately on contact with the skin.

Safety First All type of accidents must be reported. Do not forget notify your supervisor and fill out the accident rapport. It is very important to know the emergency numbers: Fire alarm 110 Police 112 Ambulance 113 Furthermore you must know the location and function of all fire-extinguishers, fire alarms, eye washes, safety shower, first aid kit and emergency exit. If you hear alarm signals (fire, gas) you must leave the cleanroom immediately and warn even other people. You must go to the meeting-place. If something is unclear you are welcome to ask Viktor Bobal. GOOD LUCK!!!

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VII.2 Cleanroom Authorization Scheme I, .............................................................................., hereby confirm that I have been informed, read UiO’s orientation for safety and chemical handling procedures. I am aware of the hazardous materials and equipments which will be used in the lab and I agree to follow UiO’s safety and operating procedures. ....................................... .............................................................................. Date Signature

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VII.3 Chemicals and gasses in the lab

• Hydrofluoric acid (HF) It is an active component of Buffered Oxide Etch (BOE) which is used for etching SiO2 and even for cleaning of wafers. HF is a very hazardous and corrosive acid. It could take time (up to 30 minutes) before you discover some corrosion damage on your skin. HF etches glass and hence it must not be used in glass beakers, Teflon beakers only.

• Hydrogen peroxide (H2O2) It is a component of RCA cleaning mixture. It is corrosive and highly flammable. Get into contact with forms of organic solvents can cause self-ignition or explosion.

• Sulfuric acid (H2SO4) It is a component of RCA cleaning mixture. It is a very corrosive acid. Get into contact with metals hydrogen gas can be formed and with air establish an explosive mixture. It reacts violently with water.

• Ammonium fluoride (NH4F) It is a component of RCA cleaning mixture. It is corrosive and toxic.

• Nitric acid (HNO3) It is a very corrosive acid. In contact with attic acid and alcohols can cause self-ignition.

• Aceton It is a very flammable solvent. Spilled solvent can react explosively with H2O2 and HNO3.

Gasses The house gases (H2, O2, N2) are piped into the lab in specially stubs from the gas supply depot. All pipelines are located under the raised floor.

• Oxygen (O2) It supports a fire. Oil and grease can self-ignite in oxygen atmosphere.

• Nitrogen (N2) It is a harmless gas.

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VII.4 Schottky diode process flow BATCH NR.: 1. RCA 1,2,3 Cleaning 2. Oxidation

• Grow 2000 Å SiO2 – Tube1 with temperature 1100 C for 2hours, O2 flow

rate 80

3. Measurement – oxide thickness (Rudolf Ellipsometer)

4. Cleaning Acetone

5. Photolithography

6. Etching

• BOE etching rate ~ 700 Å/min (1600Å – 2min 18sec) • Inspection under microscope

7. Schottky contact deposition in the E-beam evaporator chamber

8. Lift off (acetone in ultrasonic bath)

9. Characterization

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VII.5 N-MOSFET PROCESS FLOW BATCH NR.: 10. RCA 1,2,3 Cleaning 11. Oxidation

• Grow 2000 Å SiO2 – Tube1 with temperature 1100 C for 2hours, O2 flow 8

12. Measurement – oxide thickness (Rudolf Ellipsometer)

13. Cleaning Acetone

14. Photolithography - Mask 1

15. Etching – Source & Drain – Isotropic

• BOE etching rate ~ 700 Å/min (1600Å – 2min 18sec) • Inspection under microscope

16. Implantation 31P – Dose: 2x1014 cm-2 Energy: 36 keV

17. Remove photoresist - RCA 1,3

18. Annealing – Tube 2 with temperature 850 C for 30 minutes, N2 flow 5

19. Photolithography – Mask 2

20. Etching

• Etching – all gate oxide – BOE etching rate: 700 Å/min

• Inspection under microscope

• Remove photoresist

• RCA 3

• Grow gate oxide 100-200 Å – Tube 1 with temperature 1000 C for 10 minutes O2 flow 8

21. Photolithography – Mask 3 (OLD MASK)

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22. Etching

• Etching – source / drain oxide (gate oxide thickness 100-200Å) - BOE etching rate: 700 Å/min

• Inspection under microscope

• Remove photoresist

• RCA 3

23. Metallization (E-beam deposition) – Al thickness 2000 Å

24. Photolithography – Mask 4

25. Etching

• Etching – contact area

• Al etch – DIH2O:CH3COOH:HNO3:H3PO4 (2:1:1:16) Etching rate with 50C 100 Å/sec

• Inspection under microscope

26. Annealing – Tube 3 with temperature 400C for 30 min, Formier gas (10%H2 and N2)

flow 80

27. Characterization

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Si n-type wafer

Si n-type wafer

VII.6 Laboratory Experiment of Schottky diode Wafer designation:______________ Name:______________________________

1. Calculate the resistivity of your wafer using four-probe measurement. Compare this

value with the given resistivity and discuss possible deviation.

Measured resistivity: __________ Ω-cm Thickness: _______________Å Given resistivity:_________ Ω-cm Four probe measurements U:_____________________ I:______________________

Figure 1 – Starting material 3” inches Si n-type wafer 2. Calculate the substrate doping ND_______________________________cm

-3

------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ 3. Oxidation

Oxide thickness after 2 hours

Expected: _____________Å Measured: _____________Å Comments: -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 2 – Draw the cross-section of the wafer after oxidation

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Si n-type wafer

4. Photolithography

a. Why is the lithography room provided with yellow light?

------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

b. What is the difference between the positive and negative photoresist? ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

c. How is the positive resist affected by the UV light? ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Exposing time: ____________s Developing time: __________s Comments: ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 3 – Draw the cross-section of the wafer after spinning

Comments: -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 4 – Draw the cross-section of the wafer after developing

Si p-type wafer

31

5. Oxide Etching

Etching time:__________ Comments: -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 5 –Draw the cross section of the wafer after oxide etching Comments: ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ 6. Schottky Contact (Pd-Deposition)

Pd thickness: ___________Å Comments: ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 6 – Draw the cross-section of the wafer after deposition Comments: ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Si n-type wafer

Si p-type wafer

32

7. Lift off

We are using “lift-off” technique to define Pd pattern on the Schottky diodes. Is there another way to do this process? ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 7 – Draw the cross-section of the wafer after lift off Comments: ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Si n-type wafer

33

Si p-type wafer

Si p-type wafer

VII.7 Laboratory Experiment of N-MOSFET Wafer nr.:______________________ Name:______________________________

1. Calculate the resistivity of your wafer using four-probe measurement. Compare this

value with the given resistivity and discuss possible deviation.

Measured resistivity:__________ Ω-cm Given resistivity:_____________ Ω-cm Four probe measurements U:_____________________ I:______________________

Figure 1 – Starting material 4” inches Si P-type wafer 2. Calculate the substrate doping NA______________________cm

-3

------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ 3. Oxidation (Field oxide)

Oxide thickness after 2 hour

Expected: _____________Å Measured: _____________Å Comments: -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 2 – Draw the cross-section of the wafer after oxidation

34

Si p-type wafer

Si p-type wafer

4. Photolithography (Mask 1)

During your lithography process you transferred the geometric shapes on a mask to the surface on your wafer.

a. What kind of errors can emerge on the wafer after the exposure? (Hint: consider the exposure time and the developer time)

------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Exposing time: _________s Developing time: ________s

Figure 3 – Draw the cross-section of the wafer after spinning Comments: ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 4 – Draw the cross-section of the wafer after developing

35

5. Oxide Etching (Source - Drain)

Etching time: ___________s

Figure 5 – Draw the cross-section of the wafer after Source-Drain etching Comments: ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Si p-type wafer

36

Si p-type wafer

6. Implantation (31P)

To form Source and Drain for our transistor we use ion implantation technology.

a. How do we protect (masking) rest of the wafer area against the ion beam? ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

b. Is there other technology to perform this process? ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Energy: __________keV Dose: ____________ions/cm2

Beam Current: _________nA Area: ____________cm-2

Figure 6 – Draw the cross-section of the wafer after implantation

c. The ion beam of singly ionized 31P passes with 36keV energy through a circle aperture of 50mm diameter. Calculate the implantation time

------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

37

Si p-type wafer

Si p-type wafer

Si p-type wafer

7. Photolithography (Mask 2)

Exposing time: _____________s Developing time: ____________s ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 7 – Draw the cross-section of the wafer after spinning

Comments: ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 8 – Draw the cross-section of the wafer after developing 8. Oxide Etching (Gate)

Etching time: ___________s Comments: ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 9 – Draw the cross-section of the wafer after Gate etching

38

Si p-type wafer

Si p-type wafer

Si p-type wafer

9. Oxidation (Gate oxide)

Oxide thickness after 10 minutes

Expected: ___________Å

Comments: -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 10 – Draw the cross-section of the wafer after Gate oxidation 10. Photolithography (Mask 3)

Exposing time: ______________s Developing time: ____________s Comments: ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 11 – Draw the cross-section of the wafer after spinning

Comments: ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 11 – Draw the cross-section of the wafer after developing

39

Si p-type wafer

11. Oxide Etching (Source-Drain)

Etching time: ______________s Comments: ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 12 – Draw the cross-section of the wafer after etching 12. Metallization (Al-Deposition)

Al thickness: ___________Å

Figure 13 – Draw the cross-section of the wafer after deposition Comments: ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Si p-type wafer

40

Si p-type wafer

13. Photolithography (Mask 4)

Exposing time: ____________s Developing time: __________s Comments: ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Figure 14 – Draw the cross-section of the wafer after spinning

Figure 15 – Draw the cross-section of the wafer after developing Comments: ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Si p-type wafer

41

14. Al Etching

Etching time:_____________

Figure 16 - Draw the cross-section of the wafer after Al etching Comments: ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Si p-type wafer

42

VII.8 List of equipment

Process Type of equipment Electrical measurements 4-Probe system CVD/Oxidation/Annealing Thermco Furnace Surface measurements Rudolf ellipsometer Implantation of 31P ions NEC Accelerator Lithography Karl Süss Mask aligner Metallization Leybold E-beam evaporation Characterization HP Agilent/Keithly instruments/Labview

43

VII.9 Hierarchy of alignment marks of masks