1

Sequential Ckts, Latches and Sequential Ckts, Latches and Timing IssuesTiming IssuesToday:

• First Hour: Sequential Circuits, LatchesSequential Circuits, Latches– Section 6.1.1 of Katz’s Textbook

– In-class Activity #1

• Second Hour: J-K latch, Timing issues• Section 6.1.2-6.1.4 of Katz’s Textbook

– In-class Activity #2

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Combinational vs Sequential LogicCombinational vs Sequential Logic

Combinational logic circuitsCombinational logic circuits

Circuits whose outputs are a function of their current inputs only

Sequential logic circuitsSequential logic circuits

Circuits whose outputs are a function of their current inputs ANDAND stored information about previous inputs

Contain storage elements

Contain feedback connections

3

Block diagram of a sequential networkBlock diagram of a sequential network

Sequential Switching NetworksSequential Switching Networks

INPUTS OUTPUTS

CURRENTSTATE

NEXTSTATE

Combinational

network Storage

elements

4

Propagation DelayPropagation DelayLet’s consider a buffer that has a propagation delay of tpdLet’s consider a buffer that has a propagation delay of tpd

Suppose the input of the buffer is set to Y .

After tpd seconds the output will be Y .

Ytpd

Y

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FeedbackFeedback

tpd

YY

If the input of the buffer is Y for at least tpd seconds, after tpd seconds the output becomes Y .

a storage element

!

a storage element

!

Suppose we connect the output to its own inputSuppose we connect the output to its own input

Now, suppose we connect the output to its own input.

Then this process is repeated indefinitely.

It is independent of the value of Y !It is independent of the value of Y !

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Storage Storage ElementsElements

tpd

Buffers are usually implemented using a pair of invertersBuffers are usually implemented using a pair of inverters

tpd12

tpd12

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Storage ElementsStorage Elements

Solution!!Solution!! Replace the inverters with NOR gates Replace the inverters with NOR gatesSolution!!Solution!! Replace the inverters with NOR gates Replace the inverters with NOR gates

R

S

XY

tpd12

tpd12

Problem!! Problem!! No way to change the informationProblem!! Problem!! No way to change the information

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The R-S LatchThe R-S Latch

R

SQ

Q

R-SR-S LatchLatchR-SR-S LatchLatch

R

S

XY

Since X and Y are always complements, we rename them QQ and QQ

Redrawn to show symmetryRedrawn to show symmetry

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R-S Latch Walk-thruR-S Latch Walk-thru

R=0

S=0

Q

Q

R=0 => invert R=0 => invert R=0 => invert R=0 => invert Q

S=0 => invert Q S=0 => invert Q S=0 => invert Q S=0 => invert Q Result: Hold on to Q

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R-S Latch Walk-thruR-S Latch Walk-thru

R=1

S=0

Q=0

Q = 1

R=1 => Q = 0 (“R=1 => Q = 0 (“resetreset function”) function”)R=1 => Q = 0 (“R=1 => Q = 0 (“resetreset function”) function”)

S=0 => invert Q S=0 => invert Q S=0 => invert Q S=0 => invert Q Result: Reset Q to 0

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R-S Latch Walk-thruR-S Latch Walk-thru

R=0

S=1

Q=1

Q = 0

S=1 => S=1 => setset to 0 to 0S=1 => S=1 => setset to 0 to 0 Result: “set” Q to 1

R=0 => invert R=0 => invert R=0 => invert R=0 => invert Q

Q

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R-S Latch Walk-thruR-S Latch Walk-thru

R=1

S=1

Q

Q

R=1 => try to set Q to 0!R=1 => try to set Q to 0!R=1 => try to set Q to 0!R=1 => try to set Q to 0!

S=1 => try to set to 0! S=1 => try to set to 0! S=1 => try to set to 0! S=1 => try to set to 0!

Result: unstable race condition !

Q

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Cross-Coupled NOR GatesCross-Coupled NOR GatesThis is the basis of current memory chipsThis is the basis of current memory chips

S R Q

0 0 Q hold

0 1 0 reset

1 0 1 set

1 1 unstable avoid

Functional truth tableFunctional truth table

This device is called a This device is called a latchlatchThis device is called a This device is called a latchlatch

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Timing DiagramTiming Diagram

100

R

S

Q

\ Q

Cross-Coupled NOR Gates

Timing Waveform

Reset Hold Set

ForbiddenState

Reset Set

ForbiddenState

Race

R

S

Q

\Q

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Do Activity #1 NowDo Activity #1 Now

100

R

S

Q

\ Q

Cross-Coupled NOR Gates: R-S Latch

Timing Waveform

Reset Hold Set

ForbiddenState

Reset Set

ForbiddenState

Race

R

S

Q

\Q

S R Q

0 0 Q hold

0 1 0 reset

1 0 1 set

1 1 unstable avoid

Functional truth tableFunctional truth table

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The R-S Latch Next The R-S Latch Next State TableState Table

S R Q Q+

0 0 0 00 0 1 10 1 0 00 1 1 01 0 0 11 0 1 11 1 0 NOT1 1 1 ALLOWED

Q+ is the next state:

the state after input changes propagate

to the outputs

Q+ is the next state:

the state after input changes propagate

to the outputs

??

??XX

XX

What is the next state for these

inputs?

What is the next state for these

inputs?

Use Don’t-Care for outputs of

forbidden inputs

Use Don’t-Care for outputs of

forbidden inputs

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The R-S Latch Next State TableThe R-S Latch Next State Table

S R Q Q+

0 0 0 00 0 1 10 1 0 00 1 1 01 0 0 11 0 1 11 1 0 X NOT1 1 1 X ALLOWED

Functional behavior label

Functional behavior labelHOLD

RESET

SET

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R-S Latch Characteristic EquationR-S Latch Characteristic EquationR-S Latch Characteristic EquationR-S Latch Characteristic Equation

Q

SR 00 01 11 10

0 0 0 X 11 1 0 X 1

S R Q Q+

0 0 0 0 HOLD0 0 1 10 1 0 0 RESET0 1 1 01 0 0 1 SET1 0 1 11 1 0 X NOT1 1 1 X ALLOWED

K-map for QK-map for Q++

Characteristic equationCharacteristic equationCharacteristic equationCharacteristic equation

Q+ = S + R QQ+ = S + R Q

Simplify !!!Simplify !!!

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Latch operation Latch operation enabled byenabled by

EE

Latch operation Latch operation enabled byenabled by

EE

Input sampling enabled by gatesInput sampling

enabled by gates

Gated LatchGated Latch

R

SQ

Q

E

Outputs change Outputs change when E is low:when E is low:

RESET and SETRESET and SETOtherwise: HOLDOtherwise: HOLD

Outputs change Outputs change when E is low:when E is low:

RESET and SETRESET and SETOtherwise: HOLDOtherwise: HOLD

Latch is Latch is level-sensitivelevel-sensitive, "clocked" by E, "clocked" by ELatch is Latch is level-sensitivelevel-sensitive, "clocked" by E, "clocked" by E

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The J-K LatchThe J-K Latch

J K Q Q+

0 0 0 0 HOLD0 0 1 10 1 0 0 RESET0 1 1 01 0 0 1 SET1 0 1 11 1 0 1 1 1

NEXT STATE TABLENEXT STATE TABLE

NEW !!!

Eliminate the forbidden inputs

Introduce “toggling”

Eliminate the forbidden inputs

Introduce “toggling”

11 TOGGLETOGGLE00

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The J-K Latch The J-K Latch SchematicSchematic

R

S Q

Q’

Latch

Q

Q

J

K

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J-K Latch Characteristic EquationJ-K Latch Characteristic Equation

J K Q Q+

0 0 0 0 HOLDHOLD0 0 1 10 1 0 0 RESETRESET0 1 1 01 0 0 1 SETSET1 0 1 11 1 0 1 TOGGLETOGGLE1 1 1 0

Q

JK 00 01 11 10

0 0 0 1 11 1 0 0 1

NEXT STATE TABLENEXT STATE TABLE K-map for QK-map for Q++K-map for QK-map for Q++

Simplify !!!Simplify !!!

Q+ = J Q + K QQ+ = J Q + K QCharacteristic equationCharacteristic equationCharacteristic equationCharacteristic equation

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Timing DiagramTiming Diagram

J

K

Q

\ Q

100 Set Reset Toggle

Problem: Keeps toggling!

R

S Q

Q

LatchQ

QJ

K

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Clock

SynchronousSynchronous NetworksNetworks

Clocka periodic external event (input)

Clocka periodic external event (input)

INPUTS OUTPUTS

CURRENT

STATE

NEXT

STATE

Combinationalnetwork

Storageelements

CLOCK

CLOCKEDCLOCKED

synchronizes when current state changes happen keeps system well-behaved

makes it easier to design and build large systems

synchronizes when current state changes happen keeps system well-behaved

makes it easier to design and build large systems

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Clocking EventClocking Event

a high-to-low or low-to-high transition of the clocka high-to-low or low-to-high transition of the clock

Lo-HiLo-Hi edgeHi-LoHi-Lo edge

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Setup Time & Hold Time Setup Time & Hold Time Minimum time input is not changing

before (setup timesetup time) and after (hold timehold time) the clock eventMinimum time input is not changing

before (setup timesetup time) and after (hold timehold time) the clock event

InputInput

ClockClock

TTsusu TThh

Clock eventClock event

There is a timing "window" around the

clocking event during which the input

must remain stable and unchanged

in order to be recognized

There is a timing "window" around the

clocking event during which the input

must remain stable and unchanged

in order to be recognized

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Do Activity #2 NowDo Activity #2 NowDue: End of Class Today

RETAIN THE LAST PAGE (#3)!!

For Next Class:• Bring Randy Katz Textbook, & TTL Data Book

• Required Reading:– Sec 6.1,6.3,7.1 of Katz

• This reading is necessary for getting points in the Studio Activity!