si-detector developments at barc dr. s.k.kataria electronics division, barc, mumbai
TRANSCRIPT
Si-Detector Developments at BARC
Dr. S.K.Kataria
Electronics Division,
BARC, Mumbai
Collaborators
M.D. Ghodgaonkar, Anita Topkar, M.Y. Dixit, V.B. Chandratre, A.Das, Vijay Mishra, V.D. Srivastava, R.V. Shrikantaiah, Acharyulu, R.K. Choudhari, Bency John,A.K. Mohanty
BARC• H.V. Ananda, Subash Chandran, Prabhakararao,
N. Shankaranarayana BEL
• O.P. Wadhawan, G.S. VirdiCEERI
• R.K. Shivpuri, Ashutosh Bharadwaj, Kirti Ranjan:DU
Plan of the Talk
• Development of the CMS preshower silicon strip detector
• Silicon Drift Detectors
• Si-Detector Readout Electronics
Compact Muon Solenoid CMS
Preshower Disc~2.49m
MB TYPE2
MB TYPE3
MB TYPE1
MB TYPE0K Chip
Total 124 x 4 = 496 Mother boards
Advantages of silicon detectors:
Fast response of the order of few ns High level of segmentation possible- strips,
microstrips, pixels,etc High energy and position resolution Room temp operation possible
Use of silicon IC technology enables batch fabrication with very good uniformity & low cost of production
Applications of Silicon Detectors: Detection of radiation - , , , protons, neutrons,
charged particles, photons
Silicon detectors with multielement geometries of strips, microstrips, pixels, etc - Physics experiments such as that at CERN, Nuclear Science
experiments in our country - Astronomy ( low energy X-rays)- Medical imaging (pixel detectors)
Single element detectors
Small area diodes – area 25-100 mm2
- Personal dosimeters / area monitors for γ-radiation - Neutron dose measurement using boron coating/thin foil- Low energy X-ray spectroscopy with preamp ( low noise)
at –100C ( <60KeV with few 100 eV resolution)- High resolution -spectroscopy- Charged particle detection
Large area diodes 100-300 mm2
- Detection of low activity radiation such as 239 Pu in air Silicon photodiode/scintillator system
Various types of silicon strip detectors used for high energy physics experiments &
other applications
• Single sided and double sided Strip detectors ( DC coupled, 2D Position sensing)
• Pixel detectors (suitable for imaging applications)• Silicon microstrip detectors ( AC coupled, single or double
sided)• Silicon drift detectors ( high energy and position resolution,
suitable for imaging applications)• Monolithic active pixel detectors• Single element detectors with high energy resolution/large
sensitive area
Silicon strip/microstrip detector ( SS, DC coupled)
Active Pixel Detectors
Monolithic – Has readout inside the detector substrate
Hybrid – Readout is bump bonded to the pixel
Prototype Development phase
(CEERI and BEL) Preproduction (BEL) Production (BEL)
Important activities involved: Detector design and fabrication Detector qualification Micro module assembly
CMS Preshower Silicon Strip Detector Development
(These detectors will be used as the preshower detectors for photons in the CMS at CERN).
Prototype / Technology Development
16-strip silicon detector developed at CEERI on a 2” Wafer
strips of geometry 20x1.65 mm2 enclosed in three P+ guard-rings
32-strip silicon detector of geometry 60x60 mm2 developed at BELstrips of geometry 60x1.69 mm2 enclosed in seven P+ guard-rings
PIN diode detectors of various areas – 3x3 mm2 – 10x10 mm2 developed at BEL along with strip detector 70 diodes enclosed in two guard rings
Detector specifications and Detector design
• ElectricalBreakdown voltage for all strips >= 300V/500V
Total current of all strips =< 5 μA at full depletion voltage (VFD) and
<= 10 μA at 150+VFD
Maximum 1 strip with leakage current > 1 μA at VFD & > 5 μA at VFD+150V
• GeometricalLength 63.0 +- 0.1 mm
Width 63.0 +0.0, -0.1 mm
Detector specifications are very stringent as these are to be operated in a high radiation background of neutrons ( 2x10 14 /cm2) & gamma ( 10Mrad) for a long period of ten years
Scanned picture of BEL and Scanned picture of BEL and CEERI Detectors ( Prototype)CEERI Detectors ( Prototype)
Characterization of the strip detector
• Probe-jigs to make contact to the 32 strips simultaneously
• Simulaneous measurement of strip current of 32 strips ( IV)
• Simulaneous measurement of strip capacitance of 32 strips ( CV)
Probe-jigs, measurement setups were developed by BARC.
Testing facility has been setup at BEL for qualification of detectors as per the CERN specifications
• Argon implantation at Back plane
• Sacrificial Oxide Grown
Back-Plane Ohmic Side Processing Technology
Single step implantation • Energy of the ion-beam: 80 KeV• Dose: 7E15 ions/cm2
• Annealing: 30 min, 950 ºC in N2
Double step implantation First Step:• Energy of the ion-beam: 110 KeV• Dose: 1E15 ions/cm2
• Annealing: 10 min, 1050 ºC in O2 + N2 Second Step:• Energy of the ion-beam: 50 KeV• Dose: 1E16 ions/cm2• Annealing: 30 min, 950 ºC in N2
IV and CV measurement system developed by BARC
Reverse IV characterstics of all 32 strips of a
detector ( production phase)
1.00E-10
1.00E-09
1.00E-08
1.00E-07
1.00E-06
0.0 50.0 100.0 150.0 200.0 250.0 300.0 350.0
Bias Voltage (Volts)
Reve
rse
curr
ent (
Mic
roam
ps)
Capacitance vs Voltage Characterstics of all 32 strips of a detector ( Production phase)
3.00E-11
5.00E-11
7.00E-11
9.00E-11
1.10E-10
1.30E-10
1.50E-10
1.70E-10
0.0 50.0 100.0 150.0 200.0 250.0
Bias Voltage (Volts)
Cap
acita
nce
(Far
ads)
Breakdown Voltage for Good Detectors
0
100
200
300
400
500
600
Last three digits of the Barcode
Bre
ak
do
wn
Vo
ltag
e (
V)
Full Depletion Voltage for Good Detectors
105
110
115
120
125
Last three digits of the Barcode
Fu
ll d
ep
leti
on
Vo
lta
ge
(V
)
Current at Full depletion Voltage for Good Detectors
0.01
0.1
1
Last three digits of the Barcode
Current at 300 Volts for Good Detectors
0.1
1
10
Last three digits of the Barcode
length of the detectors
62.8
62.9
63
63.1
63.2
last three digits of barcode
len
gth
(m
m)
width of the detectors
62.8
62.9
63
63.1
63.2
145
149
153
157
161
165
169
173
177
181
185
189
193
last three digits of barcode
wid
th (
mm
)
Micromodule assembly• The detector is mounted on the ceramic which
would have the radiation hard front end hybrid• The ceramic is mounted on an aluminum tile• Alignment accuracy of about 100 microns is
required • Mechanical jigs would be used for alignmnet
during assembly
Detector Micromodule
Fabrication of Detectors of modified geometry (63 × 63 mm2)
0.001
0.01
0.1
1
0 50 100 150 200 250 300
Reverse Bias (Volts)
Lea
kag
e C
urr
ent
(uA
)
Composite diagram for all the layers of Mask2
IV characteristics of 32 strips a 63 × 63 mm2
detector fabricated at BEL
Simulation Studies
Doping Profile after each of thermal treatmentThe cross-section of the simulated device showing different layers and contour for the junction depth
Silicon Detectors with Inbuilt JFET Simulation Studies & Design
• An extension of PIN diode development work• Fabrication of JFET along with PIN diode detector avoids
stray capacitances and micro phonic noise pickups• SDD is based on the lateral charge transport scheme. The
signal charge generated by radiation is collected by a small area anode (small capacitance≈ 0.1pF). The capacitance of the detector is independent of the detector area
• These detectors can be cooled down to -20ºC that would give energy resolution of ≈180 eV ( PIN diodes) and ≈150 eV (SDD)
Radial Cross Section of SDD & JFET
Process Simulations
• Fabrication of the proposed detectors require 10 Masks layers• Back plane alignment needed• Process simulations for fabrication of the detectors have been
carried out and implant energy, dose values and temperature cycles have been studied
• Starting substrate : 4 KΩ-cm• P-well : 1E12 cm-2 @ 80 KeV• N-channel : 8E12 cm-2 @ 80 KeV • P+ Gate :1E14 cm-2 @ 60 KeV• N+ Source & Drain :1E15 cm-2 @ 80 KeV• The temperature cycles are 1000 -1050 C• Long annealing temperature cycle to recover the bulk carrier life
time.
N-JFET Characteristics
0 2 4 6 8 10 12 14 16
0.0
1.0x10-3
2.0x10-3
3.0x10-3
4.0x10-3
5.0x10-3
Drain Characteristics
Vp = 5 VRDS = 1K
VGS
= -5 V
VGS
= -4 V
VGS
= -3 V
VGS
= -2 V
VGS
= -1 V
VGS
= 0 V
I D (
Am
p)
VDS (V)
-10 -8 -6 -4 -2 0
0.0
1.0x10-3
2.0x10-3
3.0x10-3
4.0x10-3
5.0x10-3
I D (
Am
p)
VGS (V)
Transfer Characteristics
gm=1.1 mS
Silicon Drift Detector with Integrated
Front-end electronics • Low noise operation with large
active area • Energy and position sensing
capability• High energy resolution
~150eV • High position resolution ~ 11
m• High count rate capability 2e6
cps/cm2• Applications of Silicon drift
detectors • X-ray & -ray Spectroscopy• Simulation studies for SDD and
inbuilt JFET completed Analog X-ray AcquisitionSystem (AXAS)
DETECTOR(S)
CMOS ASIC from SCL Concept to CHIP
OCTAL Charge Preamp OCTPREM
8 CHANNEL SILICON STRIP PULSE PROCESSOR. SPAIR
FRONT END DOSIMETER ASIC. CODA
8 CHANNEL CURRENT PULSE PREAMPLIFIER MICON
Full custom designs
The preamplifier FOR
OCTPREM
Block Diagram “SPAIR”
MICON
Error amp
ref
in
I to V &SHAPER/
Buffer
out
bias
FICON
KEY FEATURESLEAKAGE CURRENT COMPENSATION
IDEAL FOR PROPORTIONAL CHAMBERS,GEM, PMTS
50 NS PEAKING TIME1800 e RMS noise
8 CHANNELS WITH SERIAL ANALOG READOUT
• The process technology for large area silicon detectors has been successfully developed and silicon strip detectors meeting all the electrical and technological specifications for it’s qualification as preshower sensors have been produced
• The leakage current in detectors is around 2-5 nA/cm2 and breakdown voltage is in excess of 500V
• The approach of employing gettering techniques during fabrication has sustained the bulk effective carrier lifetime to high value > 10 ms
• The injection of carriers from the back plane at full depletion voltage which was the major problem for high voltage operation of the detectors has been effectively tackled by incorporating double implantation at back side so as to have thicker and uniform n+ layer
• the strip detectors that show high leakage current in strips can become usable detectors with one of the Guard Rings grounded
• Guardring collects most of the signal charge generated close to or outside of the active area avoiding the number of interactions in which imperfect or incomplete charge collection would occur.
• Simulation studies for designing Silicon Drift Detector with integrated N-JFET have been done and results are presented
Preshower Readout Architecture
DDUDDU
Opt
ical
Rec
eive
rs
FPGADSP
FED Bus
Readout Path
FEC Module
Opt
oele
ctro
nics
Link Controller
processor
CLK & T1logic
TTCrx
TTCrx
TTCvimodule
Front End Readout ASICs Front End Readout ASICs
Front End Control ASICsFront End Control ASICs
Control PathClk LV1I2C
DCUIV
I2CCCUCCUCCUCCUCCUCCU
Slow Control & Fast Timing SignalsRe
SubdetectorEvent Builder
K chipK chipK chipK chip
K chipK chipK chipK chip
K chipK chipK chipK chip
K chipK chipK chipK chipPACE
ADC
FastTiming
Slow Control
System Motherboard
GOH
DOHDigital Opto-Hybrid
DDU Functional Requirements
• Optical to electrical conversion & de-serialization of incoming data streams
• Integrity verification of incoming data packets/event fragments
• Data reformatting • Data reduction• DDU event formation• Transmission of DDU events to the global DAQ through
the S-Link64 interface• Transmission of spying events to the local DAQ through
VME interface
DDU Input Data Format
Data Processing in DDU• Pedestal Subtraction• Common mode noise Subtraction• Threshold Comparison• Synchronization Check• Deconvolution
– α = Y1 v0– β = Y1 v1 + Y2 v0 – γ = Y1 v2 + Y2 v1 + Y3 v0
• Charge Extraction– Q = W1 v1 + W2 v2
• Data concentration and output formatting
DDU Output Data Format
Header_BOE: Begin Of Event 4 bits_FOV FOrmat Version 4 bits_LV1_id Trigger Number 24 bits_BX_id Bunch Number 12 bits_Source_id Source Id 12 bits_Evt_ty Event Type 4 bits
Trailer_Evt_lgth Event size in 64 bit words 24 bits_Evt_stat Event status 8 bitsIntegrity CRC 16 bits
Data Concentrator Card (DCC)
FPGA( Eventbuider)
FPGA( Eventmerger)
ClockDistribution
ABuffer
TTCRxInterface
Altera StratixEP1S25F672
9 x XC2VP7FG456Xilinx Virtex-II Pro
FPGAs
70 Opticalinput links(800 Mbpseach)
B
C
3x
3x
3x
OPTICAL
RECEIVERs
Fifo Control
Fifo Control
Data
SpyMemory
VMEInterface
Address&Control
S-link Control
Address Bus
Data bus
16
16
32
32
Altera StratixEP1S25F672
68- Data Links2- Calibration
64 bits
6 x POR10M12SFPNGK
ToDAQ
DDU Architecture in DCC
iFIFO nFIFOData Processor
9 x Vertex2Pro
Data Concentrator
VME64 Interface FIFO
MultiplexerS-Link-64 Interface
68
681
oFIFO
1
iFIFO nFIFOData ProcessoriFIFO nFIFOData ProcessoriFIFO nFIFOData ProcessoriFIFO nFIFOData ProcessoriFIFO nFIFOData ProcessoriFIFO nFIFOData ProcessoriFIFO nFIFOData Processor
8 x links
To CMS DAQ
From SMB
VME64 bus