side-channel attack standard evaluation board sasebo-b
TRANSCRIPT
Side-channel Attack Standard Evaluation Board SASEBO-B Specification
- Version 1.0 -
April 1, 2008
Research Center for Information Security,
National Institute of Advanced Industrial Science and Technology
1
Index
Page 1. OVERVIEW ............................................................................................................................... 2 2. I/O ASSIGNMENTS .................................................................................................................. 3 3. OPERATIONAL INSTRUCTIONS ......................................................................................... 12 4. BOARD SCHEMATIC ............................................................................................................. 15
2
1. Overview
The Side-channel Attack Standard Evaluation Board (SASEBO) is an FPGA board specifically designed to develop standard evaluation schemes to secure the cryptographic module against physical attacks. The SASEBO-B version board incorporates an ALTERA FPGA. Figure 1 is a photograph of the SASEBO-B. The basic features of the SASEBO-B are as follows:
230 mm x 180 mm x 1.6 mm, FR-4, eight layers. Two ALTERA Stratix II series FPGAs
- Cryptographic FPGA: EP2S15F484C5N - Control FPGA: EP2S30F672C5N These FPGAs are connected through a 16-bit bidirectional data bus and a 16-bit address signal, controlled by four signals: RD, WR, RESET, and CLOCK.
A 24-MHz oscillator is provided for each FPGA. External clock input is supported. Power regulators supply FPGA voltages with 3.3-V input. The core voltage of the
cryptographic FPGA can be applied directly through an external power connector. Shunt resistance is provided for power measurement of the FPGAs. RS-232 and USB ports for communicating with the host PC.
ControlFPGA
CryptographicFPGA
Figure 1 SASEBO-B
3
2. I/O Assignments
USB-parallel
IC SRAMSRAM
8Mbit x 2
USB I/F
Pin
head
er (6
4-bi
t)RS-232
levelconverter
RS-232 I/F
Pin
head
er (6
4-bi
t)
64
16
16
16
5Control
Address
Read data
Write data
13
4
32
Data
Address9
Control FPGA (U10)
Cryptographic FPGA (U3)
64
Figure 2: I/O signals
Pin assignments of the cryptographic FPGA (U3)
Table 1: FPGA control Signal Name Pin Number Input/Output Description MSEL3 A4 SW6-5 MSEL2 B4 SW6-6 MSEL1 D4 SW6-7 MSEL0 E5 SW6-8 TDI AB21 JTAG TMS AA20 JTAG TCK AA19 JTAG TRST AB19 JTAG TDO B3 JTAG nCONFIG W18 Config IO_ASDO G12 Config IO_nCSO D11 Config IO_DATA0 E13 Config nSTATUS B20 Config nCE A21 Config DCLK D19 Config CONF_DONE C20 Config PORSELA V5 Config PULLUPA AB2 Config PLLENA Y4 Config OSCX M20,M21 IN Clock RESETA AB18 IN RESET CLK N3,N4 IN X1 CKK_EXT M2,M3 IN CN1
4
Table 2: Cryptographic circuit interface Signal Name Pin Number Input/Output Destination (U10) FPGA_DI0 C21 IN B11 FPGA_DI1 C22 IN A10 FPGA_DI2 D21 IN B10 FPGA_DI3 D22 IN A9 FPGA_DI4 E21 IN B9 FPGA_DI5 E22 IN A8 FPGA_DI6 F21 IN B8 FPGA_DI7 F22 IN A7 FPGA_DI8 G21 IN B7 FPGA_DI9 G22 IN A6 FPGA_DI10 H21 IN B6 FPGA_DI11 H22 IN A5 FPGA_DI12 J21 IN B5 FPGA_DI13 K21 IN B4 FPGA_DI14 K22 IN A3 FPGA_DI15 K20 IN B3 FPGA_DO0 J16 OUT F11 FPGA_DO1 G17 OUT C11 FPGA_DO2 G18 OUT E11 FPGA_DO3 H18 OUT C10 FPGA_DO4 E19 OUT D10 FPGA_DO5 E20 OUT C9 FPGA_DO6 F19 OUT D9 FPGA_DO7 F20 OUT C8 FPGA_DO8 G19 OUT D8 FPGA_DO9 G20 OUT C7 FPGA_DO10 H19 OUT D7 FPGA_DO11 H20 OUT C6 FPGA_DO12 J19 OUT D6 FPGA_DO13 J20 OUT C5 FPGA_DO14 K18 OUT C4 FPGA_DO15 K19 OUT C3 FPGA_A0 D6 IN C19 FPGA_A1 C6 IN D18 FPGA_A2 E7 IN C18 FPGA_A3 C7 IN D17 FPGA_A4 D8 IN C17 FPGA_A5 C8 IN E17 FPGA_A6 E8 IN C16 FPGA_A7 E9 IN G16 FPGA_A8 B5 IN B21 FPGA_A9 A5 IN A21 FPGA_A10 B6 IN B20 FPGA_A11 A6 IN A20 FPGA_A12 B7 IN B19 FPGA_A13 A7 IN A19 FPGA_A14 B8 IN B18 FPGA_A15 A8 IN A18 FPGA_WR B9 IN B17
5
FPGA_RD B10 IN A17 FPGA_RSV0 C4 C21 FPGA_RSV1 D5 C20 FPGA_RSV2 C5 E18
Table 3: LEDs and switches Signal Name Pin Number Input/Output Destination LEDA0 U9 OUT LEDA1 AB8 OUT LEDA2 AA8 OUT LEDA3 AB7 OUT LEDA4 AA7 OUT LEDA5 AB6 OUT LEDA6 AA6 OUT LEDA7 AB5 OUT DIPSWA0 T8 IN SW4-1 DIPSWA1 U8 IN SW4-2 DIPSWA2 V8 IN SW4-3 DIPSWA3 V7 IN SW4-4 DIPSWA4 W7 IN SW4-5 DIPSWA5 Y7 IN SW4-6 DIPSWA6 U7 IN SW4-7 DIPSWA7 Y6 IN SW4-8 SWA V10 IN SW5
Table 4: Pin header Signal Name Pin Number Input/Output Destination IOA0 Y2 IO CN5-1 IOA1 Y1 IO CN5-2 IOA2 W2 IO CN5-3 IOA3 W1 IO CN5-4 IOA4 V2 IO CN5-5 IOA5 V1 IO CN5-6 IOA6 U2 IO CN5-7 IOA7 U1 IO CN5-8 IOA8 T2 IO CN5-9 IOA9 T1 IO CN5-10 IOA10 R2 IO CN5-11 IOA11 R1 IO CN5-12 IOA12 P2 IO CN5-13 IOA13 N8 IO CN5-14 IOA14 T6 IO CN5-15 IOA15 U5 IO CN5-16 IOA16 T5 IO CN5-17 IOA17 W4 IO CN5-18 IOA18 W3 IO CN5-19 IOA19 V4 IO CN5-20 IOA20 V3 IO CN5-21 IOA21 U4 IO CN5-22 IOA22 T4 IO CN5-23
6
IOA23 T3 IO CN5-24 IOA24 R4 IO CN5-25 IOA25 R3 IO CN5-26 IOA26 R5 IO CN5-27 IOA27 R6 IO CN5-28 IOA28 P5 IO CN5-29 IOA29 P6 IO CN5-30 IOA30 R7 IO CN5-31 IOA31 P7 IO CN5-32 IOA32 P8 IO CN5-33 IOA33 K6 IO CN5-34 IOA34 K5 IO CN5-35 IOA35 J5 IO CN5-36 IOA36 K3 IO CN5-37 IOA37 K4 IO CN5-38 IOA38 J3 IO CN5-39 IOA39 J6 IO CN5-40 IOA40 H3 IO CN5-41 IOA41 H4 IO CN5-42 IOA42 G3 IO CN5-43 IOA43 G4 IO CN5-44 IOA44 H5 IO CN5-45 IOA45 G5 IO CN5-46 IOA46 H6 IO CN5-47 IOA47 G6 IO CN5-48 IOA48 J7 IO CN5-49 IOA49 K1 IO CN5-50 IOA50 K2 IO CN5-51 IOA51 J2 IO CN5-52 IOA52 H1 IO CN5-53 IOA53 H2 IO CN5-54 IOA54 G1 IO CN5-55 IOA55 G2 IO CN5-56 IOA56 F1 IO CN5-57 IOA57 F2 IO CN5-58 IOA58 E1 IO CN5-59 IOA59 E2 IO CN5-60 IOA60 D1 IO CN5-61 IOA61 D2 IO CN5-62 IOA62 C1 IO CN5-63 IOA63 C2 IO CN5-64
Pin assignments of the control FPGA (U10)
Table 5: FPGA control Signal Name Pin Number Input/Output Destination MSEL3 F7 SW8-5 MSEL2 E6 SW8-6 MSEL1 B2 SW8-7 MSEL0 G8 SW8-8 TDI AE25 JTAG
7
TMS AD24 JTAG TCK AB22 JTAG TRST AB21 JTAG TDO F6 JTAG nCONFIG AA20 Config IO_ASDO G14 Config IO_nCSO E14 Config IO_DATA0 E16 Config nSTATUS E21 Config nCE E22 Config DCLK C24 Config CONF_DONE B25 Config PORSELB Y8 Config PULLUPB AE2 Config PLLENB AB6 Config OSCX A12 IN Clock RESETB Y20 IN RESET CLK P22,P23 IN X2
Table 6: RS-232 Signal Name Pin Number Input/Output Destination TX D2 OUT Level converter RX C1 IN Level converter CTS E1 OUT Level converter RTS E2 IN Level converter
Table 7: LEDs and switches Signal Name Pin Number Input/Output Destination LEDB0 AE24 OUT LEDB1 AF24 OUT LEDB2 AE23 OUT LEDB3 AE22 OUT LEDB4 AF22 OUT LEDB5 AE21 OUT LEDB6 AF21 OUT LEDB7 AE20 OUT DIPSWB0 AE19 IN SW8-1 DIPSWB1 AF19 IN SW8-2 DIPSWB2 AE18 IN SW8-3 DIPSWB3 AF18 IN SW8-4 DIPSWB4 AE17 IN SW8-5 DIPSWB5 AF17 IN SW8-6 DIPSWB6 AE16 IN SW8-7 DIPSWB7 AD16 IN SW8-8 SWB AF20 IN SW9
Table 8: Pin header Signal Name Pin Number Input/Output Destination IOB0 C25 IO CN10-1 IOB1 C26 IO CN10-2
8
IOB2 D25 IO CN10-3 IOB3 E25 IO CN10-4 IOB4 E26 IO CN10-5 IOB5 F25 IO CN10-6 IOB6 F26 IO CN10-7 IOB7 G25 IO CN10-8 IOB8 G26 IO CN10-9 IOB9 H25 IO CN10-10 IOB10 H26 IO CN10-11 IOB11 J25 IO CN10-12 IOB12 J26 IO CN10-13 IOB13 K25 IO CN10-14 IOB14 K26 IO CN10-15 IOB15 L25 IO CN10-16 IOB16 M25 IO CN10-17 IOB17 M26 IO CN10-18 IOB18 P25 IO CN10-19 IOB19 D24 IO CN10-20 IOB20 E23 IO CN10-21 IOB21 E24 IO CN10-22 IOB22 F23 IO CN10-23 IOB23 F24 IO CN10-24 IOB24 G23 IO CN10-25 IOB25 G24 IO CN10-26 IOB26 H23 IO CN10-27 IOB27 H24 IO CN10-28 IOB28 J23 IO CN10-29 IOB29 J24 IO CN10-30 IOB30 K23 IO CN10-31 IOB31 K24 IO CN10-32 IOB32 L23 IO CN10-33 IOB33 L24 IO CN10-34 IOB34 M23 IO CN10-35 IOB35 M24 IO CN10-36 IOB36 U26 IO CN10-37 IOB37 U25 IO CN10-38 IOB38 V26 IO CN10-39 IOB39 V25 IO CN10-40 IOB40 W26 IO CN10-41 IOB41 W25 IO CN10-42 IOB42 Y26 IO CN10-43 IOB43 Y25 IO CN10-44 IOB44 AA26 IO CN10-45 IOB45 AA25 IO CN10-46 IOB46 AB26 IO CN10-47 IOB47 AB25 IO CN10-48 IOB48 AC25 IO CN10-49 IOB49 AD26 IO CN10-50
9
IOB50 AD25 IO CN10-51 IOB51 U24 IO CN10-52 IOB52 U23 IO CN10-53 IOB53 V24 IO CN10-54 IOB54 V23 IO CN10-55 IOB55 W24 IO CN10-56 IOB56 W23 IO CN10-57 IOB57 Y24 IO CN10-58 IOB58 Y23 IO CN10-59 IOB59 AA24 IO CN10-60 IOB60 AA23 IO CN10-61 IOB61 AB24 IO CN10-62 IOB62 AB23 IO CN10-63 IOB63 AC24 IO CN10-64
Table 9: Cryptographic circuit interface Signal Name Pin Number Input/Output Destination (U3) FPGA_DI0 B11 OUT C21 FPGA_DI1 A10 OUT C22 FPGA_DI2 B10 OUT D21 FPGA_DI3 A9 OUT D22 FPGA_DI4 B9 OUT E21 FPGA_DI5 A8 OUT E22 FPGA_DI6 B8 OUT F21 FPGA_DI7 A7 OUT F22 FPGA_DI8 B7 OUT G21 FPGA_DI9 A6 OUT G22 FPGA_DI10 B6 OUT H21 FPGA_DI11 A5 OUT H22 FPGA_DI12 B5 OUT J21 FPGA_DI13 B4 OUT K21 FPGA_DI14 A3 OUT K22 FPGA_DI15 B3 OUT K20 FPGA_DO0 F11 IN J16 FPGA_DO1 C11 IN G17 FPGA_DO2 E11 IN G18 FPGA_DO3 C10 IN H18 FPGA_DO4 D10 IN E19 FPGA_DO5 C9 IN E20 FPGA_DO6 D9 IN F19 FPGA_DO7 C8 IN F20 FPGA_DO8 D8 IN G19 FPGA_DO9 C7 IN G20 FPGA_DO10 D7 IN H19 FPGA_DO11 C6 IN H20 FPGA_DO12 D6 IN J19 FPGA_DO13 C5 IN J20 FPGA_DO14 C4 IN K18 FPGA_DO15 C3 IN K19 FPGA_A0 C19 OUT D6
10
FPGA_A1 D18 OUT C6 FPGA_A2 C18 OUT E7 FPGA_A3 D17 OUT C7 FPGA_A4 C17 OUT D8 FPGA_A5 E17 OUT C8 FPGA_A6 C16 OUT E8 FPGA_A7 G16 OUT E9 FPGA_A8 B21 OUT B5 FPGA_A9 A21 OUT A5 FPGA_A10 B20 OUT B6 FPGA_A11 A20 OUT A6 FPGA_A12 B19 OUT B7 FPGA_A13 A19 OUT A7 FPGA_A14 B18 OUT B8 FPGA_A15 A18 OUT A8 FPGA_WR B17 OUT B9 FPGA_RD A17 OUT B10 FPGA_RSV0 C21 C4 FPGA_RSV1 C20 D5 FPGA_RSV2 E18 C5
Table 10: USB Signal Name Pin Number Input/Output Destination USB0 F2 IO USB-Parallel IC USB1 G1 IO USB-Parallel IC USB2 G2 IO USB-Parallel IC USB3 J1 IO USB-Parallel IC USB4 F1 IO USB-Parallel IC USB5 H1 IO USB-Parallel IC USB6 J2 IO USB-Parallel IC USB7 H2 IO USB-Parallel IC USBTXE M2 IN USB-Parallel IC USBRXF M1 IN USB-Parallel IC USBRD K1 OUT USB-Parallel IC USBWR L2 OUT USB-Parallel IC USBWREN K2 IN USB-Parallel IC
Table 11: SRAM Signal Name Pin Number Input/Output Destination MEMD0 W2 IO Memory MEMD1 W1 IO Memory MEMD2 V2 IO Memory MEMD3 V1 IO Memory MEMD4 U2 IO Memory MEMD5 U1 IO Memory MEMD6 T2 IO Memory MEMD7 R2 IO Memory MEMD8 AB1 IO Memory MEMD9 AA2 IO Memory MEMD10 AA1 IO Memory MEMD11 Y2 IO Memory MEMD12 AB2 IO Memory MEMD13 AC2 IO Memory
11
MEMD14 AD1 IO Memory MEMD15 AD2 IO Memory MEMD16 AE5 IO Memory MEMD17 AE4 IO Memory MEMD18 AF3 IO Memory MEMD19 AE3 IO Memory MEMD20 AE6 IO Memory MEMD21 AF6 IO Memory MEMD22 AE7 IO Memory MEMD23 AF7 IO Memory MEMD24 AF9 IO Memory MEMD25 AE9 IO Memory MEMD26 AF8 IO Memory MEMD27 AE8 IO Memory MEMD28 AE10 IO Memory MEMD29 AF10 IO Memory MEMD30 AE11 IO Memory MEMD31 AD11 IO Memory MEMA0 Y6 OUT Memory MEMA1 W7 OUT Memory MEMA2 V7 OUT Memory MEMA3 U8 OUT Memory MEMA4 T9 OUT Memory MEMA5 T7 OUT Memory MEMA6 T8 OUT Memory MEMA7 V8 OUT Memory MEMA8 AB4 OUT Memory MEMA9 AC3 OUT Memory MEMA10 AA3 OUT Memory MEMA11 Y3 OUT Memory MEMA12 V4 OUT Memory MEMA13 W4 OUT Memory MEMA14 Y4 OUT Memory MEMA15 AB3 OUT Memory MEMA16 AA4 OUT Memory MEMA17 W3 OUT Memory MEMA18 AA5 OUT Memory MEMCS Y1 OUT Memory MEMCS1 AF5 OUT Memory MEMWR W5 OUT Memory MEMUB Y7 OUT Memory MEMLB AA6 OUT Memory MEMOE W8 OUT Memory
12
3. Operational Instructions Power Supply
Figure 3 shows the composition of the power supply block on the SASEBO-B. Table 12 shows the functions of the power supply connectors. Figure 4 shows the power sequence of the SASEBO-B.
DC 3.3V is supplied to the SASEBO-B through both CN1 and CN2 by the power source, which has a maximum current capacity of 2.0 A. The main power switch (SW1) must be toggled off or the power source must be unplugged. D1 and D2 indicate that DC 3.3V is supplied through CN1 and CN2, respectively. Toggle SW2 to “EXT” supplying the cryptographic FPGA core voltage of 1.2 V through CN3. SW1 must be also toggling off SW2.
Table 12: Power supply settings Connector CN1 CN2 CN3
Description Cryptographic FPGApower supply
Control FPGA power supply
Cryptographic FPGA core voltage
SW2 setting INT INT EXT 1 3.3V±0.16V 3.3V±0.16V 1.2V±0.05V 2 0V 0V 0V Pin 3 NC NC NC
Power supply
1.2V
EP2S30F672C5N
MAX8556ETE
SW2
Cryptographic FPGAU3
RegulatorU5
RegulatorU12
MAX8556ETECN2
CN1
CN3
TP4
TP1
TP2
Pin1:3.3VPin2:GND
Pin1:3.3VPin2:GND
Pin1:1.2VPin2:GND
Control FPGAU10
EP2S30F672C5N
TP25 1.2V
Figure 3: Power supply block on the SASEBO-B
13
1.2V (U12)
VIOB (Control FPGA)
VIOA (Cryptographic FPGA)
1.2V (U3)
3.3V (CN1)Power ON
3.3V (CN2)
Configuration DONE ConfigurationConfiguration DONE
200ms delayReset signal (RESETB)
Reset signal (RESETA)
Restarting power sequence when FPGA is reconfigured.
ConfigurationConfiguration DONE
200ms delay
Figure 4: Power sequence of the SASEBO-B
Jumper Settings
Table 13: Jumper settings Function Pin Setting Description
Short Disable the power sequence of the cryptographic FPGA. JP2 Open Enable the power sequence of the cryptographic FPGA. Short Disable the power sequence of the cryptographic FPGA.
Power sequence
JP3 Open Enable the power sequence of the cryptographic FPGA. Short Bypass R4 shunt resistor on core VCC of the cryptographic FPGA.JP1 Open Enable R4 shunt resistor on core VCC of the cryptographic FPGA.Short Bypass R8 shunt resistor on core GND of the cryptographic FPGA.JP5 Open Enable R8 shunt resistor on core GND of the cryptographic FPGA.Short Bypass R66 shunt resistor on core VCC of the control FPGA. JP6 Open Enable R66 shunt resistor on core VCC of the control FPGA. Short Bypass R67 shunt resistor on core GND of the control FPGA.
Power consumption measurement
JP7 Open Enable R67 shunt resistor on core GND of the control FPGA. JP4 and JP9 are voltage test points. DO NOT SHORT JP4 and JP9.
14
FPGA Configuration
Figure 5 is a block diagram of the FPGA configuration chain of the FPGAs. The configuration chains of the FPGAs are separated. Configuration flash ROMs are programmed through CN9 and CN12 with an Altera USB Blaster. Direct configuration and monitoring is supported with CN6 and CN11. Table 14 shows the pin assignments of CN6 and CN11. FPGAs and Configuration ROMs settings (SW6/SW11) are listed in Table 15. LEDs D12 and D22 indicate that the FPGA is configured successfully. Push down SW3/SW7 to reconfigure the FPGAs.
4: 3.3V10: GND
9: TDI3: TDO5: TMS1: TCK
CN9 / CN12
7: DATA8: nCS
6: nCE5: XCONFIG3: CONFIG_DONE1: DCLK
9: ASDO
IO_DATAnCS
nCENCONFIGCONFIG_DONEDCLK
IO_ ASDO
2: DATA5: ASDI
1: nCE
6 DCLK
Cryptographic / Control FPGA
TDITDOTMSTCK
U7 / U15(EPCS4S18N / EPCS16S18N)
ConfigurationFlash ROM
CN6 / CN11 U3 / U10(EP2S15F484C5N /EP2S30F672C5N)
Figure 5: FPGA configuration chain on the SASEBO-B
Table 14: Pin assignment of the JTAG connector (CN6/CN11)
Pin1 TCK Pin2 GNDPin3 TDO Pin4 3.3V Pin5 TMS Pin6 Pin7 TDI Pin8 GND
Table 15: Configuration mode settings (SW6/SW10)
Dip1 ON
Dip2 PORSEL Reset interval setting OFF:12ms ON:100ms OFF
Dip3 PULLUP I/O pad pull-up setting OFF: pull-up ON: none OFF
Dip4 PLLENA PLL setting OFF: Disable ON: Enable ON
Dip5 MSEL4 OFF Dip6 MSEL3 OFF Dip7 MSEL1 ON Dip8 MSEL0 OFF
15
Clock Source
The clock source connection of the SASEBO-B is shown in Figure 6. A 24-MHz oscillator and a SMA connector (J3/J5) ar connected to each FPGA individually. An external clock can be supplied to the FPGA through the SMA connector.
Socket
OscillatorX1
(24MHz)Socket
OscillatorX2
(24MHz)
SMA clock input
TP43J3
Cryptographic FPGA (U3)
N3/N4Control FPGA (U10)
P22/P23J5
TP20
Figure 6: Clock source connection
Host Interface RS-232 and USB are provided on the SASEBO-B for communicating with the host PC. Tables 16
and 17 show the signal assignments of the RS-232 and USB interfaces. A 9-pin female-female straight cable connects the SASEBO-B to the PC through the RS-232 interfaces. The driver and API of the USB interface for Windows/Linux/Macintosh are provided by FTDI (Future Technology Device International Ltd. http://www.ftdichip.com/Products/FT245R.htm)
Table 16: Signal assignment on the RS-232 interface
Signal CN8 (XM2C-0912-111)
U14 (ADM3202ARN)
U10 (EP2S30F672C5N)
TX 2 pin 14 pin D2 D2 RX 3 pin 13 pin C1 C1 CTS 8 pin 7 pin E1 E1 RTS 7 pin 8 pin E2 E2
Table 17: Signal assignment on the USB interface
Signal CN7 (XM7B-0422)
U13 (FT245RL)
U10 (EP2S30F672C5N)
USBDP 2 pin 15 pin - USBDM 3 pin 16 pin - USBD0 - 1 pin F2 USBD1 - 5 pin G1 USBD2 - 3 pin G2 USBD3 - 11 pin J1 USBD4 - 2 pin F1 USBD5 - 9 pin H1 USBD6 - 10 pin J2 USBD7 - 6 pin H2
USBTXE - 22 pin M2 USBRXF - 23 pin M1 USBRD - 13 pin K1 USBWR - 14 pin L2
USBPWREN - 12 pin K2
16
4. BOARD SCHEMATIC AND LAYOUT
The parts list for the SASEBO-B is shown in Table 18. The board schematic and layout of the SASEBO-B are presented on pages 19 to 35.
Target FPGA Block FPGA I/O, Power supply, FPGA configuration ----- page 19 FPGA I/O ----- page 20
Control FPGA Block FPGA I/O, Power supply, FPGA configuration ----- page 21 FPGA I/O ----- page 22
Board Layout Dimensional drawing ----- page 23 Part-side silk screen ----- page 24 Part-side drawing ----- page 25 Solder-side silk screen ----- page 26 Solder-side drawing ----- page 27
Board Mask Pattern L1 (Part-side) ----- page 28 L2 (Internal layer) ----- page 29 L3 (Internal layer) ----- page 30 L4 (Internal layer) ----- page 31 L5 (Internal layer) ----- page 32 L6 (Internal layer) ----- page 33 L7 (Internal layer) ----- page 34 L8 (Solder-side) ----- page 35
17
Table 18: Parts List Board name SASEBO-B
Model Number
E3-93994-1
Description Part Number Maker Qty Reference Designator
Ceramic Capacitor GRM155F11H103ZA57E MURATA 22
C32,C33,C34,C35,C36,C37,C38,C39,C40,C41,C42,C43,C44,C45,C46,C47,C48,C49,C50,C51,C52,C53,C112,C113,C114,C115,C116,C117,C118,C119,C120,C121,C122, C123,C124,C125,C126,C127,C128,C129, C130,C131,C132,C133
Ceramic Capacitor GRM155F11E104ZA01D MURATA 38
C2,C5,C11,C20,C21,C22,C23,C24,C25, C26,C27,C28,C29,C30,C31,C54,C56,C57,C59,C60,C62,C63,C64,C66,C67,C69,C71,C72,C74,C84,C85,C86,C87,C88,C89,C90,C99,C100,C101,C102,C103,C104,C105, C106,C107,C110,C111,C134,C136,C137, C139,C140,C142,C143,C144,C145,C147, C148,C150,C153,,C155,C78,C157
Ceramic Capacitor GRM188B11H102KA01D MURATA 2 C70,C151
Ceramic Capacitor GRM155F10J105ZE01D MURATA 10 C13,C14,C16,C17,C18,C19,C75,C92,C93,
C95,C96,C97,C98,C108,C109,C152,
Ceramic Capacitor JMK316BJ476ML-T TAIYO
YUDEN 11C8,C9,C55,C58,C61,C65,C68,C73,C77, C81,C82,C135,C138,C141,C146,C149, C154,C156
Electrolytic Capacitor EMV-6R3ADA101MF55G Nippon
Chemi-Con 5 C1,C4,C10,C12,C15,C91,C94
Capacitor EEFUE0J151 Panasonic 3 C7,C80,C83
Capacitor APSA100ELL271MHB5S Nippon Chemi-Con 4 C3,C6,C76,C79
Resistor RK73Z1JTTD 0Ω KOA 6 F1,F2,F3,F4,F5,F6 Resistor RR0816-101-D SSM 2 R2,R3,R6,R7,R14
Resistor RR0816-103-D SSM 49
R12,R17,R19,R20,R21,R22,R23,R24,R25,R26,,R27,R28,R30,R35,R38,R39,R40,R41,R42,R43,,R59,R62,R69,R72,R74,R78,R79,R80,R81,R82,,R83,R84,R85,R86,R87,R91,R95,R96,R97,R98,R99,R100,R113,R114, R116,R117,R118,R119,R121,R123,R15
Resistor RR0816-102-D SSM 20R11,R13,R16,R18,R29,R32,R33,R34,R53,R65,,R68,R70,R71,R73,R77,R88,R89,R90,R112,R122
Resistor RR0816-201-D SSM 2 R9,R10 Resistor RR0816-220-D SSM 8 R31,R36,R37,R92,R93,R94,R124,R125
Resistor RR0816-331-D SSM 18R1,R5,R44,R45,R46,R47,R48,R49,R50, R51,R102,R103,R104,R105,R106,R107, R108,R109
Resistor RR0816-472-D SSM 7 R56,R57,R58,R60,R61,R64,R75 Resistor RR0816-470-D SSM 4 R52,R54,R55,R115 Resistor RR0816-471-D SSM 2 R63,R120
Diode 1SS352(-TPH3) TOSHIBA 2 D3,D13
DIP Switch A6S-8104-H OMRON 4 SW4,SW6,SW8,SW10
18
Push Button B3S-1000 OMRON 4 SW3,SW5,SW7,SW9 Switch, Slide CS-12AAP1 Nikkai 1 SW2 Switch, Slide CS-22AAP1 Nikkai 1 SW1 FPGA EP2S15F484C5N Altera 1 U3 FPGA EP2S30F672C5N Altera 1 U10 EEPROM EPCS16SI8N Altera 1 U15 EEPROM EPCS4SI8N Altera 1 U7 CMOS SN74HC14NSE4 TI 2 U6,U11 SRAM IS62WV51216BLL-55TLI ISSI 1 U9 USB IC FT245RL FDI 1 U13 RS-232 Level Converter ADM3202ARUZ Analog Devices 1 U14
Reset IC BD45292G ROHM 2 U8,U16 Regulator IC MAX8556ETE MAXIM 2 U5,U12 Inductor ELC0607RA-100J1R6-PF TDK 9 L6,L7,L8,L9,L10,L11,L12,L13,L14 Filter BLM18AG102SN MURATA 5 L1,L2,L3,L4,L5,F7,F8,F9,F10,F11,F12,
LED SML-210MTT86 ROHM 20 D1,D2,D4,D5,D6,D7,D8,D9,D10,D11,D12,D14,D15,D16,D17,D18,D19,D20,D21,D22
Connector DF1-2P-2.5DSA HIROSE 1 CN4 Connector XG4C-1031 OMRON 4 CN6,CN9,CN11,CN12 Connector A1-64PA-2.54DSA(71) HIROSE 2 CN5,CN10 Connector B3P-VH(LF)(SN) HIROSE 2 CN1,CN2 Connector B3B-XH-A(LF)(SN) JST 1 CN3 USB Connector XM7B-0442 OMRON 1 CN7
D-sub Connector XM2C-0912-111 OMRON 1 CN8
MOS Relay G3VM-61GR1 OMRON 3 U1,U2,U4 SG-8002DC 24.000M-PCB EPSON 2 X1,X2 SMA Connecotr T124 426 000N TAKITEK 12 J1,J2,J3,J4,J5,J6,J7,J8,J9,J10,J11,J12
Test Point LC-3-G(Black) MAC8 18TP7,TP8,TP9,TP10,TP13,TP14,TP15,TP16,TP23,TP29,TP30,TP32,TP33,TP35,TP36, TP37,TP38,TP44
Test Point MM-2-1 MAC8 8 TP2,TP3,TP5,TP6,TP25,TP26,TP27,TP28Trimmer ST-32EA 1KΩ(13) COPAL 2 VR1,VR2 Resistor ERX1SJ1R0 Panasonic 4 R4,R8,R66,R67 Shunt XG8S-0231 OMRON 6 JP1,JP2,JP3,JP5,JP6,JP8 Connector B2P-SHF-1AA(LF)(SN) JST 2 JP4,JP7 Jumper Socket XJ8A-0211 OMRON 8
IC Socket R110-91-308 PRECI-DIP 2
SHEET DATE DESIGN
DRAWING_No.TITLE
XCONFIGA
外部入力電源13.3V
3.3V外部入力電源2
未実装
FPGA1メイン電源
FPGA2メイン電源
ソケット
未実装
未実装
1/8Wコア電源外部入力電源3
1.15-1.25
EXT
INT
未実装
CONFRST_BUTTON
E3-93994-1暗号処理モジュール
アルテラ版
未実装(添付品)
1 4
ソケットC2
0.1u
L2
BLM18AG102SN
L3
BLM18AG102SN
L4
BLM18AG102SN
L5
BLM18AG102SN
P1 P2 P3
C8
47u
C7
150u/6.3V
+
VIOA
R5
330
VIOBTP4
U1
AQ
Y21
2GS
1 234
R2
100
R6
100
U2
AQ
Y21
2GS
1 234
JP3XG8S-0231
TP1
D2 SML-210MTT86
D1 SML-210MTT86
SW1
CS-22AAP1
3
1
6
4
5
2
U5
MAX8556ETE
1IN
2IN
3IN
4IN
5IN
6IN
16EN
15NC
14GND
13FB
12POK
7OUT
8OUT
9OUT
10OUT
11OUT
R161k
C9
47u
VR11k
R111k
U3IEP2S15F484C5N
B22VCCIO2
L22VCCIO2
AA22VCCIO1
M22VCCIO1
AB12VCCIO8
AB20VCCIO8
AB3VCCIO7
AB11VCCIO7
AA1VCCIO6
M1VCCIO6
B1VCCIO5
L1VCCIO5
A3VCCIO4
A11VCCIO4
A12VCCIO3
A20VCCIO3
H8VCCINT
J9VCCINT
J11VCCINT
J13VCCINT
K10VCCINT
K12VCCINT
L11VCCINT
L13VCCINT
M8VCCINT
M10VCCINT
M12VCCINT
M14VCCINT
N11VCCINT
N13VCCINT
P9VCCINT
P12VCCINT
P14VCCINT
R8
シャント抵抗1
TP5
電流テストポイント
MM-2-1
TP6
電流テストポイント
MM-2-1
JP4
XG
8S-0
231
VIOA
VIOA
VIOA
V12A
V12A
V12A
C5
0.1u
U4
AQ
Y21
2GS
1 234
R10
200
R9
200 SW2
CS-12AAP1R
7
100
R3
100
JP2XG8S-0231
R12
10k
VIOA
R14
100
U6C
74HC14
5 6
C11
0.1u
VIOA
TP11R18
1k
R17
10k
D3
1SS
352
SW3
B3S-1000
VIOA
CN1
B3P-VH(LF)(SN)
3
2
1
CN2
B3P-VH(LF)(SN)
3
2
1 C3
270u
/10V
(OS
)
+
C6
270u/10V(OS)
+
C10
100u
/6.3
V
+
C1
100u/6.3V
+C
4100u/6.3V
+
R1
330
TP7 TP8
TP9 TP10
C12
100u/6.3V
+
C13 1u C14 1u C15
100u/6.3V
+
C16 1u C17 1u C18 1u C19 1u
C20
0.1u
C21
0.1u
C22
0.1u
C23
0.1u
C24
0.1u
C25
0.1u
C26
0.1u
C27
0.1u
C28
0.1u
C29
0.1u
C30
0.1u
C31
0.1u
C32
0.01
uC
33
0.01
uC
34
0.01
uC
35
0.01
uC
36
0.01
uC
37
0.01
uC
38
0.01
uC
39
0.01
u
C40
0.01
uC
41
0.01
uC
42
0.01
uC
43
0.01
uC
44
0.01
uC
45
0.01
uC
46
0.01
uC
47
0.01
uC
48
0.01
uC
49
0.01
uC
50
0.01
uC
51
0.01
uC
52
0.01
uC
53
0.01
u
L1
BLM18AG102SN
R15
10k
CN3
B3B-XH-A(LF)(SN)
3
2
1
JP5
XG8S-0231
TP2
電流テストポイント
MM-2-1
TP3
電流テストポイント
MM-2-1
R4
シャント抵抗1
V12A
J1
089-NV98B
JP1
XG8S-0231
J7
089-NV98B
J6
089-NV98B
J8
089-NV98B
J2
089-NV98B
U6B
74HC14
3 4
U6D
74HC14
9 8
U6E
74HC14
11 10
U3JEP2S15F484C5N
A1GND
A9GND
A14GND
A22GND
AA2GND
AA21GND
AB1GND
AB9GND
AB14GND
AB22GND
B2GND
B21GND
H15GND
J1GND
J10GND
J12GND
J14GND
J22GND
K9GND
K11GND
K13GND
L10GND
L12GND
L14GND
M7GND
M9GND
M11GND
M13GND
M15GND
N10GND
N12GND
N14GND
P1GND
P11GND
P13GND
P22GND
R10GND
K14VCCPD2
P15VCCPD1
R13VCCPD8
P10VCCPD7
N9VCCPD6
L9VCCPD5
H10VCCPD4
H13VCCPD3
SHEET DATE DESIGN
DRAWING_No.TITLE
RESETA
IOA
2
IOA
4
IOA
6
IOA
8
IOA
10
IOA
12
IOA
14
IOA
16
IOA
18
IOA
20
IOA
22
IOA
24
IOA
26
IOA
28
IOA
30
IOA
32
IOA
34
IOA
36
IOA
38
IOA
40
IOA
42
IOA
44
IOA
46
IOA
48
IOA
50
IOA
52
IOA
54
IOA
56
IOA
58
IOA
60
IOA
62
IOA
1
IOA
3
IOA
5
IOA
7
IOA
9
IOA
11
IOA
13
IOA
15
IOA
17
IOA
19
IOA
21
IOA
23
IOA
25
IOA
27
IOA
29
IOA
31
IOA
33
IOA
35
IOA
37
IOA
39
IOA
41
IOA
43
IOA
45
IOA
47
IOA
49
IOA
51
IOA
53
IOA
55
IOA
57
IOA
59
IOA
61
IOA
63
IOA
0DIPSWA2
DIPSWA1
DIPSWA0
DIPSWA3
DIPSWA4
DIPSWA5
DIPSWA6
DIPSWA7
SWA
XCONFIGA
LEDA0
LEDA1
LEDA2
LEDA3
LEDA4
LEDA5
LEDA6
LEDA7
OSCX
PORSELA
PULLUPA
PLLENAA
PLLENAA
PULLUPA
PORSELA
XCONFIGA
XCONFIGA
IOA0
IOA1
IOA2
IOA3
IOA4
IOA5
IOA6
IOA7
IOA8
IOA9
IOA10
IOA11
IOA12
IOA13
IOA14
IOA15
IOA16
IOA17
IOA18
IOA19
IOA20
IOA21
IOA22
IOA23
IOA24
IOA25
IOA26
IOA27
IOA28
IOA29
IOA30
IOA31
IOA32
IOA34
IOA33
IOA35
IOA36
IOA37
IOA38
IOA39
IOA40
IOA41
IOA42
IOA43
IOA44
IOA45
IOA46
IOA47
IOA48
IOA49
IOA50
IOA51
IOA52
IOA53
IOA54
IOA55
IOA56
IOA57
IOA58
IOA59
IOA60
IOA61
IOA62
IOA63
LEDA0
LEDA1
LEDA2
LEDA3
LEDA4
LEDA5
LEDA6
LEDA7
SWA
DIPSWA0
DIPSWA1
DIPSWA2
DIPSWA3
DIPSWA4
DIPSWA5
DIPSWA6
DIPSWA7
FPGA_DO0
FPGA_DO4
FPGA_DO5
FPGA_DO9
FPGA_DO13
FPGA_RSV1
FPGA_A2
FPGA_A6
FPGA_A7
FPGA_DO3
FPGA_DO8
FPGA_DO11
FPGA_DO12
FPGA_RSV0
FPGA_A1
FPGA_A5
FPGA_A9
FPGA_DI1
FPGA_DO1
FPGA_DO2
FPGA_DO7
FPGA_DO6
FPGA_DO10
FPGA_DO15
FPGA_A11
FPGA_RSV2
FPGA_A0
FPGA_A8
FPGA_A10
FPGA_DI2
FPGA_DI9
FPGA_DO14
FPGA_A12
FPGA_A14
FPGA_DI15
FPGA_DI5
FPGA_DI10
FPGA_DI12
FPGA_A13
FPGA_WR
FPGA_DI4
FPGA_DI8
FPGA_DI7
FPGA_DI11
FPGA_A3
FPGA_RD
FPGA_A15
FPGA_DI3
FPGA_DI6
FPGA_DI13
FPGA_A4
FPGA_DI0
FPGA_DI14
BANK6
BANK1BANK4/9 BANK8 BANK2
BANK5
BANK3
CONFIG
GNDガード
200ms遅延
E3-93994-1暗号処理モジュール
アルテラ版
2 4
ペアで引き出し
Cは未実装
Cは未実装
Cは未実装Fは0Ω抵抗
Fは0Ω抵抗
Fは0Ω抵抗
GNDガード
GND TPペアで引き出し
Cは未実装Fは0Ω抵抗
BANK7/10
ICソケットを使用
GND TPペアで引き出し
GNDガード
EEPインシステムプログラム用MSEL[3..0]は1101固定
未実装
TCKTDO
TDI
TMS
JTAG書き込み用
R60
4.7k
VIOA
R61
4.7k
VIOA
R57
4.7k
R58
4.7k
VIOA
C75
1u
VIOA
VIOA
V12A
V12A
R40
10k
R41
10k
R42
10k
R43
10k
VIOA
R64
4.7k
VIOA
R63
470
R65
1k
VIOA
U3AEP2S15F484C5N
C22IO
C21IO
E20IO
E19IO
D22IO
D21IO
G18IO
G17IO
F18VREFB2N0
E22IO
E21IO
F20IO
F19IO
F22IO
F21IO
H18IO
H17IO
H20IO
H19IO
G20IO
G19IO
G22IO
G21IO
J17IO
J16IO
H22IO
H21IO
J19IO
J18IO
J21IO
J20IO
K18IO
K17IO
L19VREFB2N1
K20IO
K19IO
K16IO
K15IO
K22IO
K21IO
L16IO
L15IO
L20IO_CLK0n
L21IO_CLK0p
M20CLK1n
M21CLK1p
J3
089-NV98B
U8
BD45292G
1ER
2SUB
3GND
4VOUT
5VDD
CN
5
A1-64PA-2.54DSA(71)
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63646260585654525048464442403836343230282624222018161412108642
C70
1000
p
R59
10k
TP15 TP16TP14
SW5
B3S-1000
SW4
A6S-8104
16
15
14
13
12
11
10
9 8
7
6
5
4
3
2
1
R28
10k
R22
10k
R21
10k
R23
10k
R20
10k
VIOA
VIOA
R19
10k
TP12CN41
2
R44 330R45 330R46 330R47 330R48 330R49 330R50 330R51 330
D4 SML-210MTT86
D5 SML-210MTT86
D6 SML-210MTT86
D7 SML-210MTT86
D8 SML-210MTT86
D9 SML-210MTT86
D10 SML-210MTT86
D11 SML-210MTT86
D12
SML-210MTT86
C71
0.1u
U7
EPCS4SI8N
1nCS
2DATA
3VCC
4GND
5ASDI
6DCLK
7VCC
8VCC
R24
10k
R27
10k
R25
10k
R26
10k
VIOA
VIOA
VIOA
V12A
V12A
V12A
U3GEP2S15F484C5N
A2TEMPDIODEp
C3TEMPDIODEn
B3TDO
A4MSEL3
B4MSEL2
D4MSEL1
E5MSEL0
E6IO
D5IO
H7IO
C4IO
D3IO
G7IO
F6IO
E7IO
G8IO
D7VREFB4N0
D6IO
F8IO
F7IO
D8IO
E8IO
F9IO
E9IO
G9IO
H9IO
B5IO
A5IO
C5IO
C6IO
B6IO
A6IO
E10IO
D9VREFB4N1
B7IO
A7IO
C8IO
C7IO
B8IO
A8IO
C9IO_PLL5_FBn/OUT2n
B9IO_PLL5_FBp/OUT2p
B10IO_PLL5_OUT0n
A10IO_PLL5_OUT0p
D10IO_PLL5_OUT1n
C10IO_PLL5_OUT1p
C11IO_CLK12n
B11IO_CLK12p
C12IO_CLK13n
B12IO_CLK13p
G10VCC_PLL5_OUT
G11VCCD_PLL5
F12VCCA_PLL5
F10GNDA_PLL5
F11GNDA_PLL5
TP13
TP17 TP18
F2
BLM18AG102SN
F1
BLM18AG102SN
C54
0.1u
C56
0.1u
C57
0.1u
C59
0.1u
C55
47u
C58
47u
C66
0.1u
C69
0.1u
C72
0.1u
C65
47u
C68
47u
C64
0.1u
F4
BLM18AG102SN
C67
0.1u
F5
BLM18AG102SN
C73
47u
F6
BLM18AG102SN
C74
0.1u
R56
4.7k
VIOA
R52
47
U3BEP2S15F484C5N
M16VCCD_PLL1
M17VCCA_PLL1
L17GNDA_PLL1
L18GNDA_PLL1
N17GNDA_PLL2
N18GNDA_PLL2
M19VCCA_PLL2
M18VCCD_PLL2
N22IO_CLK2p
N21IO_CLK2n
N20CLK3p
N19CLK3n
P21IO
P20IO
N16IO
N15IO
R20VREFB1N0
R22IO
R21IO
P19IO
P18IO
T22IO
T21IO
P17IO
P16IO
U22IO
U21IO
R19IO
R18IO
T20IO
T19IO
T18IO
T17IO
U20IO
U19IO
U18IO
U17IO
V20VREFB1N1
V22IO
V21IO
V19IO
V18IO
W22IO
W21IO
W20IO
W19IO
Y22IO
Y21IO
R17IO
R16IO
U3HEP2S15F484C5N
A13IO_CLK14p
B13IO_CLK14n
C13IO_CLK15p
D13IO_CLK15n
D12IO_PGM2
E11IO_PGM1
H11IO_PGM0
G12IO_ASDO
D11IO_nCSO
E12IO_CRC_ERROR
E13IO_DATA0
H12IO_DATA1
B15IO
A15IO
C15IO
C16IO
B14VREFB3N0
B16IO
A16IO
F13IO
G13IO
B17IO
A17IO
A18IO
C17IO
B18IO
C18IO
C14IO
D14IO
E14IO
G14IO
F14IO
H14IO
D15IO
F16IO
J15IO
E15IO
F15IO
G15IO
H16IO
D16VREFB3N1
C19IO
D20IO
G16IO
D17IO_DATA2
A19IO_DATA3
E16IO_DATA4
E17IO_DATA5
B19IO_DATA6
D18IO_DATA7
F17IO_RDYnBSY
E18IO_INIT_DONE
B20nSTATUS
A21nCE
D19DCLK
C20CONF_DONE
R55
47
TP24
TP22
V12A
C60
0.1u
C61
47u
C62
0.1u
F3
BLM18AG102SN
VIOA
R53 1k
VIOA
X1
SG-8002DC24.000M-PCB
1OE
4GND
5O
8VDD
L6E
LC06
07R
A-1
00J1
R6-
PF
R54
47
TP23
R13
10k
CN9
XG
4C-1
031
2
4
6
8
109
7
5
3
1
R62
10k
R39
10k
VIOA
R38
10k
R12
4
22
R31
22
R37
22
R36
22
VIOA
VIOA
VIOA
R30
10k
R35
10k
R32 1k R33 1k R34 1k
R29
1k
VIOA
CN6
XG
4C-1
031
2
4
6
8
10 9
7
5
3
1
SW6
A6S-8104
16
15
14
13
12
11
10
9 8
7
6
5
4
3
2
1
C63
0.1u
L7E
LC06
07R
A-1
00J1
R6-
PF
U3DEP2S15F484C5N
T11GNDA_PLL6
T12GNDA_PLL6
R12VCCA_PLL6
U11VCCD_PLL6
R11VCC_PLL6_OUT
Y10IO_CLK7p
W10IO_CLK7n
AA11IO_CLK6p
Y11IO_CLK6n
AA9IO_PLL6_OUT1p
Y9IO_PLL6_OUT1n
AB10IO_PLL6_OUT0p
AA10IO_PLL6_OUT0n
W9IO_PLL_FBp/OUT2p
V9IO_PLL_FBn/OUT2n
AB8IO
AA8IO
W8VREFB7N0
Y8IO
Y7IO
AB7IO
AA7IO
T10IO
U10IO
AB6IO
AA6IO
Y6IO
Y5IO
AB5IO
AA5IO
V8IO
V10IO
R9IO
T9IO
U9IO
T8IO
U8IO
V7IO
W6VREFB7N1
W7IO
U6IO
U7IO
W5IO
AA4IO
Y3IO
T7IO
V6IO
V5PORSEL
AB2nIO_PULLUP
Y4PLL_ENA
AB4GND
AA3nCEO
U3CEP2S15F484C5N
AB21TDI
AA20TMS
AA19TCK
AB19TRST
W18nCONFIG
V17VCCSEL
R15IO
Y20IO
T16IO_CS
U16IO_CLKUSR
V16IO_nWS
W17IO_nRS
Y19VREFB8N0
T15IO
V15IO
U15IO
W15IO
W16IO
U14IO
R14IO
V14IO
T14IO
Y14IO
W14IO
U13IO
V13IO
Y18IO
AA18IO
Y17IO
AB18IO
AB17IO
AA17IO
T13IO
Y16IO
AA16IO
AA14VREFB8N1
AB16IO
Y15IO
AB15IO
AA15IO
W13IO
U12IO
Y13IO
V11IO
V12IO_DEV_OE
W11IO_DEV_CLRn
W12IO_nCS
Y12IO_CLK5n
AA12IO_CLK5p
AA13IO_CLK4n
AB13IO_CLK4p
TP21
U3EEP2S15F484C5N
W4IO
W3IO
Y2IO
Y1IO
V4IO
V3IO
W2IO
W1IO
R8IO
R7IO
V2IO
V1IO
U3VREFB6N0
U5IO
U4IO
T4IO
T3IO
T6IO
T5IO
U2IO
U1IO
R6IO
R5IO
R4IO
R3IO
P8IO
P7IO
T2IO
T1IO
P6IO
P5IO
R2IO
R1IO
P4VREFB6N1
N8IO
N7IO
P3IO
P2IO
N4CLK9n
N3CLK9p
N2IO_CLK8n
N1IO_CLK8p
M5VCCD_PLL3
M4VCCA_PLL3
N5GNDA_PLL3
N6GNDA_PLL3
L4GNDA_PLL4
L5GNDA_PLL4
M6VCCA_PLL4
L6VCCD_PLL4
TP20
U3FEP2S15F484C5N
M2CLK11p
M3CLK11n
L2IO_CLK10p
L3IO_CLK10n
L8IO
L7IO
K2IO
K1IO
K8IO
K7IO
K4IO
K3IO
J4IO_VREFB5N0
K6IO
K5IO
J3IO
J2IO
J6IO
J5IO
H2IO
H1IO
H6IO
H5IO
G2IO
G1IO
J8IO
J7IO
H4IO
H3IO
G4IO
G3IO
F2IO
F1IO
G6IO
G5IO
E2IO
E1IO
F3VREFB5N1
F5IO
F4IO
D2IO
D1IO
E4IO
E3IO
C2IO
C1IO
U6A
74HC14
12
U6F
74HC14
1312
SHEET DATE DESIGN
DRAWING_No.TITLE
XCONFIGB
TX
RX
RTS
CTS
USBD0
USBD1
USBD7
USBD5
USBD6
USBD3
USBD2
USBD4
USBPWREN
USBRD
USBWR
USBTXE
USBRXF
MEMA0
MEMA1
MEMA2
MEMA3
MEMA4
MEMA12
MEMA13
MEMA14
MEMA15
MEMA16
MEMD0
MEMD1
MEMD2
MEMD3
MEMD4
MEMD5
MEMD6
MEMD7MEMWR
MEMCS
MEMA7
MEMA6
MEMA5
MEMD12
MEMD13
MEMD14
MEMD15
MEMOE
MEMUB
MEMLB
MEMA8
MEMA9
MEMA10
MEMA11
MEMA17
MEMA18
MEMD8
MEMD9
MEMD10
MEMD11
MEMD16
MEMD17
MEMD18
MEMD19
MEMD20
MEMD21
MEMD22
MEMD23
MEMCS1
MEMA4
MEMA3
MEMA2
MEMA1
MEMA0
MEMA16
MEMA15
MEMA14
MEMA13
MEMA12
MEMWR
MEMD31
MEMD30
MEMD29
MEMD28
MEMD24
MEMD25
MEMD26
MEMD27
MEMA5
MEMA6
MEMA7
MEMOE
MEMUB
MEMLB
MEMA18
MEMA8
MEMA9
MEMA10
MEMA11
MEMA17
E3-93994-1暗号処理モジュール
アルテラ版
3 4
ソケット
ソケット
CONFRST_BUTTON
オス
未実装
ソケット
ソケット
等長並行配線5,6ピンはシャーシ
USB Bタイプコネクタ
未実装
未実装
未実装
JP6
XG8S-0231
R67
シャント抵抗1
JP8
XG8S-0231
TP27
電流テストポイント
MM-2-1
TP28
電流テストポイント
MM-2-1
R66
シャント抵抗1
TP26
電流テストポイント
MM-2-1
V12B
C81
47u
U12
MAX8556ETE
1IN
2IN
3IN
4IN
5IN
6IN
16EN
15NC
14GND
13FB
12POK
7OUT
8OUT
9OUT
10OUT
11OUT
R731k
VR21k
R681kC
80
150u/6.3V
+
VIOB
VIOB
C82
47u
C10
8
1uC
109
1uC
110
0.1u
C11
1
0.1u
C12
9
0.01
uC
130
0.01
uC
131
0.01
uC
132
0.01
uC
133
0.01
u
C97 1u C98 1uC95 1u C96 1uC92 1u C93 1u
C10
4
0.1u
C10
5
0.1u
C10
6
0.1u
C10
7
0.1u
C10
0
0.1u
C10
1
0.1u
C10
2
0.1u
C10
3
0.1u
C12
0
0.01
uC
121
0.01
uC
122
0.01
uC
123
0.01
uC
124
0.01
uC
125
0.01
uC
126
0.01
uC
127
0.01
uC
128
0.01
u
C11
2
0.01
uC
113
0.01
uC
114
0.01
uC
115
0.01
uC
116
0.01
uC
117
0.01
uC
118
0.01
uC
119
0.01
u
VIOB
VIOB
V12B
V12B
V12B
VIOB
TP31R70
1k
R69
10k
D13
1SS
352
C84
0.1u
VIOB
VIOB
SW7
B3S-1000
U11C
74HC14
5 6
VIOB
P4 P5 P6
JP7
XG
8S-0
231
C79
270u/10V(OS)
+
C83
150u
/6.3
V
+C
76
270u
/10V
(OS
)
+
C91
100u/6.3V
+
C94
100u/6.3V
+
U10IEP2S30F672C5N
D26VCCIO2
L26VCCIO2
M17VCCIO2
AC26VCCIO1
P17VCCIO1
T26VCCIO1
AF16VCCIO8
AF23VCCIO8
U14VCCIO8
AF4VCCIO7
AF11VCCIO7
U12VCCIO7
AC1VCCIO6
R10VCCIO6
T1VCCIO6
D1VCCIO5
L1VCCIO5
N10VCCIO5
A4VCCIO4
A11VCCIO4
K13VCCIO4
A16VCCIO3
A23VCCIO3
K15VCCIO3
L10VCCINT
L12VCCINT
L14VCCINT
L16VCCINT
M11VCCINT
M13VCCINT
M15VCCINT
N12VCCINT
N14VCCINT
N16VCCINT
P11VCCINT
P13VCCINT
P15VCCINT
R12VCCINT
R14VCCINT
R16VCCINT
T11VCCINT
T13VCCINT
T15VCCINT
T17VCCINT
U10VCCINT
U16VCCINT
U18VCCINT
V9VCCINT
U10JEP2S30F672C5N
A2GND
A13GND
A14GND
A25GND
AA13GND
AE1GND
AE26GND
AF2GND
AF13GND
AF14GND
AF25GND
B1GND
B26GND
G13GND
K12GND
K14GND
L11GND
L13GND
L15GND
L17GND
M10GND
M12GND
M14GND
M16GND
N1GND
N11GND
N13GND
N15GND
N17GND
N26GND
P1GND
P6GND
P10GND
P12GND
P14GND
P16GND
P26GND
R11GND
R13GND
R15GND
R17GND
R22GND
T10GND
T12GND
T14GND
T16GND
T18GND
U9GND
U11GND
U13GND
U15GND
U17GND
M18VCCPD2
R18VCCPD1
V15VCCPD8
V11VCCPD7
R9VCCPD6
M9VCCPD5
J12VCCPD4
J16VCCPD3
TP29 TP30
TP32 TP33
R72
10k
VIOB
C90
0.1u
C88
0.1uC890.1u
C870.1u
C990.1u
L11ELC0607RA-100J1R6-PF L12
ELC0607RA-100J1R6-PF
L10
ELC0607RA-100J1R6-PFU14
ADM3202ARU
16VCC
2V+
6V-
15GND
14T1O
7T2O
13R1I
8R2I
9R2
12R1
10T2
11T1
5C2-
4C2+
3C1-
1C1+
JP10
CN8
RDED-9P-LNA(4-40)(55)
5
9
4
8
3
7
2
6
1
G1
G2
VIOB
VIOB
C86
0.1u
C85
0.1u
R75
4.7k
R74
10k
L8ELC0607RA-100J1R6-PF
U13
FT245RL
1D0
2D4
3D2
4VCCIO
5D1
6D7
7GND
8NC
9D5
10D6
11D3
12PWREN
13RD
14WR
15USBDP
16USBDM
173V3OUT
18GND
19RESET
20VCC
21GND
22TXE
23RXF
24NC
25AGND
26TEST
27OSCI
28OSCO
L9
ELC0607RA-100J1R6-PF
CN7
XM7B-0422
1
2
3
4
5
6
JP9
C15
6
47u
C15
7
0.1u
U17
IS62WV51216BLL-55TLI
1A4
2A3
3A2
4A1
5A0
6CS1
7IO0
8IO1
9IO2
10IO3
11VDD
12GND
13IO4
14IO5
15IO6
16IO7
17WE
18A16
19A15
20A14
21A13
22A12
23A17
24A11
25A10
26A9
27A8
28A18
29IO8
30IO9
31IO10
32IO11
33VDD
34GND
35I/O12
36I/O13
37I/O14
38I/O15
39LB
40UB
41OE
42A7
43A6
44A5
VIOB
VIOB
U9
IS62WV51216BLL-55TLI
1A4
2A3
3A2
4A1
5A0
6CS1
7IO0
8IO1
9IO2
10IO3
11VDD
12GND
13IO4
14IO5
15IO6
16IO7
17WE
18A16
19A15
20A14
21A13
22A12
23A17
24A11
25A10
26A9
27A8
28A18
29IO8
30IO9
31IO10
32IO11
33VDD
34GND
35I/O12
36I/O13
37I/O14
38I/O15
39LB
40UB
41OE
42A7
43A6
44A5
C77
47u
C78
0.1u
J12
089-NV98B
J9
089-NV98B
TP25
電流テストポイント
MM-2-1
J4
089-NV98B
U11E
74HC14
1011
U11D
74HC14
9 8
U11B
74HC14
43
J10
089-NV98B
J11
089-NV98B
SHEET DATE DESIGN
DRAWING_No.TITLE
XCONFIGB
OSCX
PORSELB
PULLUPB
DIPSWB0
DIPSWB1
DIPSWB2
DIPSWB3
DIPSWB5
DIPSWB7
DIPSWB4
DIPSWB6
SWB
LEDB0
LEDB1
LEDB2
LEDB3
LEDB4
LEDB5
LEDB6
LEDB7
PLLENAB
XCONFIGB
IOB
2
IOB
4
IOB
6
IOB
8
IOB
10
IOB
12
IOB
14
IOB
16
IOB
18
IOB
20
IOB
22
IOB
24
IOB
26
IOB
28
IOB
30
IOB
32
IOB
34
IOB
36
IOB
38
IOB
40
IOB
42
IOB
44
IOB
46
IOB
48
IOB
50
IOB
52
IOB
54
IOB
56
IOB
58
IOB
60
IOB
62
IOB
1
IOB
3
IOB
5
IOB
7
IOB
9
IOB
11
IOB
13
IOB
15
IOB
17
IOB
19
IOB
21
IOB
23
IOB
25
IOB
27
IOB
29
IOB
31
IOB
33
IOB
35
IOB
37
IOB
39
IOB
41
IOB
43
IOB
45
IOB
47
IOB
49
IOB
51
IOB
53
IOB
55
IOB
57
IOB
59
IOB
61
IOB
63
IOB
0
PORSELB
PULLUPB
PLLENAB
IOB1
IOB2
IOB3
IOB4
IOB5
IOB6
IOB9
IOB10
IOB7
IOB8
IOB11
IOB12
IOB13
IOB14
IOB15
IOB16
IOB17
IOB18
IOB19
IOB20
IOB21
IOB23
IOB22
IOB25
IOB24
IOB27
IOB26
IOB29
IOB28
IOB31
IOB30
IOB32
IOB33
IOB34
IOB35
RESETB
IOB50
IOB49
IOB48
IOB47
IOB46
IOB44
IOB45
IOB42
IOB43
IOB40
IOB41
IOB38
IOB39
IOB53
IOB54
IOB55
IOB56
IOB57
IOB58
IOB59
IOB60
IOB61
IOB62
IOB63
LEDB0
LEDB1
LEDB2
LEDB3
LEDB4
LEDB5
LEDB6
LEDB7
DIPSWB0
DIPSWB1
DIPSWB2
DIPSWB3
DIPSWB4
DIPSWB5
DIPSWB6
DIPSWB7
SWB
FPGA_DO0
FPGA_DO4
FPGA_DO5
FPGA_DO9
FPGA_RSV1
FPGA_A2
FPGA_A6
FPGA_A7
FPGA_DI15
FPGA_DO3
FPGA_DO8
FPGA_DO11
FPGA_DO12
FPGA_RSV0
FPGA_A1
FPGA_A5
FPGA_A9
FPGA_DI1
FPGA_DO1
FPGA_DO2
FPGA_DO7
FPGA_DO6
FPGA_DO10
FPGA_DO15
FPGA_A11
FPGA_RSV2
FPGA_A0
FPGA_A8
FPGA_A10
FPGA_DI2
FPGA_DI9
FPGA_DO14
FPGA_A12
FPGA_DI5
FPGA_DI10
FPGA_DI12
FPGA_A13
FPGA_WR
FPGA_DI4
FPGA_DI8
FPGA_DI7
FPGA_DI11
FPGA_A3
FPGA_RD
FPGA_A15
FPGA_DI3
FPGA_DI6
FPGA_DO13
FPGA_DI13
FPGA_A4
FPGA_DI0
FPGA_DI14
MEMD2
MEMD3
MEMD4
MEMD5
MEMD6
MEMD7
MEMUB
MEMD14
MEMD15
MEMD13
MEMD0
MEMD1
MEMD11
MEMD10
MEMD9
MEMD8
MEMD12
MEMA0
MEMA18
MEMA9
MEMA1
MEMA8
MEMA15
MEMWR
MEMA16
MEMA10
MEMA7
MEMA2
MEMA14
MEMA11
MEMA13
MEMA17
MEMA3
MEMA5
MEMA12
MEMCS
MEMA4
MEMA6
MEMLB
MEMOE
IOB0
IOB52
IOB51
IOB36
IOB37
FPGA_A14
MEMD26
MEMD24
MEMD25
MEMCS1
MEMD30
MEMD21
MEMD22
MEMD31
MEMD20
MEMD23
MEMD29
MEMD19
MEMD28
MEMD18
MEMD27
MEMD17
MEMD16
USBRD
RX
RTS
USBPWREN
USBWR
USBD7
USBD6
USBRXF
USBTXE
USBD3
CTS
USBD2
USBD1
USBD0
TX
USBD5
USBD4
200ms遅延
BANK2
BANK4/9
未実装
BANK5
GNDガード
BANK6
BANK8
E3-93994-1暗号処理モジュール
アルテラ版
BANK7/10
4 4
ペアで引き出し
BANK3
CONFIG
EEPインシステムプログラム用MSEL[3..0]は1000か1101
TCKTDO
TDI
TMS
JTAG書き込み用
ICソケットを使用
GNDガード
GND TPペアで引き出し
VIOB
VIOBVIOB
VIOB VIOB
VIOB
R11
9
10k
C15
1
1000
p
R94
22
R93
22
R77
1k R87
10k
VIOB
C15
0
0.1u
VIOB
C15
5
0.1u
C14
2
0.1u
V12B
R88 1k R89 1k
R11
3
10k
R11
4
10k
R11
7
10k
R11
8
10k
VIOB
C14
1
47u
C14
9
47u
U10HEP2S30F672C5N
AE25TDI
AD24TMS
AB22TCK
AB21TRST
AA20nCONFIG
Y19VCCSEL
AC23IO
AC21IO_CS
AA19IO_CLKUSR
AB20IO_nWS
AC20IO
V18IO
W18IO
AB19IO
Y18IO
AC19IO
AA18IO
AE24IO
AD23IO
AC22VREFB8N0
AF24IO
AE22IO
AD22IO
AE23IO
V17IO
W17IO
AB18IO
AF22IO
AE21IO
AD21IO
AD20IO
AF21IO
AE20IO
V16IO
Y17IO
AC18IO
AA17IO
AF20IO
AE19IO
AD19IO
AD18IO
AF19IO
AE18IO
W16IO
Y16IO
AB17IO
AF18IO
AE17IO
AD17IO
AF17IO
AD16IO
AE16IO
AC16VREFB8N1
AC17IO
AA16IO
W15IO
AB16IO
AC15IO
V14IO
AD15IO
Y15IO_RUnLU
AA14IO_DEV_OE
AA15IO_DEV_CLRn
AB15IO_nCS
AB14IO_CLK5n
AC14IO_CLK5p
AE15IO_CLK4n
AF15IO_CLK4p
U16
BD45292G
1ER
2SUB
3GND
4VOUT
5VDD
SW8
A6S-8104
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
VIOB
R78
10k
R80
10k
R79
10k
R81
10k
R86
10k
SW9
B3S-1000VIOBR102 330R103 330R104 330R105 330R106 330R107 330R108 330R109 330
D14 SML-210MTT86
D15 SML-210MTT86
D16 SML-210MTT86
D17 SML-210MTT86
D18 SML-210MTT86
D19 SML-210MTT86
D20 SML-210MTT86
D21 SML-210MTT86
U15
EPCS16SI8N
1nCS
2DATA
3VCC
4GND
5ASDI
6DCLK
7VCC
8VCC
C144
0.1u
R85
10k
R83
10k
R84
10k
R82
10k
R91
10k
R90 1k
VIOB R92
22
VIOB
R125
22
C14
0
0.1u
C15
4
47u
V12B
V12B
TP39 TP40
F12
BLM18AG102SN
C15
3
0.1u
C14
8
0.1u
F11
BLM18AG102SN
VIOB
R11
6
10k
VIOB
VIOB
C152
1u
U10CEP2S30F672C5N
A15IO_CLK14p
B15IO_CLK14n
C15IO_CLK15p
D15IO_CLK15n
E15IO_PGM2
F15IO_PGM1
F14IO_PGM0
G14IO_ASDO
E14IO_nCSO
F16IO_CRC_ERROR
E16IO_DATA0
G15IO_DATA1
D14IO
D17IO
J14IO
E17IO
H15IO
D16VREFB3N0
B16IO
C16IO
A17IO
C17IO
B17IO
A18IO
D18IO
G16IO
F17IO
J15IO
B18IO
A19IO
C18IO
C19IO
B19IO
A20IO
K16IO
G17IO
H16IO
B20IO
A21IO
C20IO
C21IO
B21IO
A22IO
E18IO
K17IO
H17IO
J17IO
B23IO
C22IO
B22IO
A24IO
C23IO
B24IO
F18IO
D22VREFB3N1
G18IO
H18IO
K18IO
D23IO
J18IO
E19IO_DATA2
D20IO_DATA3
G19IO_DATA4
D19IO_DATA5
E20IO_DATA6
F20IO_DATA7
F19IO_RDYnBSY
D21IO_INIT_DONE
E21nSTATUS
E22nCE
C24DCLK
B25CONF_DONE
CN
10 A1-64PA-2.54DSA(71)
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63646260585654525048464442403836343230282624222018161412108642
TP37 TP38TP35 TP36
F9
BLM18AG102SN
R71
10k
CN12
XG
4C-1
031
2
4
6
8
109
7
5
3
1
TP45
SW10
A6S-8104
16
15
14
13
12
11
10
9 8
7
6
5
4
3
2
1
R95
10k
VIOB
R96
10k
R12
310
k
R97
10k
R98
10k
R99
10k
R10
010
k
VIOBCN11
XG
4C-1
031
2
4
6
8
10 9
7
5
3
1
R12
1
10k
VIOB
R12
0
470
VIOB
D22
SML-210MTT86
R122
1k
V12B
C13
5
47u
C13
8
47u
C13
7
0.1u
V12B
C13
4
0.1u
F7
BLM18AG102SN
F8
BLM18AG102SN
C14
7
0.1u
C14
6
47u
C14
5
0.1u
V12B
F10
BLM18AG102SN
U10GEP2S30F672C5N
W13GNDA_PLL6
W14GNDA_PLL6
Y13VCCA_PLL6
Y14VCCD_PLL6
V13VCC_PLL6_OUT
AC13IO_CLK7p
AB13IO_CLK7n
AE14IO_CLK6p
AD14IO_CLK6n
AE13IO_PLL6_OUT1p
AD13IO_PLL6_OUT1n
AF12IO_PLL6_OUT0p
AE12IO_PLL6_OUT0n
AD12IO_PLL6_FBp/OUT2p
AC12IO_PLL6_FBn/OUT2n
Y12IO
W12IO
AA12IO
AE11IO
AE10IO
AC11VREFB7N0
AC10IO
AF10IO
AD11IO
AD10IO
V12IO
AB12IO
W11IO
Y11IO
AF9IO
AE9IO
AD8IO
AC8IO
AC9IO
AD9IO
AA11IO
AB11IO
AA8IO
V10IO
AF8IO
AE8IO
AC7IO
AD7IO
AF7IO
AE7IO
W10IO
Y10IO
AA10IO
AF6IO
AE6IO
AC6IO
AE5IO
AF5IO
AD6IO
AC5VREFB7N1
W9IO
AA9IO
Y9IO
AB8IO
AD5IO
AE4IO
AD3IO
AD4IO
AF3IO
AE3IO
AC4IO
AB7IO
AB9IO
AB10IO
Y8PORSEL
AE2nIO_PULLUP
AB6PLL_ENA
AA7GND
AB5nCEO
TP43
VIOB
J5
089-NV98B
R11
2
1k
L13
ELC
0607
RA
-100
J1R
6-P
F
X2
SG-8002DC24.000M-PCB
1OE
4GND
5O
8VDD
C14
3
0.1u
U10B
EP2S30F672C5N
C26IO
C25IO
H20IO
H19IO
D25IO
D24IO
G21IO
G20IO
E24IO
E23IO
F22IO
F21IO
E26IO
E25IO
H22IO
H21IO
G22VREFB2N0
F24IO
F23IO
J22IO
J21IO
F26IO
F25IO
J20IO
J19IO
G24IO
G23IO
K22IO
K21IO
H24IO
H23IO
K20IO
K19IO
J24IO
J23IO
L23IO
L22IO
K24IO
K23IO
L21IO
L20IO
G26IO
G25IO
L19IO
L18IO
H26IO
H25IO
M24IO
M23IO
N23VREFB2N1
J26IO
J25IO
M22IO
M21IO
L25IO
L24IO
N22IO
N21IO
K26IO
K25IO
N20IO
N19IO
M26IO
M25IO
M20IO
M19IO
P24IO_CLK0n
P25IO_CLK0p
N24CLK1n
N25CLK1p
L14
ELC
0607
RA
-100
J1R
6-P
F
C13
6
0.1u
C13
9
0.1u
R115
47
TP44
U10A
EP2S30F672C5N
P19VCCD_PLL1
P21VCCA_PLL1
N18GNDA_PLL1
P18GNDA_PLL1
R19GNDA_PLL2
R20GNDA_PLL2
R21VCCA_PLL2
P20VCCD_PLL2
R26IO_CLK2p
R25IO_CLK2n
P23CLK3p
P22CLK3n
T25IO
T24IO
R24IO
R23IO
U26IO
U25IO
U24IO
U23IO
T23VREFB1N0
V26IO
V25IO
V24IO
V23IO
W26IO
W25IO
W22IO
W21IO
Y26IO
Y25IO
V22IO
V21IO
AA26IO
AA25IO
U22IO
U21IO
AA24IO
AA23IO
T20IO
T19IO
Y24IO
Y23IO
T22IO
T21IO
W24IO
W23IO
U20IO
U19IO
Y22VREFB1N1
AB26IO
AB25IO
V20IO
V19IO
AB24IO
AB23IO
AA22IO
AA21IO
AC25IO
AC24IO
Y21IO
Y20IO
AD26IO
AD25IO
W20IO
W19IO
BANK1
U10D
EP2S30F672C5N
E5TEMPDIODEp
F5TEMPDIODEn
F6TDO
F7MSEL3
E6MSEL2
B2MSEL1
G8MSEL0
E7IO
E8IO
D4IO
B3IO
A3IO
C4IO
C3IO
B4IO
C5IO
F8IO
J9IO
G9IO
F9IO
H9IO
D5VREFB4N0
C6IO
A5IO
B5IO
D6IO
B6IO
A6IO
K10IO
F10IO
H10IO
E9IO
B7IO
A7IO
C7IO
D7IO
B8IO
A8IO
J10IO
G10IO
E10IO
K11IO
E11IO
C9IO
D9IO
D8IO
C8IO
B9IO
A9IO
G11IO
H11IO
F11IO
J11IO
C10IO
C11IO
A10IO
D10IO
D11VREFB4N1
B10IO
B11IO
E12IO
F12IO
F13IO
D12IO_PLL5_FBn/OUT2n
C12IO_PLL5_FBp/OUT2p
B12IO_PLL5_OUT0n
A12IO_PLL5_OUT0p
E13IO_PLL5_OUT1n
D13IO_PLL5_OUT1p
C13IO_CLK12n
B13IO_CLK12p
C14IO_CLK13n
B14IO_CLK13p
H12VCC_PLL5_OUT
H14VCCD_PLL5
G12VCCA_PLL5
H13GNDA_PLL5
J13GNDA_PLL5
U10EEP2S30F672C5N
N2CLK11p
N3CLK11n
P2IO_CLK10p
P3IO_CLK10n
N7IO
N6IO
M2IO
M1IO
P5IO
P4IO
L3IO
L2IO
N5IO
N4IO
K2IO
K1IO
M6IO
M5IO
J2IO
J1IO
G5VREFB5N0
M8IO
M7IO
K4IO
K3IO
L9IO
L8IO
H2IO
H1IO
L7IO
L6IO
G2IO
G1IO
M4IO
M3IO
J4IO
J3IO
L5IO
L4IO
H4IO
H3IO
K9IO
K8IO
G4IO
G3IO
K7IO
K6IO
F4IO
F3IO
J8IO
J7IO
F2IO
F1IO
K5VREFB5N1
H8IO
H7IO
E4IO
E3IO
J6IO
J5IO
E2IO
E1IO
H6IO
H5IO
D3IO
D2IO
G7IO
G6IO
C2IO
C1IO
U11A
74HC14
12
U11F
74HC14
1312
U10FEP2S30F672C5N
Y7IO
Y6IO
AD2IO
AD1IO
AA6IO
AA5IO
AC3IO
AC2IO
W8IO
W7IO
AB4IO
AB3IO
W6IO
W5IO
AA4IO
AA3IO
Y5VREFB6N0
V8IO
V7IO
Y4IO
Y3IO
V6IO
V5IO
W4IO
W3IO
U8IO
U7IO
AB2IO
AB1IO
T7IO
T6IO
AA2IO
AA1IO
U6IO
U5IO
Y2IO
Y1IO
V4IO
V3IO
W2IO
W1IO
T9IO
T8IO
V2IO
V1IO
R5VREFB6N1
U4IO
U3IO
U2IO
U1IO
T5IO
T4IO
T3IO
T2IO
R4CLK9n
R3CLK9p
R2IO_CLK8n
R1IO_CLK8p
P7VCCD_PLL3
R6VCCA_PLL3
R7GNDA_PLL3
R8GNDA_PLL3
N8GNDA_PLL4
N9GNDA_PLL4
P8VCCA_PLL4
P9VCCD_PLL4
35
*1 The copyright of this product belongs to the National Institute of Advanced Industrial Science and Technology (AIST), and the copyright of this manual belongs to the Ministry of Economy, Trade and Industry (METI).
*2 Copying this manual, in whole or in part, is prohibited without written permission from METI.
*3 Only personal use of this manual is granted. Any other use of this manual is not allowed without written permission from METI.
*4 The specifications of this product are subject to revision without notice.
Technical inquiries: National Institute of Advanced Industrial Science and Technology (AIST)
Research Center for Information Security (RCIS)
Akihabara-Daibiru 11F Room 1102
1-18-13 Sotokanda, Chiyoda-ku, Tokyo 101-0021, Japan
TEL: +81-3-5298-4722
FAX: +81-3-5298-4522