size reduction in low frequency square wave ballast for high intensity discharge lamps using soft...
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8/21/2019 Size Reduction in Low Frequency Square Wave Ballast for High Intensity Discharge Lamps Using Soft Saturation M…
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Size Reduction in Low Frequency Square Wave
Ballasts for High Intensity Discharge Lamps using
Soft Saturation Magnetic Material and Digital Control
TechniquesRyan. W. Schnell
*, Regan A. Zane
*, Francisco J. Azcondo
**
*Department of Electrical, Computer, and Energy Engineering, University of Colorado, Boulder, CO USA**ETS de Ingenieros Industriales y de Telecomunicación. Universidad de Cantabria, Santander, Spain
Email: {ryan.schnell, zane}@colorado.edu, [email protected]
Abstract — This paper presents an approach to reduce the size of low frequency square wave (LFSW) ballasts by using a
single stage for resonant ignition and LFSW operation together with soft saturation magnetic material and digital control
techniques. Inductor design constraints are developed to leverage the nonlinear inductor behavior and achieve both size
reduction and desirable performance in lamp ignition, warm up and normal operation modes. The digital controller
provides multiple functions, including (1) a phase controlled resonant sweep to achieve reliable lamp ignition and device
protection with zero voltage switching (ZVS) despite the nonlinear tank inductance, (2) lamp ignition detection and rapid
transition to LFSW mode for lamp warm-up, (3) fast LFSW polarity transitions with optimal timing control for acoustic
resonance free operation, and (4) two loop feedback control. A fast current control loop limits and stabilizes the lamp
current and rejects large ripple from the power factor correction (PFC) stage in order to reduce the size of the PFC output
capacitor. A slow power control loop rejects variations in the lamp characteristics during warm-up and lamp aging.
Experimental results are presented showing successful ignition and operation of a 150 W HID lamp.
Index Terms – Electronic ballast, acoustic resonance, HID, LFSW, soft saturation, phase controlConference Presentation: This manuscript is based on prior results from two conference presentations:
R. Schnell, J. Diaz, Ch. Branas, F. Azcondo, R. Zane, “Digital phase control of an integrated resonant ignitor using a
soft saturation core for high intensity discharge lamps,” in Proc. IEEE Appl. Power Electron. Conf. Expo.,Washington, DC, Feb. 2009, pp. 1526 – 1531.
R. Schnell, R. Zane, “HID lamp driver with phase controlled resonant-mode ignition detection and fast transition toLFSW warm-up mode,” in Proc. IEEE Workshop on Control and Modeling for Power Electronics, COMPEL 2010,
Boulder, CO, Jun. 2010, pp. 1 – 8.
Corresponding author:
Professor Regan Zane
ECEE 1B55, UCB 425Department of Electrical, Computer, and Energy Engineering
University of ColoradoBoulder, CO 80309-0425 USA
Phone: (303) 735-1560
Fax: (303) 492-2758Email: [email protected]
Acknowledgments: This work was supported by the National Science Foundation under Grant No. 0348772 and the SpanishMinistry of Science through the project CICYT - FEDER- TEC2011-23612.
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I. I NTRODUCTION
High intensity discharge (HID) lamps require ballasts for operation from typical ac lines. These ballast circuits must
accomplish ignition of the lamp, warm-up of the lamp to full power, and stable operation at a desired power level.
Ignition voltages, warm-up characteristics and requirements for stable operation of HID lamps are lamp dependent due
to variables including gas composition, electrode design and age, arc tube length, and internal pressure [1-4]. A typical
ignition of an HID lamp requires voltages around or greater than 3.5 kV, while the stable full power operating lamp
voltages are closer to 100 V. Methods for obtaining ignition include adding an external ignitor either in series or
parallel with the lamp [1,5-9], using an added converter stage for resonant ignition [1,5,10-11], and integration of stages
[12]. The required ignition voltage can be reduced using the resonant approach by providing a controlled ramp rate of
the applied lamp voltage during ignition [10-11,13]. HID lamps exhibit a relatively long warm up time of many minutes
while the metal salts within the arc tube are coming up to a steady-state temperature and the equivalent lamp impedance
changes over a wide range, e.g. 10 - 150 .
Two primary challenges in maintaining a stable arc in HID lamps during both warm-up and steady-state operation
are due to instabilities associated with the lamp impedance and a phenomenon called acoustic resonance (AR). The
lamp impedance includes negative incremental impedance at low frequencies that requires current source behavior or at
least a high output impedance from the ballast circuit in order to stabilize the arc [2-3]. The AR phenomenon exists due
to pressure waves forming within the arc tube and can cause visible flickering, arc extinguishment, and in extreme
cases catastrophic bulb failure due to excessive stresses [4-6,9,10-11,14-15]. Techniques to mitigate the effects of AR
include operating at high frequencies away from AR bands, high frequency operation with white noise injection, and
low frequency square wave (LFSW) operation [4-6,8-10,16]. The high frequency approaches are highly lamp and
operating point dependant, and are not robust against lamp-to-lamp and lifetime variations. The LFSW approach has
proven robust against the effects of AR modes so long as the harmonics of lamp power are maintained below 5% of the
fundamental [4,14].
This paper presents an approach to reduce the size of LFSW ballasts with resonant ignition while meeting all of the
operating challenges listed above. The overall system diagram for the ballast is shown in Fig. 1, where the system
topology was presented in [10] and includes a front-end power factor correction (PFC) stage followed by a single
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integrated LFSW and resonant stage. This work provides design details for practical application of the topology in [10]
with reduced ballast size by using soft saturation magnetic materials and digital control techniques. A single inductor is
built using soft saturation core material to accomplish two functions: a resonant inductor storing large ac magnetic flux
with zero dc component during ignition and as a dc filter inductor with large dc component and small ac magnetic flux
in buck mode operation. The digital controller enables reliable use of the soft saturation material through use of a phase
controlled ignition, multi-mode control, and current and power loop regulation. The operating modes and requirements
associated with the ballast topology are presented in Section II, followed in Section III by the motivation for use of soft
saturation core material and details on the resonant tank design. Section IV presents the digital controller design and
experimental results are given in Section V, demonstrating successful ignition and operation of a 150 W HID lamp.
Figure 1. HID ballast system diagram, including a front-end PFC stage and combined LFSW and resonant stage.
II. OPERATING MODES AND R EQUIREMENTS
The operating modes from the topology of Fig. 1 presented in [10] are reviewed here with emphasis on the design
requirements associated with each of the improvements developed in this paper. The PFC stage operates
independently and is designed to regulate the average voltage vin at the filter capacitor C in. A first requirement for the
follow-on stage is to allow relatively large voltage ripple on vin, e.g. ±20%, in order to reduce the size of the capacitor
C in. The second stage comprises a full bridge with switches A through D and a single resonant filter and operates in
two modes, resonant mode and LFSW mode, by altering how the switches are driven. A single sense resistor, R s, is
used for multiple purposes, including lamp ignition control and detection, inductor current control, and lamp power
V AC
PFC
+
– FPGA
Load
vlamp+ -
Gate D
Gate C Gate A
Gate B
IR2110
IR2110Gate A
Gate B
Gate C
Gate D
i Lv
1 v2
C
L
RS
v RS
+- ADC
ADC
R1
R2
C in
vin
+
-
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regulation [17]. The digital controller senses the voltage across R s and a scaled vin and generates the four gate drive
signals. The ballast operates in two modes: resonant mode and LFSW mode.
The resonant mode is used to generate the high voltages required for lamp ignition and for a brief time period after
ignition to allow the arc to stabilize. During this mode, all gate signals are driven with 50% duty cycle as a standard
full-bridge resonant converter with 180º phase shift between v gsA and v gsC as shown in Fig. 2. The transfer function
from the tank voltage, vtnk = v1 – v2, to the lamp voltage is
2
2
1
1
)(
)()(
oo
tnk
lamp
s
Q
s sv
sv sG
,
where the resonant frequency, ωo, and quality factor, Q, are given by
L
Z Q
LC o
lamp
o
,1 , (2)
and Z lamp is the lamp impedance. The input impedance of the tank at vtnk is
lamp
lamp
stnk sCZ
Z
sG Z
1)(
1)(
.
Figure 2. Resonant mode gate drive switching patters for switches A through D.
V gsA
t
t
t
t
T/2 T 3T/2
V gsB
V gsC
V gsD
on off on
on
on
on
on
off off
off off
off
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In this mode, the converter is operated at a switching frequency, f s = 1 / T , that is close to and above resonance. Prior
to ignition, the magnitude of the lamp impedance is relatively large, e.g. 1.5 k , resulting in a resonance with a high Q
factor. Post-ignition, the impedance of the lamp drops dramatically, and may operate for a short time, e.g. tens of
milliseconds, in short circuit and rectifying modes as the arc stabilizes. Once the arc is stabilized, the lamp impedance
can be modeled as an equivalent load resistance at the frequencies of interest above resonance, and varies over a wide
range during the warm-up time, e.g. 10 to 150 . The significant drop in impedance of the lamp dampens the Q factor
of the resonant tank immediately after ignition, as shown in Fig. 3.
Figure 3. Typical input impedance of the resonant tank before (solid) and after (dashed) ignition.
Ignition of the lamp is performed by sweeping the frequency of the resonant circuit from above resonance towards
resonance. This action creates an increasing voltage envelope with a resonant voltage waveform on the lamp until the
lamp ignites. A phase controlled sweep is used to provide a reliable and controlled sweep towards resonance,
independent of variations in the resonant tank and load parameters [18]. The phase control approach provides
protection to all power semiconductor devices through the entire ignition sequence by forcing the switching frequency
to stay higher than the resonant frequency. As shown in Fig. 3, operation above resonance ensures a positive phase in
the input impedance and an associated phase lag between i L and the applied voltage v1 – v2 in Fig. 1, which imposes a
soft switching zero voltage turn-on transition for all switches assuming the capacitance at switch nodes v1 & v2 are
sufficiently small so that the soft transition completes during the gate drive dead-time [19]. The key parameter of
interest here is the resonant inductor i L current required to achieve lamp ignition compared to the current required after
20
30
40
50
60
70
M a g n i t u d e (
d B )
Bode Diagram
101
102
103
104
105
-45
0
45
90
-90
Frequency (Hz)
P h a s e ( d e g )
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ignition and for normal operation. As seen in Fig. 3, there is a large variation in tank input impedance before and after
ignition. This translates to a very large resonant current only during lamp ignition to generate the large peak voltage
required, whereas the post ignition and normal operating currents are comparatively lower. The result is a significant
impact on the inductor design constraint, requiring safe handling of 3 to 10 times the nominal lamp operating current,
generally corresponding to a significantly larger inductor magnetic core.
The next operating mode is the LFSW mode, which is well known and commonly used in HID ballasts. The
motivation for this mode is to avoid exciting the AR phenomenon and associated unstable behavior [4,9,14]. The ideal
goal is to operate the lamp with constant power, resulting in no harmonic power applied to the lamp at the frequencies
of potential AR. One solution is to drive the lamp with DC. However, this results in a cataphoretic effect, or migration
of electrode material, due to the DC electric field that may degrade lamp life. LFSW operation ideally achieves the
same constant output power, but with alternating the polarity of the applied voltage at a low frequency. The resulting
operating lamp waveforms are depicted in Fig. 4, where the non-zero slopes in the polarity transitions result in spikes in
the lamp power at the twice the LFSW frequency. The primary requirement in the LFSW is to perform sufficiently fast
LFSW transitions to limit the harmonic power content. If each harmonic peak is kept below 5% of the total lamp
power, AR is not observed by the user and there is no risk of damaging the lamp [15].
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Figure 4. LFSW waveforms showing harmonic content due to LFSW polarity transitions
The next requirement in the LFSW mode is to maintain a high output impedance to counter the negative
incremental impedance of the lamp at low frequencies and maintain a stable arc in the lamp. This is performed, as is
typical in LFSW ballasts, using feedback with current-mode control to regulate the lamp current. In the integrated
topology of Fig. 1, the resonant stage filter is re-used as a buck filter and the switch gate drives are modified to operate
the stage alternately as a positive or negative buck converter, as shown in Fig. 5. Pulse-width modulation (PWM)
control is used to regulate the current within each LFSW half-period. IGBTs are used for switches A and C instead of
MOSFETs, together with anti-parallel connected fast recovery diodes. The purpose is to avoid the high losses and
failure that may occur with the high reverse recovery losses of the MOSFET body diode during PWM switching. The
PWM frequency, f PWM , is selected to be significantly higher than the resonant frequency, ωo, to achieve low current
ripple and harmonic power at the PWM frequency and control loop bandwidth sufficiently high to counter the negative
incremental impedance region of the lamp. Transitions between the positive and negative buck modes occur at 200 Hz
well below the location of any acoustic resonant frequency and in order to limit the possibility of exciting visible flicker
i Lam p
t
v l a m p
t
V pk
I pk
T
p lamp
t
T/2
V pk * I pk
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to the lamp, as the human responsiveness to light intensity perturbations peaks between 2-75 Hz. The buck converter
operates in continuous conduction mode (CCM) with low ripple current in both the positive and negative buck modes.
Figure 5. LFSW mode gate drive switching patters for switches A through D.
A final challenge in design for LFSW mode operation is associated with the lamp warm-up time. Since this
time can require up to multiple minutes for an HID lamp, it is desirable to transition as soon as possible after ignition
from resonant mode to LFSW mode in order to avoid potential instabilities from AR. This requires both the fast LFSW
polarity transitions and the buck converter PWM controller to operate reliably over the wide range of equivalent
resistive loads presented by the lamp at high frequencies. It also requires a reliable and relatively fast detection of lamp
ignition while in the resonant mode.
Combining the above discussions, the key requirements of interest for the resonant tank and controller design of
Fig. 1 are:
Operate with large ripple on the input voltage, vin, to reduce the size of the PFC filter capacitor C in
Perform resonant mode lamp ignition, with a controlled sweep on the lamp voltage to reduce the required
peak voltage
V gsA
t
t
t
t
T/2 T 3T/2
V gsB
V gsC
V gsD
PWM
PWM PWM
Off
Off Off
Off Off
On
OnOn
Off
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Use a single inductor L and associated capacitor C that can withstand a short period of very large ac current
(3 to 10 times nominal), while optimizing size and efficiency for nominal buck mode operation with a dc
offset and small ac ripple
Detect lamp ignition and transition after a short time to LFSW mode
Operate in LFSW mode with fast polarity transitions and PWM current-mode control over up to a 15:1
range of load resistances
III. R ESONANT TANK DESIGN WITH SOFT SATURATION MAGNETIC MATERIAL
The primary motivation for using soft saturation materials is the requirement for momentary very high ac currents
during ignition and very low ac currents with a dc offset during normal buck mode operation. A typical hard saturation
core made of ferrite material has a hard saturation limit around 0.4 T (4,000 Gauss) while a soft saturation material such
as Kool Mu from Magnetics Inc. has a saturation of around 1 T [20-21]. Designs with a hard saturation material must
include sufficient margin to avoid the possibility of reaching the hard saturation limit, whereas designs with soft
saturation materials allow significant operation within the soft saturation region. The traditional trade-off is in
efficiency, since operation in the soft saturation region with large ac currents results in a significant increase in core loss
when compared to a hard saturation material. However, in this application, the trade-off is not important since the
ballast only operates with large ac currents for a short time during ignition, and the soft saturation material has high
efficiency in the buck mode with small ac currents. Thus, soft saturation magnetic materials appear to provide an
opportunity for significant size reduction in the magnetics design of the topology in Fig. 1 without sacrificing
efficiency. However, due to the nonlinear behavior in the soft saturation region, the soft saturation material cannot
simply be used as a drop in replacement to reduce size in prior designs based on hard saturation materials.
For comparison, two inductors were designed to meet the requirements for lamp ignition and normal buck mode
operation, one with soft saturation material and one with hard saturation material. For the soft saturation material, a
toroidal core was constructed of 214 turns, AWG #28, on a Kool Mu 0077356A7 core. The inductor has L = 1.35 mH
with 1 A dc bias and small ac current applied to it. For the hard saturation material, the design is 118 turns, AWG #28,
on an EE50 core, N27 material, with a 7 mm air gap, resulting in L = 1.3 mH at 0 dc bias. Measured BH curves for the
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two cores are shown in Fig. 6, and a photograph of the two cores side-by-side is shown in Fig. 7. Both cores exhibit
similar inductances with no dc bias or low incident ac current. Each of the inductors is designed for similar total losses
during normal buck mode operation. As depicted in Figs. 6 and 7, the hard saturation core requires a large air gap to
limit the maximum flux density during the worst case condition near lamp ignition below the saturation level,
B sat ≈ 0.4 T. The advantage of the soft saturation core is seen in the higher saturation flux density, B sat ≈ 1 T. The
trade-offs in using the soft saturation design are in the complexity of winding a toroidal core vs. an EE core and in the
variable effective inductance present during resonant mode operation. As seen in (2), the inductance directly impacts
ωo and Q of the resonant tank.
Figure 6. Comparison of BH loops for soft (dashed line) and hard (solid line) saturation core designs.
-1.5 -1 -0.5 0 0.5 1 1.5
x 104
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
H [A/m]
B [
T ]
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Figure 7. Size comparison of hard (left) and soft (right) saturation cores
The effective inductance of the inductor is related to the magnetizing force in the core. The magnetizing force is
proportional to the current through the inductor. Fig. 8 shows the relative permeability of a 40µ Kool Mu soft
saturation core against the dc magnetizing force. The data presented by the manufacturer extends to a relative
permeability of 0.45, but with higher dc magnetizing force, the relative permeability approaches zero in a sigmoid
fashion. The result is that higher currents cause the effective inductance to decrease.
Figure 8. Relative permeabiliy vs. DC magnetizing force of Kool Mu 077356A7 core.
The design of the resonant tank needs to take into account the effects of the soft saturation core and the wide range
of equivalent (high frequency) lamp resistances associated with the warm up time. First, the 5% harmonic power
threshold for AR [14] is considered to set a lower limit on the PWM frequency, f PWM . This requires calculating the
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fundamental component of the tank voltage, vtnk , when operating in the buck mode and setting limits on the magnitude
of G( s) from (1) at the PWM frequency. The duty cycle of the buck converter in CCM assuming constant power control
with a resistive load is
in
lamplamp
V R P D
As a design example, the output of the PFC is selected to be V in = 200 Vdc ±20%, P lamp = 150 W, and
10 Ω
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The relationship given in (8) is important because the Q factor has a significant impact on the tank behavior during
the LFSW polarity transitions. An upper limit on Q must be set to limit overshoot and the resulting harmonic power.
The ratio (8) then determines how over-damped the response may be at the beginning of the warm up period. This limit
impacts the slope of the LFSW polarity transitions at Qmin and again affects the harmonic power. From (8), if the
inductor has a constant permeability as in the case of a hard saturation core that does not reach saturation, the Q factor
ratio is equal to the load ratio. With a variable inductance, this Q factor variance is reduced, allowing for more control
of the system damping. With the right core material and operating range, the Q factor variance can be reduced
significantly.
For the design example, the Kool Mu 40µ core material was selected based on an analysis of the permeability
characteristics for each material and matching to the constraints in (8). The target filter design is Q =0.7 to get a fast
but well damped response. As the lamp ages, its equivalent resistance increases and therefore the filter quality factor
also increases. Considering the lamp at the end of its lifetime, the quality factor is limited by design to Qmax = 1.2.
Once the core material has been selected, a parametric design search of available cores is imposed to search for a
combination of turns and magnetic path length that produces a Qmax of 1.2, a maximum DC magnetizing force of
150 A·turns/cm, and the smallest spread of Q for all operating points. In the parametric search, the maximum
inductance and capacitance was allowed to vary within ±20%, while keeping the natural resonant frequency,
f o = 20 kHz.
The toroidal Kool Mu 0077356A7 core was a best fit with a capacitance selection of C = 57 nF. The magnetic
path length is 5.88 cm and with 214 turns, produces an inductor with L = 1.35 mH with a 1 A dc bias, which is close
to the current expected at an equivalent lamp resistance of 150 . When the lamp resistance is 10 , the dc bias is
3.87 A, with an inductance of L = 0.7 mH. The largest Q factor spread is 10.8, which is a reduction by 28% compared
to the hard saturation case. A smaller change in Q factor across varying load resistances reduces the variability in
transition from LFSW buck modes. The closer the Q factors are to critically damped, the less harmonic content there
is in the lamp power due to these transitions. The newly designed soft saturation core inductor is 30 g with wire while
the hard saturation core inductor weighs 300 g representing a 90% reduction in core weight.
IV. DIGITAL CONTROLLER OPERATION
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The digital control circuit includes an FPGA controller, two Analog to Digital converters (ADC) and one
comparator, as shown in Fig. 1. The control algorithms are very simple and could be realized in an ASIC or many other
digital hardware solutions. The advantage of the digital controller is the ability to operate and transition easily between
each of the operating modes while meeting all of the performance requirements.
In the resonant mode prior to lamp ignition, the controller performs a phase controlled sweep towards resonance
[13,22]. The phase control approach guarantees operation above resonance for protection of the power semiconductor
devices through reliable zero-voltage switching (ZVS) operation and has the additional benefit of providing a smooth
controlled ramp in the lamp voltage despite the variations in inductance as the soft saturation core inductor increases
near resonance. This is a key benefit that enables use of the soft saturation core material for size reduction in an
application that traditionally depends on a predictable and stable resonant frequency.
Digital phase control is obtained by sensing the zero crossing of the inductor current and using this information and
past samples to calculate the desired gate timing for the next switching cycle. In order to force inductor current during
startup, the circuit is run at a constant frequency well above resonance. Since the LFSW circuit already requires a
sense resistor, R s, to regulate lamp current and power, the same sense resistor is used in resonant mode to detect the
inductor zero crossings for phase control through use of a high speed comparator. Since the resistor is outside of the
switch network, there are four zero crossings of sensed current at the sense resistor rather than the two actual zero
crossings of the inductor current per switching cycle. This is due to the fact that the sense resistor measures the
negative of inductor current i L for half of the switching cycle (when gates B and C are on). In order to account for this,
and to create better noise immunity, the comparator output for sensing the zero crossing is ANDed with the gate signal
for A and D with a 10 ns dead-time. Example waveforms are shown in Fig. 9.
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Figure 9. Typical waveforms for zero crossing detection: (a) tank voltage vtnk , (b) inductor current, i L, (c) sensed voltage, v Rs,(d) comparator output; (e) ANDed
comparator output.
The positive edge of the ANDed comparator output and the positive zero crossing of the inductor current occur at
the same time as shown in Fig. 9. The calculation of the control signal is performed by measuring the actual inductor
zero crossing. Calculation of T delay is performed by
m
mm
S
delay
nnT
nT 24
1212]1[
][
, (9)
where n is equal to the phase command given as a linear mapping of the phase command such that
120 mn , 0n corresponds to 0º, 12 mn corresponds to 90º, and m is the number of bits in n
[18].
Ignition detection is performed using the same information already available in the phase controller by measuring
the requested delay and comparing it to the previous total period. If the requested delay would result in a significantly
shorter period than previously seen according (9), then the lamp is considered post-ignition as this indicates a
significant decrease in lamp impedance. Ignition is then detected if
buffer S S T nT nT ][]1[ , (10)
(a)
(b)
(c)
(d)
(e)
T delay
T phase
T S
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wherebuffer T is a user defined amount in order to account for noise. Once ignition is detected, the converter is operated
at a constant frequency for a short time, e.g. 1 sec, to allow the lamp arc to settle prior to changing to LFSW mode.
Once in LFSW mode, the controller generates gate drive switching patters as depicted in Fig. 5 to regulate the
lamp current through PWM buck mode operation. The positive and negative buck converter modes operate in CCM
with current mode control. The inductor current is approximately equal to the lamp current, and is sampled by the
ADC across RS once per period near the end of each PWM on time. An important consideration for stability in design
of the feedback compensator of the current control loop is the lamp impedance. It has been shown that the incremental
impedance of discharge lamps can be modeled in the s-domain by an equivalent positive resistance at high frequencies,
Req, a negative incremental impedance at low frequencies, and dynamics that include a right-half-plane (RHP) zero z
and a pole p, with p > z [23]:
s
s R s Z p
z
eqinc
1
1
)( . (11)
The low frequency negative incremental impedance and RHP zero can cause instability if their effects are not
overcome by a high loop gain in the current loop for all frequencies below the worst-case, or maximum, pole
frequency p [1,5,10,13]. According to (11), a feedback loop with high gain is required to stabilize the lamp load at
frequencies below p, and the lamp load is naturally stable with Z inc( s) ≈ Req at frequencies above p. Thus, p
represents a lower bound on the required current loop bandwidth. Experimental lamp impedance measurements were
performed for high pressure sodium (HPS) HID lamps in [24] and fit to (11). It was shown that the worst case bound
on f p = ( p / 2 is approximately 3 kHz.
A second purpose for the current control loop is to reject the twice line frequency ripple in the input voltage, vin,
from the output of the PFC stage. Since the lamp equivalent load resistance does not vary significantly over an ac line
period during the warm-up time or over aging, regulation of the lamp current results in constant lamp power and
rejection of the input voltage ripple. The design constraints in (4) to (7) were used to select f PWM sufficiently high to
reduce the switching frequency ripple over the full range of duty cycles. Now, the current control loop must have
sufficiently high bandwidth to reject the target ±20% voltage ripple. In this case, the dominant specification is due to
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the lamp impedance, so the target current loop bandwidth is greater than or equal to 3 kHz. A PI compensator, C i, was
chosen for the current loop in order to provide the required bandwidth and zero steady-state error.
The lamp light output is dependent on the output power of the lamp, and therefore with changing lamp impedance,
the desired current of operation changes. It is therefore necessary to include an outer power loop compensator, C p, in
order to compensate the lamp for brightness. Due to the difficulty of accurately measuring the power at the lamp
terminals, and to allow re-use of the same multi-purpose current sense resistor R s, input voltage was chosen to be
measured so that the controller regulates input power. The input power is related to the output power by multiplying by
the estimated efficiency of the converter. The power loop controller was chosen to be a simple integral controller in
order to obtain zero steady-state error with a slow stable response. Figure 10 shows the block diagram of the two
compensation loops.
Figure 10. Two loop feedback control block diagram.
A discrete time model of the system operating as a positive buck was created using the method found in [25].
Compensation for the negative buck mode is symmetrical, and the transition between the two modes is performed open
loop. The current controller was designed to have a worst case phase margin of 60º. Using the SISOTOOL in Matlab,
the digital current loop compensator, C i, was designed as
1
z
Z z K C ii ,
where Z i = 0.8413, and K = 1.2935x10-3
.
The purpose of the power loop is to maintain constant power in the presence of variations in lamp impedance. The
bandwidth is constrained on the upper end to be much lower than the twice line frequency ripple of 120 Hz in order to
avoid conflicting with the current loop, and on the lower end by the fastest load variation expected during warm-up and
C i Gid
iref
d
DV inC p
pref piniout
I out V in
err ierr p
^
^ ^ ^ ^
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lamp aging. Of course lamp warm-up occurs much faster than lamp aging, and is the dominant constraint. A
conservative requirement assumes that the lamp warms up in one minute and varies linearly across its entire range of
equivalent resistances, which results in a lower limit of only 20 mHz. A target bandwidth of 3 Hz was selected as a
suitable value between these two limits. The integral power loop, C p, was designed using SISOTOOL as
1
1
z
K C p p ,
where K p = 1.91x10-4.
During LFSW polarity transitions, the feedback controller operates open-loop and an adaptive timing controller
takes over that minimizes the transition time. The purpose is to minimize the resulting power harmonics as depicted in
Fig. 4. For the example of a transition between positive buck mode to a negative buck mode, the current paths for the
positive buck mode are shown in Fig. 11. The current paths during polarity transition are shown in Fig. 12. Since the
converter operates in CCM, the inductor is guaranteed to have a positive current in the positive buck mode. For the
transition from positive to negative mode, the inductor current must transition from positive to negative. During the
time when the inductor current is positive, until it reaches zero, the current path goes through switches B and C , either
naturally through the diodes or through the switches which are controlled to be on. Effectively, this provides a 100%
duty cycle command for the first part of the transition. The controller measures this first time interval, T tran, from the
start of the transition to the inductor current zero crossing using the comparator on RS . This time is stored and
represents a direct measure of the time required to charge the inductor to the desired current level. The switches B and
C are then held on after the current zero crossing for the same time, T tran, in order to ramp up the inductor current to
the same magnitude but opposite polarity. At this time, the feedback controller with PWM operation takes back over
and the converter functions in the negative buck mode. This represents the fastest possible transition time with the
available switches, and the characteristic waveforms are shown in Fig. 13.
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Figure 11. Positive buck mode current paths.
Figure 12. Current path during positive to negative buck mode transition.
+ –
Load
vlamp+ -
Gate D
Gate C Gate A
Gate B
i Lv
1 v2
C
L
V g
RS
v RS
+-
On Time
Off Timei g
+
–
Load
vlamp+ -
Gate D
Gate C Gate A
Gate B
i Lv1 v2
C
L
V g
RS
v RS
+-
Transition Current Path
i g
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Figure 13. Fast transition control from positive to negative buck mode.
V. EXPERIMENTAL R ESULTS
A test bed was constructed using an input voltage of V in = 200 Vdc ±20%. Tank capacitance C = 57 nF and
inductance, L, was designed using a toroidal Kool Mu 0077356A7 core with 214 windings of 23 AWG wire. The high
side switches of the full bridge were implemented using HGTP12N6OA4D IGBTs and the low side switches used were
IRFP340 MOSFETs. IR2110 high-side gate drive ICs were used. A 300 ns dead time was programmed during the
resonant modes and transitions between positive to negative buck modes. The digital control was implemented on a
Spartan 3E development board with a clock frequency of 50 MHz. The comparator for inductor current zero crossing
was a 10 ns comparator, LT1016. An AD7822 8-bit half flash ADC was used to monitor inductor current. For the
ignition, a 1.1 s transition time was programmed where the controller operates in resonant mode after ignition detection.
A T buffer corresponding to an allowance of 2.84 µs was chosen. This allowed changes in frequency under approximately
Switch A
t
t
t
t
i L
t
Switch B
Switch C
Switch D
T tranT tran
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2 kHz to be ignored while operating near resonance. When the lamp impedance changes after ignition, the increase in
operating frequency under phase control is detected as the change is greater than 2 kHz.
The lamp ignition sequence is shown in Fig. 14 for a LU150/55/H/ECO HID lamp, and a zoom view around lamp
ignition shown in Fig. 15, demonstrating reliable ZVS operation. Warm-up operation is shown in Fig. 16.
Measurements were taken on a Tektronix DPO2014 scope with an 80 µs sampling period across six periods of LFSW.
The fast Fourier transform was used on the collected data, and a 5% threshold was imposed on all frequency bands of
the power spectrum. The lowest Q factor occurs at the minimum lamp resistance, or 10 as defined by the design
constraints. Without the fast LFSW polarity transitions, the largest power harmonic at 200 Hz was 10.17% of the total
power at this worst case operating point. With the fast transitions, the largest power harmonic once again found at
200 Hz was 4.67% of the total power. The experimental waveforms with fast transition control are shown in Fig. 17.
The FPGA clock frequency is 50 MHz, resulting in a 20 ns resolution for the digital counter in order to measure T tran.
Faster transitions result in lower harmonic power content delivered to the load, lowering the chance of AR as well as
the possibility of lamp re-ignitions. Efficiency of the converter was equivalent to a hard saturation version of the
converter, with both having a peak efficiency of around 93% at full power. The 5% harmonic power threshold
presented in [14] is met with the fast transition control. The resulting single sided Fast Fourier Transform (FFT) of the
lamp power is shown in Fig. 18. The experimental results demonstrate stable operation of each of the control loops, as
predicted by the models and analysis in Section IV.
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Figure 14. Ignition of an HPS lamp. Lamp current (CH2, 2 A/div), Lamp Voltage (CH3, 500 V/div).
Figure 15. Ignition of an HPS lamp. Lamp voltage (CH1, 2 kV/div), Inductor current (CH3, 10 A/div), Switch node voltage v1 (CH4, 100 V/div).
Phase lag
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Figure 156. Warm-up operation in LFSW. Lamp current (CH2, 5 A/div), Lamp voltage (CH3, 25 V/div), Lamp power (MATH, 100 W/div).
Figure 167. Steady-state operation transition from positive to negative buck in LFSW with fast polarity transition control: Gate B signal (CH1 50 V/div), Lamp
current (CH2 1 A/div), Lamp voltage (CH3 25 V/div).
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Figure 178. Single-sided FFT of lamp power (solid), 5% threshold (dotted).
VI. CONCLUSION
This paper presents an approach to reduce the size of LFSW ballasts by using a single stage for resonant ignition
and LFSW operation together with soft saturation magnetic material and digital control techniques. The design includes
the use of a soft saturation core inductor whose magnetic properties and the proposed dual mode operation result in size
and weight reduction of the overall system and provides a method for controlling Q factor variance across different
operating points as lamp impedance varies through the warm-up process and lamp aging. A phase controlled sweep in
the resonant mode is used to provide reliable lamp ignition and device protection with ZVS in the presence of the
nonlinear inductor behavior, and the same phase control signals are used to detect lamp ignition. A two loop control
design was employed wherein a fast inner loop stabilized the arc by providing current control to the lamp and rejected
120 Hz input voltage ripple to allow reduction in the size the PFC filter capacitor. An output power control loop with an
integral compensator was designed to reject slow variations in the lamp impedance during warm up and over lamp
aging. Experimental results for a 150 W HID lamp were presented to verify the design.
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