sjzl20080194-zxwn mgw media gateway hardware description

ZXWN MGWMedia Gateway

Hardware Description

Version 3.07

ZTE CORPORATION ZTE Plaza, Keji Road South, Hi-Tech Industrial Park, Nanshan District, Shenzhen, P. R. China 518057 Tel: (86) 755 26771900 800-9830-9830 Fax: (86) 755 26772236 URL: http://support.zte.com.cn E-mail: [email protected]

http://support.zte.com.cn/

mailto:[email protected]

LEGAL INFORMATION Copyright © 2006 ZTE CORPORATION. The contents of this document are protected by copyright laws and international treaties. Any reproduction or distribution of this document or any portion of this document, in any form by any means, without the prior written consent of ZTE CORPORATION is prohibited. Additionally, the contents of this document are protected by contractual confidentiality obligations. All company, brand and product names are trade or service marks, or registered trade or service marks, of ZTE CORPORATION or of their respective owners. This document is provided “as is”, and all express, implied, or statutory warranties, representations or conditions are disclaimed, including without limitation any implied warranty of merchantability, fitness for a particular purpose, title or non-infringement. ZTE CORPORATION and its licensors shall not be liable for damages resulting from the use of or reliance on the information contained herein. ZTE CORPORATION or its licensors may have current or pending intellectual property rights or applications covering the subject matter of this document. Except as expressly provided in any written license between ZTE CORPORATION and its licensee, the user of this document shall not acquire any license to the subject matter herein. ZTE CORPORATION reserves the right to upgrade or make technical change to this product without further notice. Users may visit ZTE technical support website http://ensupport.zte.com.cn to inquire related information. The ultimate right to interpret this product resides in ZTE CORPORATION.

Revision History

Date Revision No. Serial No. Edition

Feb. 4, 2008 R1.0 sjzl20080194 First edition

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Document Name ZXWN MGW Media Gateway Hardware Description

Product Version V3.07 Document Revision Number R1.0

Serial No. sjzl20080194 Equipment Installation Date

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Contents

About This Manual ............................................................ i

Purpose................................................................................ i Intended Audience ................................................................. i Prerequisite Skill and Knowledge .............................................. i What is in This Manual............................................................ i Conventions......................................................................... ii How to Get in Touch............................................................. iii

Declaration of RoHS Compliance..................................... v

Chapter 1.......................................................................... 1

MGW Cabinet.................................................................... 1

Overview .............................................................................1 MGW Cabinet Structure .........................................................1 Cabinet Cabling ....................................................................6 Technical Indices ..................................................................8

Chapter 2........................................................................11

Shelves and Busbar .......................................................11

Overview ........................................................................... 11

Power Distribution Shelf ................................................. 12

Fan Shelf ..................................................................... 14

Service Shelf ................................................................ 15

Hardware Structure............................................................. 15 Service Shelf Type .............................................................. 18 Typical Configuration........................................................... 19 Communication Relationship................................................. 20 DIP Switches on Service Shelf Backplane................................ 20

Control Shelf ................................................................ 22

Hardware Configuration ....................................................... 22 Functions and Principles....................................................... 24 Backplane.......................................................................... 25

Resource Shelf ............................................................. 26 Hardware Configuration........................................................27 Functions and Principles .......................................................29 Backplane ..........................................................................31

GE Switching Resource Shelf .......................................... 32 Hardware Configuration........................................................33 Functions and Principles .......................................................36 Backplane ..........................................................................38

Level-1 Switching Shelf.................................................. 39 Hardware Configuration........................................................40 Functions and Principles .......................................................41 Backplane ..........................................................................42

Circuit Switching Shelf ................................................... 43 Hardware Configuration........................................................43 Functions and Principles .......................................................44 Backplane ..........................................................................45

Busbar ........................................................................ 46

Chapter 3........................................................................49

MGW Boards...................................................................49

Overview ...........................................................................49

MGW Board Specification ............................................... 52

Clock Generator Board (CLKG) ........................................ 56 CLKG Board Appearance.......................................................57 CLKG Board Working Principles..............................................65 CLKG Board Functions..........................................................66 CLKG Board Technical Indices ...............................................67

Main Processing Board (MPx86)....................................... 67

MPx86 Board Appearance .....................................................68 MPx86 Board Working Principles ............................................73 SMP Board Functions ...........................................................74 OMP Board Functions ...........................................................75 MPx86 Technical Indices.......................................................77

Multi-Function Network Interface Board (MNIC)................. 77 MNIC Board Appearance.......................................................77 MNIC Board Working Principles..............................................83 IPI Board Functions .............................................................84 SIPI Board Functions ...........................................................86

MNIC Technical Indices ........................................................ 88

Universal Interface Module Board (UIM) ........................... 88 UIM Board Appearance ........................................................ 89 UIM Board Working Principle................................................. 92 UIMC Board Functions ......................................................... 93 UIMU Board Functions ......................................................... 93 UIMT Board Functions.......................................................... 94 UIM Technical Indices.......................................................... 95 Rear Boards of UIMC Board .................................................. 96 Rear Board of UIMU or UIMT Board........................................ 97

GE Universal Interface Module Board (GUIM) .................... 99 GUIM Board Appearance ...................................................... 99 GUIM Board Working Principle ............................................ 104 GUIM Board Functions ....................................................... 104 GUIM Technical Indices...................................................... 105

Signaling Processing Board (SPB) .................................. 105 SPB Board Appearance ...................................................... 106 SPB Board Working Principles ............................................. 111 SPB Board Functions ......................................................... 113 SPB Technical Indices ........................................................ 113

ATM Process Board (APBE) ........................................... 113

APBE Board Appearance..................................................... 114 APBE Board Working Principles............................................ 119 APBE Board Functions........................................................ 119 APBE Technical Indices ...................................................... 120

Inter-Working Function Board (IWFB) ............................ 120 IWFB Board Appearance .................................................... 120 IWFB Board Working Principles ........................................... 124 IWFB Board Functions ....................................................... 125 IWFB Board Technical Indices ............................................. 125

Media Resource Board (MRB) ........................................ 126 MRB Board Appearance...................................................... 126 MRB Board Working Principles............................................. 129 MRB Board Functions......................................................... 130 MRB Board Technical Indices .............................................. 131

Voice Transcoder Card (VTCD) ...................................... 131 VTCD Board Appearance .................................................... 132 VTCD Board Working Principles ........................................... 136

VTCD Board Functions........................................................ 137 VTCD Board Technical Indices ............................................. 137

IP Packet Switching Network Board (PSN4V/PSN8V)......... 137

PSN4V/PSN8V Board Appearance......................................... 137 PSN4V/PSN8V Board Working Principles ............................... 140 PSN4V/PSN8V Board Functions............................................ 141 PSN4V/PSN8V Technical Indices .......................................... 141

2.5G Line Interface Board (GLIQV) ................................ 142 GLIQV Board Appearance ................................................... 142 GLIQV Board Working Principles .......................................... 146 GLI Board Functions .......................................................... 146 GLIQV Technical Indices ..................................................... 147

Digital Trunk Board (DTB) ............................................ 147 DTB Board Appearance ...................................................... 147 DTB Board Working Principles ............................................. 153 DTB Board Functions ......................................................... 154 DTB Board Technical Indices ............................................... 155

Digital Trunk Board with EC Function (DTEC) .................. 155

DTEC Board Appearance..................................................... 155 DTEC Board Working Principles............................................ 161 DTEC Board Functions........................................................ 162 DTEC Board Technical Indices ............................................. 163

Control Plane Interconnection Board (CHUB)................... 163

CHUB Board Appearance .................................................... 163 CHUB Board Working Principles ........................................... 168 CHUB Board Functions ....................................................... 169 CHUB Technical Indices...................................................... 169

TDM Switch Network Board (TSNB)................................ 169 TSNB Board Appearance..................................................... 169 TSNB Board Working Principles............................................ 173 TSNB Board Functions........................................................ 174 TSNB Board Technical Indices ............................................. 174

Enhanced TDM Switch Network Board (ETSN) ................. 174 ETSN Board Appearance..................................................... 174 ETSN Board Working Principles............................................ 178 ETSN Board Functions........................................................ 179 ETSN Board Technical Indices ............................................. 179

Advanced TDM Switch Network Board (STSN) ................. 179

STSN Board Appearance .................................................... 179 STSN Board Working Principles ........................................... 183 STSN Board Functions ....................................................... 184 STSN Board Technical Indices............................................. 184

TDM Fiber Interface (TFI) ............................................. 184 TFI Board Appearance ....................................................... 184 TFI Board Working Principles .............................................. 187 TFI Board Functions .......................................................... 188 TFI Board Technical Indices ................................................ 188

SONET Digital Trunk Board (SDTB) ................................ 188

SDTB Board Appearance .................................................... 188 SDTB Board Working Principles ........................................... 194 SDTB Board Functions ....................................................... 195 SDTB Board Technical Indices............................................. 195

Power Distribution Board (PWRD) .................................. 196

PWRD Board Appearance ................................................... 196 PWRD Board Working Principles .......................................... 198 PWRD Board Functions ...................................................... 199 PWRD Board Technical Indices ............................................ 199 Corresponding Interface Board............................................ 200

Chapter 4......................................................................201

Integrated Alarm Box..................................................201

Overview ......................................................................... 201 Appearance...................................................................... 201 Functions......................................................................... 202 Principle .......................................................................... 203

Chapter 5......................................................................205

MGW Inner Cables .......................................................205

Overview ......................................................................... 205 System Clock Cable........................................................... 206 Line Reference Clock Cable................................................. 207 Interconnection Cable on the Control Panel........................... 208 PD485 Cable .................................................................... 209 Fan Monitoring Cable......................................................... 209 Power Cables ................................................................... 210 Grounding Cables.............................................................. 215 Interconnection Fiber for TDM Switching Network .................. 218

Interconnection Fiber for Packet Switching Network................ 220

Chapter 6......................................................................223

MGW Outer Cables .......................................................223

Overview ......................................................................... 223 Environment Monitoring Transit Cable .................................. 224 Hygrothermal Sensor Cable ................................................ 225 Smoke Sensor Cable.......................................................... 226 Infrared Sensor Cable ........................................................ 227 Access Control Sensor Cable ............................................... 228 Cable from Carrier Power Supply to Cabinet-Top Filter Power Supply............................................................................. 229 Cables between Cabinet Protective Ground and Equipment Room Ground ............................................................................ 230 75 Ω E1 Trunk Cable.......................................................... 231 120 Ω E1 Trunk Cable (3×16-Core) ..................................... 234 120 Ω E1 Trunk Cable (11×4-Core) ..................................... 237 100 Ω T1 Trunk Cable (50-Core) ......................................... 240 100 Ω T1 Trunk Cable (6×8-Core) ....................................... 242 OMC Ethernet Cable........................................................... 245 Inter-Cabinet PD485 Interconnection Cable........................... 246 IP Access Cable of Mc Interface ........................................... 247 User Plane Interconnection Cables of Nb Interface.................. 247

Appendix A...................................................................251

Abbreviations...............................................................251

Glossary........................................................................255

Figures..........................................................................259

Tables ...........................................................................265

Index............................................................................271

Confidential and Proprietary Information of ZTE CORPORATION i

About This Manual

Purpose

This manual provides detailed description about hardware modules and components of ZXWN MGW system.

Intended Audience

This document is intended for engineers and technicians who perform operation activities on the ZXWN MGW system.

Prerequisite Skill and Knowledge

To use this document effectively, users should have a general understanding of wireless telecommunications technology. Familiarity with the following is helpful:

MGW system and its various components.

User interfaces of MGW system.

Local operating procedures of ZXWN MGW system.

What is in This Manual

This manual contains the following chapters:

T AB L E 1 C H A P T E R S U M M AR Y

Chapter Summary

Chapter 1, MGW Cabinet

Introduces structure and layout of MGW cabinet

Chapter 2, Shelves and Busbar

Explains detail specifications of MGW Shelves

Chapter 3, MGW Boards Introduces various MGW boards and modules

ZXWN MGW Media Gateway Hardware Description

ii Confidential and Proprietary Information of ZTE CORPORATION

Chapter Summary

Chapter 4, Integrated Alarm Box

Describes the appearance, functions and principle of the integrated alarm box

Chapter 5, MGW Inner Cables

Describes the inner cables of MGW

Chapter 6, MGW Outer Cables

Describes the outer cables of MGW cabinet

Conventions

ZTE documents employ the following typographical conventions.

T AB L E 2 TY P O G R AP H I C AL C O N V E N T I O N S

Typeface Meaning

Italics References to other Manuals and documents.

“Quotes” Links on screens.

Bold Menus, menu options, function names, input fields, radio button names, check boxes, drop-down lists, dialog box names, window names.

CAPS Keys on the keyboard and buttons on screens and company name.

Constant width Text that you type, program code, files and directory names, and function names.

[ ] Optional parameters.

Mandatory parameters.

| Select one of the parameters that are delimited by it.

Note: Provides additional information about a certain topic.

T AB L E 3 M O U S E OP E R AT I O N C O N V E N T I O N S

Typeface Meaning

Click Refers to clicking the primary mouse button (usually the left mouse button) once.

Double-click Refers to quickly clicking the primary mouse button (usually the left mouse button) twice.

Right-click Refers to clicking the secondary mouse button (usually the right mouse button) once.

Drag Refers to pressing and holding a mouse button and moving the mouse.

Typographical Conventions

Mouse Operation

Conventions

About This Manual

Confidential and Proprietary Information of ZTE CORPORATION iii

How to Get in Touch

The following sections provide information on how to obtain support for the documentation and the software.

If you have problems, questions, comments, or suggestions regarding your product, contact us by e-mail at [email protected]. You can also call our customer support center at (86) 755 26771900 and (86) 800-9830-9830.

ZTE welcomes your comments and suggestions on the quality and usefulness of this document. For further questions, comments, or suggestions on the documentation, you can contact us by e-mail at [email protected]; or you can fax your comments and suggestions to (86) 755 26772236. You can also browse our website at http://support.zte.com.cn, which contains various interesting subjects like documentation, knowledge base, forum and service request.

Customer Support

Documentation Support


iv Confidential and Proprietary Information of ZTE CORPORATION


Confidential and Proprietary Information of ZTE CORPORATION v

Declaration of RoHS Compliance

To minimize the environmental impact and take more responsibility to the earth we live, this document shall serve as formal declaration that the ZXWN MGW manufactured by ZTE CORPORATION are in compliance with the Directive 2002/95/EC of the European Parliament - RoHS (Restriction of Hazardous Substances) with respect to the following substances:

Lead (Pb)

Mercury (Hg)

Cadmium (Cd)

Hexavalent Chromium (Cr (VI))

PolyBrominated Biphenyls (PBB’s)

PolyBrominated Diphenyl Ethers (PBDE’s)

…

The ZXWN MGW manufactured by ZTE CORPORATION meet the requirements of EU 2002/95/EC; however, some assemblies are customized to client specifications. Addition of specialized, customer-specified materials or processes which do not meet the requirements of EU 2002/95/EC may negate RoHS compliance of the assembly. To guarantee compliance of the assembly, the need for compliant product must be communicated to ZTE CORPORATION in written form.

This declaration is issued based on our current level of knowledge. Since conditions of use are outside our control, ZTE CORPORATION makes no warranties, express or implied, and assumes no liability in connection with the use of this information.


vi Confidential and Proprietary Information of ZTE CORPORATION


Confidential and Proprietary Information of ZTE CORPORATION 1

C h a p t e r 1

MGW Cabinet

Overview

This chapter describes the assembly, wiring, technical indices, and mechanical components of ZXWN MGW cabinet.

This chapter includes the following topics.

T AB L E 4 TO P I C S I N C H AP T E R 1

Topics Page No.

MGW Cabinet Structure 1

Cabinet Cabling 6

Technical Indices 8

MGW Cabinet Structure

This section describes the cabinet functions, appearance, structure, different component functions and inter-shelf relationship of the cabinet.

The cabinet is used to store the shelves so as to protect shelves, supply power, and shield the electromagnetic interference. In addition, the equipment can be arranged orderly and neatly, facilitating the equipment maintenance in future.

The ZXWN MGW cabinet adopts a 19-inch standard cabinet structure, which has a maximum internal space of 42 U (Units). Figure 1 shows the standard MGW cabinet.

Introduction

Contents

Overview

Function

Dimensions


2 Confidential and Proprietary Information of ZTE CORPORATION

F I G U R E 1 19 - I N C H S T AN D A R D MGW C AB I N E T

Table 5 shows 19-inch standard MGW cabinet dimensions.

T AB L E 5 C AB I N E T D I M E N S I O N S

Height (h) Width (w) Depth (d)

2000mm 600mm 800mm

Figure 2 shows the integrated 19-inch standard MGW cabinet.

Chapter 1 MGW Cabinet


F I G U R E 2 I N T E G R AT E D C AB I N E T W I T H O U T D O O R

Figure 3 shows the partial 19-inch standard MGW cabinet.



F I G U R E 3 P AR T I AL C AB I N E T W I T H O U T D O O R

Table 6 shows the maximum configuration of a single ZXWN MGW cabinet.

T AB L E 6 C AB I N E T C O M P O S I T I O N

Service Shelf

Power Distribution Shelf

Cable Shelf

Fan Shelf

Blank Panel

Total

4 layers × 8 U

1 layers × 2 U

4 layers × 1 U

3 layers × 1 U

1 layer × 1 U

42 U

Corresponding modules are configured in the cabinet, for example, the cabinet power access filter, busbar integrated equipment and rear horizontal cabling rack.

Figure 4 shows the structure of the cabinet.

Cabinet Configuration



F I G U R E 4 C AB I N E T S T R U C T U R E

2000

600

Blank panel (1U)Power shelf (2U)Fan shelf (1U)

Service shelf (8U)

Cable shelf (1U)

Cable shelf (1U)Fan shelf (1U)

Cable shelf (1U)

Cable shelf (1U)

Fan shelf (1U)

Air filter

Service shelf (8U)

Service shelf (8U)

Service shelf (8U)

Table 7 shows the function of each part. Functions of Each Part



T AB L E 7 FU N C T I O N O F E AC H P AR T

Part Function

Power distribution shelf

The power distribution shelf distributes the -48V input power to each shelf.

It has the lightning proof and over-current protection functions, checks the input power voltage and the distributed output power statuses, and gives alarm signal if necessary.

It also effectively monitors the rack running environment, fan heat dissipation system, access control etc., and reports through the RS485 interface.

Service shelf It is composed of each kind of board combined through the backplane.

In addition, the service shelf also includes the shelf power filter, which is used to separate and filter -48V input power

The service shelf of the MGW has four types: level-1 switching shelf, circuit switching shelf, control shelf and resource shelf.

Fan shelf Provides forced air cooling for the equipment

Cable shelf Used to arrange fiber, which is leaded to the two sides of the cabinet through each cable shelf under each shelf

Busbar Located at the internal side of the cabinet. The power is provided to each shelf through the bus bar

Rear horizontal cabling rack

Arranges the cables from the rear of the cabinet.

Cabinet power input filter

There are two combined filters on the top of the cabinet, which are used to filter the two lines of -48 V external input power.

Cabinet Cabling

The outlet of MGW falls into the micro coaxial cable, optical fiber, Ethernet cables, and trunk cables, and other cables. In the MGW system, a single service shelf can be configured with at most 6×32 E1 micro coaxial cables, or 192 optical fibers and a few cables, or about 50 Ethernet cables or common 16-core cables. The cabling mode of cables is different from that of the optical fibers.

For the convenience and good-looking of shelf-cabling, optical fibers, while passing the cabling shelf under each shelf, are put into the cabling trough in the front and led to both sides of the cabinet to be further led out of the cabinet.

Figure 5 shows the optical fiber shelf.

Overview

Optical Fiber Wiring



F I G U R E 5 OP T I C AL F I B E R S H E L F

The power cable is taken out from the rear board panel. Then it goes downwards to pass through the plugging/unplugging space of the rear board, where it is bundled to the rear horizontal cabling rack. Finally, it enters the vertical cabling trough from both sides, and then goes out of the cabinet.

Figure 6 shows the routing of rear outlets.

F I G U R E 6 C AB I N E T R E AR C AB L I N G

100

100

100

100

8

7

6

3

12

2

3

1

3

2

3

2

1

45

Power Cable Wiring



T AB L E 8 L A B E L S I N C AB I N E T R E AR C AB L I N G

Label Description

1 Fan Shelf

2 Cabling shelf

3 Control shelf

4 Power distribution shelf

5 Blank panel

6 Shelf power filter

7 Rear plugging/unplugging cabling

8 Rear horizontal cabling rack

Technical Indices

Table 9 shows the requirements on temperature and humidity for ZXWN MGW.

Table 9 Operating Environment

Temperature Relative Humidity

Long-Term Operating Condition

Short-Term Operating Condition

Long-Term Operating Condition

Short-Term Operating Condition

10°C to 30°C 0°C to 45°C 30% to 85% 20% to 90%

Note:

Internal operating temperature and humidity of the equipment room measures at 1.5 m height from the ground and 0.4 m front of the rack when there is no protection board in front or at the back of the rack.

Short-term operating condition refers to working for no more than 48 successive hours and no more than 5 days accumulatively each year.

Table 10 shows the dimensions of single cabinet.

T AB L E 10 D I M E N S I O N S


2000 mm 600 mm 800 mm

Operating Environment

Dimensions



Table 11 shows the operating requirements of ZXWN MGW cabin.

T AB L E 11 OP E R A T I N G R E Q U I R E M E N T S

Weight Power Supply System Capacity

310kg -57 V to -40 V DC 2,000,000 Users

Table 12 shows the power consumption of ZXWN MGW system.

T AB L E 12 P O W E R C O N S U M P T I O N

Shelf Consumption

Resource shelf 1000W

Control shelf 1000W

Level-1 switching shelf 1800W

Circuit switching shelf 500W

Operating Requirements

Power Consumption


C h a p t e r 2

Shelves and Busbar

Overview

This chapter introduces the configuration and working theory of each shelf, backplanes and their interfaces, DIP-switches and jumpers, the structure and function of busbar.



Topics Page No.

Power Distribution Shelf 12

Fan Shelf 14

Service Shelf 15

Hardware Structure 15

Service Shelf Type 18

Typical Configuration 19

Communication Relationship 20

DIP Switches on Service Shelf Backplane 20

Control Shelf 22

Hardware Configuration 22

Functions and Principles 24

Backplane 25

Resource Shelf 26



Backplane 31

GE Switching Resource Shelf 32


Introduction

Contents



Topics Page No.


Backplane 38

Level-1 Switching Shelf 39



Backplane 42

Circuit Switching Shelf 43



Backplane 45

Busbar 46

Power Distribution Shelf Power distribution shelf design is a universal 2U high shelf module.

The power distribution shelf offers the following functions.

It distributes the input -48V power to each shelf.

It has the lightning and over-current protection functions.

It checks the input power voltage and the distributed output power statuses, and gives alarm if necessary.

It effectively monitors the rack running environment, fan heat dissipation system, access control etc., and reports through the RS485 interface.

The power distribution shelf is located at the top of the cabinet.

Table 14 shows the dimensions of power distribution shelf.

T AB L E 14 D I M E N S I O N S


88.1 mm (2 U) 482.6 mm (19 inch) 374 mm

Note:

These dimensions exclude the protrusion of the connection terminal on the back.

Connection terminal installation is on the backboard of the shelf and Monitoring board installation is on the front panel of the shelf. Front panel can revolve around the axis outward with an angle of 90 degree. Thus, shelf can easily open for maintenance.

Overview

Function

Position

Dimensions

Connection Terminal

Chapter 2 Shelves and Busbar


During normal operation, front panel fixes to the shelf with captive screws.

Figure 7 shows power distribution shelf plane view.

F I G U R E 7 P L AN E V I E W

51 4 6

2

8

3 7

Table 15 shows the function of each part in Figure 7.

T AB L E 15 FU N C T I O N O F E AC H P AR T O F T H E P O W E R D I S T R I B U T I O N SH E L F

Number Part Name Function

1 Frame Casing frame

2 Isolated diode radiator

Used to radiate heat from the isolated diode

3 Switch Power switch that can play the role of over-current protection

4 Arrester Proof against lightning strike

5 Connection terminal

Used to lead in the two lines of -48V external power output by the filter, and output it to the busbar to provide power for the sub rack

Plane View

Function of Each Part




6 PWRDB Used to provide the external interface for the POWERD:

1. Input interface of the environment detecting sensor

2. RS485 interface (with the OMP)

3. Input interface monitored by the fan

4. Access control monitoring interface.

7 PWRD Monitoring the following information:

1. Monitoring whether there is over-voltage, under-voltage or power down occurring in the -48V power voltage

2. Monitoring whether the fan is normal

3. Monitoring whether there are smoking signal, the signal of the temperature or the humidity exceeding the threshold, access control alarm signal and other

Give the alarm about the monitored signal through the LED indicator, and report the signal to the OMP, other related functional boards or the background server through the RS485 interface

8 Isolated diode Used to avoid mutual reverse flow of the 2 lines of input power

Connection terminal: It is required to access the -48V, GNDP, GND and -48VGND to the two filters on the top of the rack.

PWRDB: It is required to connect with the environment monitoring sensor, fan shelf and access control switch. In addition, the information monitored by the PWRD can be reported to the OMP, other related functional boards or the background server through the RS485 interface.

Fan Shelf The fan shelf is a universal module. In the ZXWN MGW cabinet, a closed air passage is formed where the wind flows in from the bottom and flows out on the top to cool down the equipment forcedly.

It has functions of monitoring and automatic speed adjustment.

Interface

Overview



Figure 4 shows the position of the control shelf in the cabinet.

1 U

There are three sets of unit modules in each fan shelf. Each set of unit modules contains two fans. Blind match can be implemented. And it is convenient to perform field maintenance and live replacement. Figure 8 shows the structure of fan shelf.

F I G U R E 8 S T R U C T U R AL V I E W O F F AN S H E L F

Service Shelf The MGW service shelf comprises the control shelf, resource shelf, level-1 switching shelf and circuit switching shelf.

This section includes the following topics:

T AB L E 16 TO P I C S I N S E R V I C E S H E L F S E C T I O N

Topics Page No.

Hardware Structure 15

Service Shelf Type 18

Typical Configuration 19

Communication Relationship 20

DIP Switches on Service Shelf Backplane 20

Hardware Structure

The service shelf of MGW is of the shielding-class shelf structure with inserted front and rear boards in pairs. The insertion space for front boards is 8U, and that for rear boards is 6U. The shelf has 17 board slots in the front and back respectively. The board

Position

Height

Structure

Overview

Contents

Overview



slots are spaced 25.4 mm. The insertion space is 85 HP. Optical fibers are led out of the front panel of the front boards. Other cables are led out of the front panel of the rear boards.

The whole system has over 30 kinds of functional front boards and over 10 kinds of rear boards.

Figure 9 and Figure 10 show the appearance of the service shelf.

F I G U R E 9 FR O N T V I E W O F T H E S E R V I C E S H E L F

F I G U R E 10 BAC K V I E W O F T H E S E R V I C E S H E L F

Figure 11 shows the structure of general 8U shelf.

Appearance

Structure



F I G U R E 11 SE C T I O N AL V I E W O F T H E S E R V I C E S H E L F

8U

1

479.2

2

6U

7

8

5

3

4

9 6

The function of each part is shown in Table 17.

T AB L E 17 FU N C T I O N O F E AC H P AR T O F T H E S E R V I C E SH E L F


1 Front board Unit board

2 Rear board Providing interfaces of HW and network cables, and other interfaces for the front board.

3 –48 V access filter

Filtering the -48 V input power to ensure that the corresponding isolation and filter requirements can be met.

4 Backplane reinforcing rib

Reinforcing the strength of the backboard.

5 Metal guiding latch

Acting as the guide rod of the location and direction when the board is being inserted.

6 Plastic guide rail

Installed at both the upside and the underside of the shelf, and used to insert the board correctly.

7 2 mm connector

Used to connect the boards.

8 Backplane Back board is an important part of a shelf. The circuits in the same shelf are mutually connected through the printed wire on the backboard, which greatly reduces cables on the backplane and improves the reliability of the integrated equipment.




9 DIP switch Used to set the office number, rack number and shelf number.

Service Shelf Type

MGW is responsible for offering voice, multimedia and circuit-domain data services between the PSTN and UMTS, between the 3G and 2G, and inside the UMTS. It also supports the extended VoIP/FoIP services. It can integrate the SGW function to transfer signaling to other NEs, such as MGW.

The MGW has five types of service shelf: level-1 switching shelf, circuit switching shelf, control shelf, resource shelf, and GE switching resource shelf.

Table 18 shows the functions of each shelf.

T AB L E 18 FU N C T I O N S O F EAC H S H E L F

Shelf Type Function

level-1 switching shelf

The level-1 switching shelf is 40/80 Gbps core switching sub-system in the MGW system. It provides necessary message transfer channels between functional entities in the system and between external functional entities. In this way, it exchanges data such as timing, signaling, voice service, data service and offers corresponding QoS functions according to service requirements of different users.

Circuit switching shelf

The circuit switching shelf is used for smooth capacity expansion of the circuit switching network with a capacity of 64 Kb~256 Kb.

Control shelf The control shelf is the control core of the MGW. It controls and manages the whole system.

Resource shelf

The resource shelf provides external interfaces for processing various access modes and related lower-layer protocols. It also provides various resource processing modules for processing wireless protocols.

GE switching resource shelf

It provides the external interfaces of the MGW for processing various access modes and related lower-layer protocols.

In addition, it provides various resource processing modules for processing wireless protocols.

Compared with the resource shelf, it increases the number of GEs of the media plane. The shelf supports 64 K circuit switching.

Introduction

Functions of Each Shelf



Table 19 shows the corresponding relationship between the shelf and the backplane.

T AB L E 19 C O R R E S P O N D I N G R E L AT I O N S H I P B E T W E E N SH E L F & B AC K P L AN E

Shelf Backplane Name Descriptions

Control shelf BCTC Backplane of control center

Resource shelf BUSN Backplane of universal service network

GE switching resource shelf

BGSN Backplane of general service network

Level-1 switching shelf

BPSN Backplane of packet switched network


BCSN Backplane of circuit switched network

Typical Configuration

The quantity of MGW cabinets and that of shelves in an MGW cabinet depend on the system requirement. Typically, an MGW cabinet includes level-1 switching shelf, circuit switching shelf, control shelf, and resource shelf (or GE switching resource shelf).

Figure 12 shows the typical configuration of an MGW cabinet.

F I G U R E 12 CO N F I G U R AT I O N D I AG R AM

Level-1 Switching Shelf

Control Shelf

Control Shelf

Circuit Switching Shelf

Control Shelf

Resource Shelf/1000M Switching Resource

Shelf


Shelf


Shelf


Shelf

A cabinet can be configured with at most four shelves, which can be numbered from top to bottom. Four shelves in the first cabinet are numbered from top to bottom with range of 1~4, and the four shelves in the second cabinet with range of 5~8, and so forth.

Corresponding Backplane



The main control shelf is fixed on the second shelf of the first cabinet, being numbered as 2.

Communication Relationship

Figure 13 shows the communication relationship between shelves in the MGW.

F I G U R E 13 CO M M U N I C AT I O N S R E L AT I O N S H I P B E T W E E N S H E L V E S

Control shelf

Resource shelf/1000M Switching resource shelf

Control-flow Ethernet

Clock signal

Level-1 switching shelfMedia plane

data

Control-flow EthernetClock

signal


Control-flow Ethernet

Clock signal

DIP Switches on Service Shelf Backplane

Figure 14 shows the detailed diagram of the DIP switches on the control shelf, level-1 switching shelf, circuit switching shelf and resource shelf.

F I G U R E 14 LAY O U T O F D IP S W I T C H E S O N B AC K P L AN E

There are three 4-bit flat-move DIP switches on the backplane. Viewed from the back, identifiers of the DIP switches from left to right are TRIB-ID, RACK-ID, and SHELF-ID successively, used for configuring office number, cabinet number and shelf number respectively. Using binary code to represent the position of the DIP switch, its rules are as follows:

Layout of DIP Switches

Method



1. Turning the DIP switch upward indicates “ON”, corresponding value of “0”.

2. Turning the DIP switch downward indicates “OFF”, corresponding value of “1”.

The actual office number, rack number, and shelf number are plus 1 on the basis of the TRIB-ID, RACK-ID, and SHELF-ID.

From left to right, definitions of various DIP switches at upper position are shown respectively in Table 20, Table 21 and Table 22.

T AB L E 20 OF F I C E N U M B E R D IP S W I T C H S I G N AL D E F I N I T I O N

DIP Switch Binary Code (from back to front)

Description

TRIB-ID0 No.1

TRIB-ID1 No.2

TRIB-ID2 No.3

TRIB-ID3 Reserve

Configurable hardware range: 0~7

T AB L E 21 C AB I N E T N U M B E R D IP S W I T C H S I G N AL D E F I N I T I O N


Description

RACK-ID0 No.1

RACK-ID1 No.2

RACK-ID2 No.3

RACK-ID3 No.4


T AB L E 22 S H E L F N U M B E R D IP S W I T C H S I G N AL D E F I N I T I O N


Description

SHELF-ID0 No.1

SHELF-ID1 No.2

SHELF-ID2 Reserve

SHELF-ID3 Reserve


Both S1 switches and S2 switches are turned to “on”, and the left two S3 switches are turned to “off” with values read by the DIP are 0, 0, and 3 respectively. In this way, the position of shelf is No. 4 shelf of the rack 1 in the office 1.

Example



Control Shelf This section describes the control shelf in the MGW cabinet.

This section includes the following topics.

T AB L E 23 TO P I C S I N C O N T R O L S H E L F S E C T I O N

Topics Page No.



Backplane 25

Hardware Configuration

This section describes the components of the control shelf, and the plugging rule of the boards, and introduces a configuration example.

The BCTC is the backplane of the control shelf. It provides 17 slots for the functional boards.

Table 24 shows the equipped boards and their configurations.

T AB L E 24 B O A R D C O N F I G U R AT I O N O N T H E C O N T R O L SH E L F

Logical Board Name

Physical Board Name

Configuration Description

UIMC UIM

Each control shelf is fixedly configured with one pair of UIMC boards, which adopt 1+1 active/standby working mode.

SMP MPx86

One system is configured with signaling and service SMP boards. The signaling SMP boards adopt load-sharing working mode, while the service SMP boards adopt 1+1 active/standby working mode.

OMP MPx86

One system is fixedly configured with one pair of OMP boards, which adopt 1+1 active/standby working mode.

SIPI MNIC

Configured when the Mc interface adopts the IP bearer, taking charge of IP access and processing the SIGTRAN signaling. It adopts 1+1 active/standby or load-sharing working mode.

Overview

Contents

Overview

Board Configuration



Logical Board Name

Physical Board Name


CHUB CHUB

One multi-shelf system must be configured with one pair of CHUB boards, which adopt 1+1 active/standby working mode.

CLKG CLKG

One set of system must be configured with one pair of CLKG boards, which adopt 1+1 active/standby working mode.

The CLKG boards are generally configured in the circuit switching shelf. When there is no circuit switching shelf, they are configured in the control shelf.

The rule for plugging boards to the slots in the control shelf is as follows.

UIMC boards are fixedly inserted in slots 9 and 10.

OMP boards are fixedly inserted in slots 11 and 12.

SIPI boards are inserted in the slots 3 and 4.

CHUB boards are inserted in the slots 15 and 16.

CLKG boards are inserted in the slots 13 and 14.

SMP boars are inserted in the slots 1, 2, and 5~8. They also can be inserted in the slots 13 and 14, when there are no CLKG boards.

Figure 15 shows the control shelf configuration.

Rules for Inserting

Boards

Configuration Instance



F I G U R E 15 CO N T R O L S H E L F C O N F I G U R AT I O N

BCTC Main control shelf

RU

IM2

RU

IM3

RM

PB

RM

PB

RC

KG1

RC

KG2

RC

HB1

RC

HB2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

M

P

SM

P

SM

P

SM

P

SM

P

UI

MC

UI

MC

OM

P

OM

P

CL

KG

CL

KG

CH

UB

CH

UB

S

M

P

S

BCTC Cascade shelf

RU

I

M

2

RU

I

M

3

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

M

P

SMP

SMP

SMP

SMP

SMP

SMP

UIMC

UIM

C

MP

MP

S

MP

S

R

M

N

I

C

R

M

N

IC

IPI

SIP

I

S

S S

M

P

M

P

S SM

P

M

P

S S

Rear board

Front board

Rear board

Front board

Functions and Principles

As the control core of MGW, the control shelf manages and controls the whole system.

The control shelf is shown in Figure 16.

F I G U R E 16 CO N T R O L S H E L F P R I N C I P L E

BCTC backplane: It is used to bear the signaling processing board and various active control modules. It transits and processes media streams of the control plane, and forms the distributed processing platform of the system in multi-shelf equipment.

UIMC board: It is the signaling switching center of the control shelf. It exchanges information between the boards.

Function

Working Principle

Description



It also provides an Ethernet control channel to connect externally the resource shelf.

SMP board: It implements the processing of the UMTS packet control protocol, such as the GMM, SM, and GTP-C. For 2.5G, it implements the control-plane-related part processing of the BSSGP and the LLC protocols.

OMP board: It provides Ethernet interface from the OMC to the background.

SIPI board: It provides the IP access of the Mc interface for processing signaling borne over IP.

CHUB board: It is used for multi-shelf expansion. It connects the centralized signaling processing subsystem with the control plane Ethernet flows of each resource shelf. Connecting with two 100M Ethernet interfaces of each cascade shelf, the CHUB externally provides 46 GE Ethernet interfaces.

Backplane

The backplane is an important part of a shelf. Circuit boards in a shelf are connected through printed wires on the backplane, which greatly reduces cable routing on the backplane and improves the operation reliability of the whole system.

Figure 17 shows the rear view of BCTC.

Introduction

Rear View



F I G U R E 17 BCTC R E AR V I E W

DIP switch

Power connector

Board locating pin

Fastening screw at the backplane

Backplane connector

Table 25 shows the external interfaces of the control shelf.

T AB L E 25 E X T E R N AL I N T E R F AC E O F T H E C O N T R O L S H E L F

Interface ID Purpose Connection Relation

X0~X1 Power socket Connecting to busbar -48 V, -48 V GND, and GNDP

Resource Shelf This section describes the resource shelf in the MGW cabinet.


T AB L E 26 TO P I C S I N R E S O U R C E S H E L F S E C T I O N

Topics Page No.



Backplane 31

External Interface

Overview

Contents




This section describes the components of the resource shelf and the rules for inserting boards, and introduces configuration instances.

The BUSN is the backplane of the resource shelf. The boards that can be configured and their configurations are shown in Table 27.

T AB L E 27 B O A R D C O N F I G U R AT I O N O N T H E R E S O U R C E S H E L F

Logical Board Name

Physical Board Name


UIMT, UIMU UIM

The UIM board must be configured, which adopt 1+1 active/standby working mode.

The UIMU board is usually configured in a single resource shelf.

The UIMT board is usually configured in multiple shelves when the circuit switching shelf is needed.

IPI MNIC

Configured when the Nb interface adopts the IP bearer.

According to the requirements, there are following IPI boards are required: IPI (FE), IPI (GE optical interface), IPI (GE electrical interface), IPI (POS155M) and IPI (POS622M).

Configured when the IM-MGW needs to provide the Mb and Mn interfaces.

Adopting 1+1 active/standby or load-sharing working mode.

APBE APBE Configured when the Lu, Nb and MC interfaces adopt the ATM bearer.

IWFB IWFB

Configured when it is required to provide transparent/nontransparent synchronous asynchronous data service, and nontransparent circuit switching data bearer service.

MRB MRB

Configured when it is required to provide TONE and voice sending, DTMF number sending/receiving, MFC number sending/receiving, and conference telephone functions.

Overview

Board Configuration



Logical Board Name

Physical Board Name


VTCD VTCD

The VMGW should be configured with at least two VTCD boards, which are used to encode the voice signal at the BSC and RNC sides, process the Iu-UP protocol, and encode the signal over IP.

The GMGW should be configured with the VTCD board when the signal over TDM or IP needs to be encoded.

DTEC, DTB DTEC

Configured when the Nb interface adopts the TDM bearer or when the Ai and A interfaces need to be provided, and used to implement E1 access.

SDTB SDTB

Configured when the Nb interface adopts the TDM bearer or when the Ai and A interfaces need to be provided, and used to implement STM-1 access.

Adopting 1+1 or 1:1 active/standby working mode.

SPB SPB

Configured when the Ai and A interfaces need to be provided, or when the MGW acting as the signaling gateway needs to perform inter-office SS7 signaling transfer.

The rule for inserting boards to the slots in the resource shelf is as follows.

UIM boards adopt the active/standby mode, and are fixedly configured in the slots 9 and 10.

IPI (FE) and IPI (POS155M) boards are configured in the slots 5~8 and slots 11~14.

IPI (GE optical interface), IPI (GE electrical interface) and IPI (POS622M) boards are configured in the slots 1 and 2. When it does not need the protection, the slot 2 is idle.

MRB and IWFB boards are configured in the slots 15, 16 and 17.

APBE, SPB, SDTB, DTEC, DTB, and VTCD boards are configured in the slots 1~8 and 11~16.

Three instances are given based on the following three situations.

Figure 18 shows the end office configuration when the Nb interface adopts the IP bearer (GE).

Rule for Inserting

Boards

Configuration Instances



F I G U R E 18 RE S O U R C E S H E L F C O N F I G U R AT I O N 1

Figure 19 shows the end office configuration when the Nb interface adopts the IP bearer (FE).


Figure 20 shows the end office configuration when the Nb interface adopts the TDM bearer.



Resource shelf provides external interfaces of MGW for processing various access modes and related lower-layer

Functions



protocols. It also provides various resource processing modules for processing wireless protocols.

The principle of the resource shelf is shown in Figure 21.

F I G U R E 21 RE S O U R C E S H E L F P R I N C I P L E S

IBB/SDU/ABPM/UPCF

DTBDTB

IPCFIPI

UIMUIMT

Control flow 100M Ethernet

8K、16M、PP2SIWFBMRB

IP interfaceATM

interface

APBE/DTEC

Media flow 100M Ethernet

8M HW

Interconnecting control shelf CHUB

IBB/SDU/ABPM/UPCFVTCD

E1 interface

BUSN: Is universal service backplane. Multiple service processing modules can be inserted in it to form universal service processing subsystem.

UIM: Implements function of managing the Level-2 switching, the time slot multiplexing and exchanging and the resource shelf. Meanwhile, UIM provides external interfaces to control the shelf. These interfaces include the packet data interfaces (GE optical interfaces) connecting with the core switching unit, the circuit domain interfaces (the optical interfaces) connecting with the circuit switching unit and the control plane data Ethernet interfaces (four FEs) of the distributed processing platform. It also distributes the clock provided by the clock board to the board.

APBE: Provides two 155 Mbps ATM optical interfaces, implements SAR of the 155 Mbps ATM AAL2 and AAL5, performs IP mapping for media stream payloads after the SAR processing and then forwards them through four FEs. The APBE provides access for the Iu-CS interface and ATM access for the Nb interface.

IMAB: Provides the 63-E1 IMA access function, implements the SAR of the 155 Mbps ATM AAL2 and AAL5, performs IP mapping for media stream payloads after the SAR processing and then forwards them through four FEs.

IPI: Provides the IP access for the Nb interface. It serves as the network interface board or packet data protocol processing board.

DTEC: Provides the TDM mode for the Nb interface, or offers the A and Ai interfaces. It provides 32-channel E1/T1 physical interfaces, implements the Echo Cancellation (EC)

Principles

Description



function by installing the EC sub-card, and supports inter-office transparent transmission in Channel Associated Signaling (CAS) and Common Channel Signaling (CCS) modes. In addition, it extracts an 8 K synchronous clock from the line and transmits the clock to the clock board through a cable as a clock reference.

DTB: Provides the TDM mode for the Nb interface, or offers the A and Ai interfaces. It offers 32-channel E1/T1 physical interface for the system. It supports inter-office transparent transmission in CAS and CCS modes. In addition, it extracts an 8 K synchronous clock from the line and transmits the clock to the clock board through a cable as a clock reference.

VTCD: Serves as the voice coding/decoding board, and implements the voice coding/decoding, CS data service rate adaptation and UP protocol processing.

IWFB: Offers circuit switching data bearer service for the transparent/non-transparent synchronous or asynchronous data services and the nontransparent fax service. The processing capability is 60 channels.

MRB: Implements 480-channel media resource functions, mainly including Tone/Voice, DTMF detection/generation, MFC detection/generation and conference call. The service functions take 120 channels as one basic subunit and the software can make configurations based on the subunit. The conference call function supports the random configuration with each group consisting of three to 120 parties.

SDTB: Provides the standard optical trunk interface, the STM-1. It can process the CAS and CCS. Each board has the processing capability of 63 E1s or 84 T1s. When the SDTB is connected with the PSTN, the EC function is provided by inserting the EC sub-card.

SPB: Offers access for 16 E1 channels and processes MTP-2 protocol in SS7. The data are packed into the IP packet that is sent to the switching unit through four 100M interfaces.

Backplane

The BUSN is the backplane of the resource shelf. As the universal service backplane, it can be inserted with multiple service processing modules to form the universal service processing subsystem.

The rear view of the BUSN is shown in Figure 22.

Introduction

Rear View



F I G U R E 22 BUSN R E AR V I E W

The external interfaces of the BUSN are shown in Table 28.

T AB L E 28 E X T E R N AL I N T E R F AC E S O F T H E R E S O U R C E SH E L F


X1~X2 Power socket Connecting the busbar GND, -48V, -48 V GND, and GNDP

GE Switching Resource Shelf This section describes the GE switching resource shelf in the MGW cabinet.


T AB L E 29 TO P I C S I N GE SW I T C H I N G R E S O U R C E S H E L F S E C T I O N

Topics Page No.



Backplane 38

External Interface

Overview

Contents




This section describes the components of the GE switching resource shelf and the rules for inserting boards, and introduces configuration instances.

The BGSN is compatible with resource boards on the BUSN. Compared with the BUSN, the BGSN increases the quantity of GEs of the media plane, and supports 19GE switching. The GUIM (in slots 9 and 10) supports at most 64K switching, and provides two groups of GE optical interfaces that have optical interface active/standby protection function to connect to the GLI in order to implement the interconnection between the resource shelf and level-1 switching shelf.

The BGSN is the backplane of the GE switching resource shelf. The boards that can be configured and their configurations are shown in Table 30.

T AB L E 30 B O A R D C O N F I G U R AT I O N O N R E S O U R C E S H E L F

Logical Board Name

Physical Board Name


GUIM GUIM GUIM boards must be configured, which adopt 1+1 active/standby working mode.

IPI MNIC

Configured when the Nb interface adopts the IP bearer. There are three types of boards: IPI (FE), IPI (GE optical interface), IPI (GE electrical interface).

Configured when the IM-MGW needs to provide the Mb and Mn interfaces.

Adopting 1+1 active/standby or load-sharing working mode.

APBE APBE Configured when the Iu, Nb and MC interfaces adopt the ATM bearer.

IWFB IWFB

Configured when it is required to provide transparent/nontransparent synchronous asynchronous data service, and nontransparent circuit switching data bearer service.

MRB MRB

Configured when it is required to provide TONE and voice sending, DTMF number sending/receiving, MFC number sending/receiving, and conference telephone functions.

Overview

Board Configuration



Logical Board Name

Physical Board Name


VTCD VTCD

The VMGW should be configured with at least two VTCD boards, which are used to encode the voice signal at the BSC and RNC sides, process the Iu-UP protocol, and encode the signal over IP.

The GMGW should be configured with the VTCD board when the signal over TDM or IP needs to be encoded.

DTEC, DTB DTEC

Configured when the Nb interface adopts the TDM bearer or when the Ai and A interfaces need to be provided, and used to implement E1 access.

SDTB SDTB

Configured when the Nb interface adopts the TDM bearer or when the Ai and A interfaces need to be provided, and used to implement STM-1 access.

Adopting 1+1 or 1:1 active/standby working mode.

SPB SPB

Configured when the Ai and A interfaces need to be provided, or when the MGW acting as the signaling gateway needs to perform inter-office SS7 signaling transfer.

OMP MPx86

When the single BGSN shelf configuration is adopted (that means there is only one resource shelf), a pair of boards is fixedly configured in the resource shelf. It adopts 1+1 active/standby working mode.

SMP MPx86

When the single BGSN shelf configuration is adopted (that means there is only one resource shelf), a system should be configured with signaling SMP and service SMP.

The signaling SMP adopts the load-sharing working mode, while the service SMP adopts the 1+1 active/standby working mode.

CLKG CLKG

When the single BGSN shelf configuration is adopted (that means there is only one resource shelf), a pair of boards is fixedly configured in the resource shelf. It adopts 1+1 active/standby working mode.



The rule for inserting boards to the slots in the resource shelf is as follows.

GUIM boards adopt the active/standby mode, and are fixedly configured in the slots 9 and 10.

APBE boards are configured in the slots 5~8 and slots 13~14.

IPI, SPB, SDTB, DTEC, DTB, VTCD, IWFB, and MRB boards are configured in the slots 1~8 and slots 11~17.

CLKG boards.

OMP boards adopt the active/standby mode, and are configured in the slots 11 and 12.

SMP boards are configured in the slots 13 and 14.

Three instances are given based on the following three situations.

Figure 23 shows the instance that the single shelf with pure TDM switching forms an office, which can be applied at the gateway office to interconnect with the 2G end office.

F I G U R E 23 S I N G L E -S H E L F OF F I C E W I T H P U R E TDM

Figure 24 shows the instance that the single shelf with TDM and IP switching forms an office, which can serve as 3G end office and 2G gateway office simultaneously.

F I G U R E 24 S I N G L E -S H E L F OF F I C E W I T H TDM AN D IP S W I T C H I N G

BGSN

R

GU

M

1

R

GU

M

2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

SD

TB

VT

CD

VT

CD

G

IM

G

IM

OM

P

OM

P

SM

P

SM

P

SIPI

C

L

KG

IW

F

Rear board

Front board

SD

TB

I

P

I

I

P

I

SIPI

C

L

KG

U U

R

MP

B

R

MP

B

RC

KG1

RC

KG2

Figure 25 and Figure 26 show the instance that multiple shelves with TDM and IP switching forms an office, which can serve as 3G end office and 2G gateway office simultaneously.

Rule for Inserting

Boards

Configuration Instances



F I G U R E 25 BGSN1

BGSN

R

U

M1

RGI

M

2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

I

P

I

V

TC

D

V

TC

D

UI

M

UI

M

A

P

B

Rear board

Front board

VTCD

SIPI

VTCD E

A

P

B

E

I

P

I

SIPI

G G

G

F I G U R E 26 BGSN2


The GE switching resource shelf (BGSN) provides the external interfaces of the MGW for processing various access modes and related lower-layer protocols. It also provides various resource processing modules for processing wireless protocols.

The BGSN is compatible with resource boards on the BUSN. Compared with the BUSN, the BGSN increases the quantity of GEs of the media plane, and supports 19GE switching. The GUIM (in slots 9 and 10) supports at most 64K switching, and provides two groups of GE optical interfaces that have optical interface active/standby protection function to connect to the GLI in order to implement the interconnection between the resource shelf and level-1 switching shelf.

Figure 27 shows the principle of the resource shelf.

Functions

Principles



F I G U R E 27 GE S W I T C H I N G R E S O U R C E S H E L F P R I N C I P L E S

IBB/SDU/ABPM/UPCF

DTBDTB

IPCFIPI

UIMUIMT

Control flow 100MEthernet

8K 16M PP2SIWFBMRB

IP interfaceATM

interface

APBE/DTEC/SDTB

Media flow 100MEthernet

8M HW

Interconnecting control shelf CHUB

IBB/SDU/ABPM/UPCF

VTCD

E1 interface

BGSN: Multiple service processing modules can be inserted in it to form universal service processing subsystem.

GUIM: Completes Ethernet Level-2 switching inside the resource shelf, circuit domain TS multiplexing switching and resource shelf management. In addition, it provides external interfaces of the resource shelf, including the packet data interface (GE optical interface) connected with the core switching unit, circuit domain interface (optical interface) of the circuit switching unit and control plane data Ethernet interface of the distributed processing platform (six FEs). It also distributes the clock provided by the clock board to each board. The differences between the GUIM and UIMT are as follows.

The GUIM provides the 64K circuit switching, four pairs of TDM optical interfaces to the external. An optical interface offers 8K switching capacity.

The GUIM provides two groups of GE optical interfaces that have optical interface active/standby protection function to connect to the GLI in order to implement the interconnection between the resource shelf and level-1 switching shelf.

The GUIM provides the GE interface for all of the service slots.

APBE: Provides two 155 Mbps ATM optical interfaces, implements SAR of the 155 Mbps ATM AAL2 and AAL5, performs IP mapping for media stream payloads after the SAR processing and then forwards them through four FEs. The APBE provides access for the Iu-CS interface and ATM access for the Nb interface.

IMAB: Provides the 63-E1 IMA access function, implements the SAR of the 155 Mbps ATM AAL2 and AAL5, performs IP mapping for media stream payloads after the SAR processing and then forwards them through four FEs.

Description



IPI: Provides the IP access for the Nb interface. It serves as the network interface board or packet data protocol processing board. Based on different requirements, the IPI provides three kinds of physical interfaces, the FE interface, GE electric interface, and GE optical interface.

DTEC: Provides the TDM mode for the Nb interface, or offers the A and Ai interfaces. It provides 32-channel E1/T1 physical interfaces, implements the Echo Cancellation (EC) function by installing the EC sub-card, and supports inter-office transparent transmission in Channel Associated Signaling (CAS) and Common Channel Signaling (CCS) modes. In addition, it extracts an 8 K synchronous clock from the line and transmits the clock to the clock board through a cable as a clock reference.

DTB: Provides the TDM mode for the Nb interface, or offers the A and Ai interfaces. It offers 32-channel E1/T1 physical interface for the system. It supports inter-office transparent transmission in CAS and CCS modes. In addition, it extracts an 8 K synchronous clock from the line and transmits the clock to the clock board through a cable as a clock reference.

VTCD: Serves as the voice coding/decoding board, and implements the voice coding/decoding, CS data service rate adaptation and UP protocol processing.

IWFB: Offers circuit switching data bearer service for the transparent/non-transparent synchronous or asynchronous data services and the nontransparent fax service. The processing capability is 60 channels.

MRB: Implements 480-channel media resource functions, mainly including Tone/Voice, DTMF detection/generation, MFC detection/generation and conference call. The service functions take 120 channels as one basic subunit and the software can make configurations based on the subunit. The conference call function supports the random configuration with each group consisting of three to 120 parties.

SDTB: Provides the standard optical trunk interface, the STM-1. It can process the CAS and CCS. Each board has the processing capability of 63 E1s or 84 T1s. When the SDTB is connected with the PSTN, the EC function is provided by inserting the EC sub-card.

SPB: Offers access for 16 E1 channels and processes MTP-2 protocol in SS7. The data are packed into the IP packet that is sent to the switching unit through four 100M interfaces.

Backplane

The BGSN is the backplane of the GE switching resource shelf. As the universal service backplane, it can be inserted with

Introduction



multiple service processing modules to form the universal service processing subsystem.

Figure 28 shows the rear view of the BGSN.

F I G U R E 28 BGSN R E AR V I E W

Table 31 shows the external interfaces of the BGSN.

T AB L E 31 E X T E R N AL I N T E R F AC E S O F T H E R E S O U R C E SH E L F


X1~X2 Power socket Connecting the busbar GND, -48V, -48 V GND, and GNDP

Level-1 Switching Shelf This section describes the level-1 switching shelf in the MGW cabinet.


T AB L E 32 TO P I C S I N LE V E L-1 S W I T C H I N G S H E L F S E C T I O N

Topics Page No.



Backplane 42

Rear View

External Interface

Overview

Contents




This section describes the components of the level-1 switching shelf, and configuration rules of the boards with an example.

The backplane of Level-1 switching shelf is BPSN. The boards that can be configured and their configurations are shown in Table 33.

T AB L E 33 B O A R D C O N F I G U R AT I O N O F LE V E L -1 S W I T C H I N G S H E L F

Logical Board

Physical Board


PSN PSN4V/8V Each shelf is fixedly configured with one pair of PSN boards, which adopt the load-sharing working mode.

UIMC UIM Each shelf is fixedly configured with a pair of UIMC boards, which adopt 1 + 1 active/standby working mode.

It is used for connecting the packet data of the resource shelf.

GLI GLIQV A pair of GLI boards must be configured, which adopt 1+1 active/standby working mode.

Rules for inserting boards are introduced below.

UIMC: Is fixedly inserted in the slots 15 and slot 16.

PSN: Is fixedly inserted in the slots 7 and slot 8.

GLI: Is inserted in the slots 1~6 and slots 9~14. At least one pair of GLI boards must be configured, which adopt 1+1 active/standby working mode.

Figure 29 shows the full configuration of the Level-1 switching shelf.

F I G U R E 29 LE V E L -1 S W I T C H I N G S H E L F CO N F I G U R AT I O N

Introduction

Board Configuration

Rule for Inserting

Boards

Configuration Instance




Level-1 switching shelf fulfils interaction for all data of timing, signaling, voice service and data service. It offers corresponding QoS functions for different subscribers according to service requirements.

Level-1 switching shelves use the high-speed switching backplanes. After making the decision on routing and forwarding physical interface data, network processing units send data to the switching network through high-speed switching connection of the backplane to complete the switching. Network processing units receive data from the switching network to complete the processing, and then send data through physical interfaces.

Figure 30 shows the principle of the Level-1 switching shelf.

F I G U R E 30 PR I N C I P L E O F LE V E L -1 S W I T C H I N G S H E L F

PSNUIMC

……

GLI GLI

Resource shelf

Ethernet

Control bus

8 K

Synchronization

Control center

2 × FE

Active Standby

CLKG

Active

Resource shelf

Standby

The function of each board is as follows:

BPSN: Backplane of the Level-1 switching subsystem, which connects such boards as PSN, GLI, and UIMC of the subsystem to constitute the Level-1 switching subsystem.

UIMC: Completes the control plane Ethernet switching between each board inside the shelf. It provides the interface to connect the main control shelf CHUB for the control plane interconnection of main control shelf.

PSN: Completes the packet data switching. It is a self-route Crossbar switching system, which completes the switching function in conjunction with the queue engine on the line interface board, and provides a 40 G/80 G user data switching capacity.

Functions

Principles



GLI: Gigabit Ethernet interface line card of level-1 switching, which provides four GE interfaces (optical access) and accesses services from the UIMT or GUIM board to the level-1 switching platform.

Backplane

The backplane of Level-1 switching shelf in the PS domain is the BPSN.

Figure 31 shows the rear view of the BPSN.

F I G U R E 31 BPSN R E AR V I E W

DIP switch

Power connector

Board locating pin

Fastening screw at the back panel

Back board connector

Table 34 shows the external interfaces of the level-1 switching shelf.

T AB L E 34 E X T E R N AL I N T E R F AC E


X1~X3 Power socket Connecting the busbar GND, -48 V, -48 V GND, and GNDP

Introduction

Rear View

External Interface



Circuit Switching Shelf This section describes the circuit switching shelf in the MGW cabinet.


T AB L E 35 TO P I C S I N C I R C U I T S W I T C H I N G S H E L F S E C T I O N

Topics Page No.



Backplane 45


This section describes the components of the circuit switching shelf, and configuration rules of the boards with an example.

The backplane of circuit switching is BCSN. The boards that can be configured and their configurations are shown in Table 36.

T AB L E 36 B O A R D C O N F I G U R AT I O N O N C I R C U I T S W I T C H I N G S H E L F

Logical Board Name

Physical Board Name


TSNB, ETSN or STSN

TSNB, ETSN or STSN

TSNB, ETSN or STSN boards must be configured, which adopt 1+1 active/standby working mode.

The TSNB board provides 64K switching network; the ETSN board provides 128K switching network; the STSN board provides 256K switching network.

UIMC UIM The UIMC boards must be configured, which adopt 1+1 active/standby working mode.

TFI TFI

At least one pair of TFI boards should be configured, which are sued to connect the circuit data of the resource shelf.

The TFI boards adopt 1+1 active/standby working mode.

CLKG CLKG

The CLKG boards must be configured, which adopt 1+1 active/standby working mode.

Only one pair of CLKG boards is used in one system.

Overview

Contents

Overview

Configuration



The rule for inserting boards to the slots in the circuit switching shelf is as follows:

UIMC boards are fixedly configured in the slots 9 and 10.

TSNB, ETSN or STSN boards are fixedly configured in the slots 5 and 7.

One pair of TFI boards is configured in the slots 1 and 2 when the TSNB board with 64K switching network is configured; two pairs of TFI boards are configured in the slots 1~4 when the ETSB board with 128K switching network is configured. Each pair of TFI boards provides 8 cascade TDM optical interfaces, which can cascade 4 BUSNs.

CLKG boards are fixedly configured in the slots 15 and 16.

Figure 32 shows the architecture of circuit switching shelf.

F I G U R E 32 CO N F I G U R AT I O N O F C I R C U I T S W I T C H I N G SH E L F


Circuit switching shelf is configured for smooth capacity expansion of circuit switching network with a capacity of 64 Kb–256 Kb.

Figure 33 shows the principle of the circuit switching shelf.

Rule for Inserting

Boards

Architecture

Description

Principles



F I G U R E 33 PR I N C I P L E O F T H E C I R C U I T SW I T C H I N G S H E L F

(16*32 MHW)

100 M control flow Ethernet

TSNB/ETSN/STSN

LVDSDTU/ TCU

DTU/TCUDTU/ TCU

DTU/ TCU

(16* 32 MHW)

(16* 32 MHW)

(16* 32 MHW)

LVDSLVDS

LVDSTFI

TFI

TFITFI

TFITFI

TFITFI

UIMUIMC

Control center

CLKGCLKG Synchroniz

ation clock

Synchronization clock



NOTE: TSNB board connects a pair of TFIs, ETSN board connects two pairs of TFIs, and STSN board connects four pairs of TFIs.

BCSN: Bears the functional boards of the large-capacity circuit switching subsystem, interconnects different board signals and provides a 256 K circuit switching connection capacity.

TFI: Provides the optical interface for the large-capacity circuit switching subsystem, to connect the corresponding Level-2 resource subsystem.

TSNB, ETSN or STSN: Provides the 64K, 128K, and 256K circuit TS switching for the system. The circuit data are transmitted to the fiber interface board TFI inside the local shelf through the backplane of the 576 M LVDS.

CLKG: Provides the output clock for the entire system, and can implement Stratum 2 clock or Stratum 3 clock by changing the constant-temperature trough crystal oscillator and through the software. It provides 15-channel 16.384 M, 8 K and PP2S clocks for the UIM through cables, with each channel containing the same groups A and B. In addition, it provides 10-channel 32 M, 64 M and 8 K clocks for the T-network through the BCSN, and can select reference sources at the background or manually, including BITS, line (8 K), GPS and local (Stratum 2 or Stratum 3).

Backplane

Backplane of level-1 switching shelf is BCSN.

Figure 34 shows the rear view of BCSN.

Functions

Description

Rear View



F I G U R E 34 RE A R V I E W OF BCSN

DIP switch

Power connector

Board locating pin

Fastening screw at the back panel

Back board connector

Table 37 shows external interfaces of circuit switching shelf.

T AB L E 37 E X T E R N AL I N T E R F A C E S OF C I R C U I T S W I T C H I N G S H E L F

Interface ID

Purpose Connection Relation

X1–X2 Power socket

Connected to GND, -48V, -48VGND and GNDP on bus-bar.

Busbar The busbar is located at the internal side of the cabinet.

For more convenient and flexible networking, the power supply distribution and the grounding of the ZXWN MGW system are transited through the busbar.

Figure 35 shows the structure of the busbar.

External Interfaces

Position

Function

Structure



F I G U R E 35 BU S B AR S T R U C T U R E

-48V

PE

GND-48V

GND-48V

-48V

-48V

PE

GND-48V

GND-48V

-48V

-48V

GND-48V

PE

GND-48V

GND-48V

-48V

-48V

GND

PE

-48V

-48V

-48V

A

PE

-48VGND

-48VGND

-48V

-48V

-48VGND

PE

-48V

-48VGND

-48V

6:1A

-48V

PE

GND

-48V

-48V

PE

GND

GND-48V

-48V

The busbar is located at right side of the rear cabinet. The busbar provides six terminal groups. From upper to lower, group 1 and 6 provide four connection terminals respectively, corresponding to the signal of -48 V, -48 V GND, PE, and GND. Group1 connects to the power distribution shelf, supplying the power for the busbar. Group 6 only supplies the power to the third fan shelf. Group 2, 4 and 5 provide six connection terminal groups, corresponding to the signal of -48 V, -48 V GND, -48 V DC, -48 V GND, PE, and GND from upper to lower. These terminal groups supply the power to the fan shelves and the service shelves.

The PE interface connects to the protection ground.

The -48V power is output to the P power after being filtered by the two combined filters on the top of cabinet.

In addition, each shelf has a -48 V input power filter, to meet shielding and filtering requirements at shelf level.

For the integrated line connection of the power supply system of the cabinet, refer to Power Cables.

Reference


C h a p t e r 3

MGW Boards

Overview

This chapter describes the hardware structure of various circuit boards, functions, principles and structures of the CLKG, MPx86, MNIC, UIM, GUIM, SPB, VTCD, PSN4V/8V, GLIQV, DTB, CHUB, DTEC, TSNB, ETSN, TFI, SDTB, and PWRD boards.



Topics Page No.

MGW Board Specification 52

Clock Generator Board (CLKG) 56

CLKG Board Appearance 57

CLKG Board Working Principles 65

CLKG Board Functions 66

CLKG Board Technical Indices 67

Main Processing Board (MPx86) 67

MPx86 Board Appearance 68

MPx86 Board Working Principles 73

SMP Board Functions 74

OMP Board Functions 75

MPx86 Technical Indices 77

Multi-Function Network Interface Board (MNIC) 77

MNIC Board Appearance 77

MNIC Board Working Principles 83

SIPI Board Functions 86

MNIC Technical Indices 88

Universal Interface Module Board (UIM)

Introduction

Contents



Topics Page No.

UIM Board Appearance 89

UIM Board Working Principle 92

UIMC Board Functions 93

UIMU Board Functions 93

UIMT Board Functions 94

UIM Technical Indices 95

Rear Boards of UIMC Board 96

Rear Board of UIMU or UIMT Board 97

GE Universal Interface Module Board (GUIM) 99

GUIM Board Appearance 99

GUIM Board Working Principle 104

GUIM Board Functions 104

GUIM Technical Indices 105

Signaling Processing Board (SPB) 105

SPB Board Appearance 106

SPB Board Working Principles 111

SPB Board Functions 113

SPB Technical Indices 113

ATM Process Board (APBE) 113

APBE Board Appearance 114

APBE Board Working Principles 119

APBE Board Functions 119

APBE Technical Indices 120

Inter-Working Function Board (IWFB) 120

IWFB Board Appearance 120

IWFB Board Working Principles 124

IWFB Board Functions 125

IWFB Board Technical Indices 125

Media Resource Board (MRB) 126

MRB Board Appearance 126

MRB Board Working Principles 129

MRB Board Functions 130

MRB Board Technical Indices 131

Voice Transcoder Card (VTCD) 131

VTCD Board Appearance 132

VTCD Board Working Principles 136

Chapter 3 MGW Boards


Topics Page No.

VTCD Board Functions 137

VTCD Board Technical Indices 137

IP Packet Switching Network Board (PSN4V/PSN8V) 137

PSN4V/PSN8V Board Appearance 137

PSN4V/PSN8V Board Working Principles 140

PSN4V/PSN8V Board Functions 141

PSN4V/PSN8V Technical Indices 141

2.5G Line Interface Board (GLIQV) 142

GLIQV Board Appearance 142

GLIQV Board Working Principles 146

GLI Board Functions 146

GLIQV Technical Indices 147

Digital Trunk Board (DTB) 147

DTB Board Appearance 147

DTB Board Working Principles 153

DTB Board Functions 154

DTB Board Technical Indices 155

Digital Trunk Board with EC Function (DTEC) 155

DTEC Board Appearance 155

DTEC Board Working Principles 161

DTEC Board Functions 162

DTEC Board Technical Indices 163

Control Plane Interconnection Board (CHUB) 163

CHUB Board Appearance 163

CHUB Board Working Principles 168

CHUB Board Functions 169

CHUB Technical Indices 169

TDM Switch Network Board (TSNB) 169

TSNB Board Appearance 169

TSNB Board Working Principles 173

TSNB Board Functions 174

TSNB Board Technical Indices 174

Enhanced TDM Switch Network Board (ETSN) 174

ETSN Board Appearance 174

ETSN Board Working Principles 178

ETSN Board Functions 179



Topics Page No.

ETSN Board Technical Indices 179

Advanced TDM Switch Network Board (STSN) 179

STSN Board Appearance 179

STSN Board Working Principles 183

STSN Board Functions 184

STSN Board Technical Indices 184

TDM Fiber Interface (TFI) 184

TFI Board Appearance 184

TFI Board Working Principles 187

TFI Board Functions 188

TFI Board Technical Indices 188

SONET Digital Trunk Board (SDTB) 188

SDTB Board Appearance 188

SDTB Board Working Principles 194

SDTB Board Functions 195

SDTB Board Technical Indices 195

Power Distribution Board (PWRD) 196

PWRD Board Appearance 196

PWRD Board Working Principles 198

PWRD Board Function 199

PWRD Board Technical Indices 199

Corresponding Interface Board 200

MGW Board Specification The hardware of a board includes PCB board, sub-card, panel components (including indicators, extractor and EMC spring plate). Figure 36 shows the structure of a circuit board.

Structure



F I G U R E 36 C I R C U I T B O AR D S T R U C T U R E

4

2 3 1

T AB L E 39 L A B E L S I N M O D U L E S T R U C T U R E

Label Description

1 Front PCB board

2 Components on front panel

3 Sub-card 1

4 Sub-card 2

In the MGW system, there are the following boards based on their different functions.

Interface processing boards provide interfaces between the MGW system and external system, and processes partial protocols as required.

Protocol processing boards implement the processing of respective protocol.

Main control boards control and manage the system, and connects the system to the background.

Intra-shelf interconnected boards implement interconnection of boards in a shelf.

Inter-shelf interconnected boards implement the cascade connection between shelves.

Switching boards provide the IP packet or circuit switching function. All of the boards in the MGW system support the hot swap except the PWRD board.

Table 40 lists the circuit boards used in the MGW system.

Board Function



T AB L E 40 C I R C U I T B O AR D S W I T H TH E I R AB B R E V I A T I O N S

Type Abbreviation Board Name

APBE ATM access processing board

DTB/DTEC Digital Trunk Board

SDTB Sonet Digital Trunk Board

IWFB Inter-Working Function Board

Interface processing unit

MNIC Multi-service Network Interface Card

ETSN Enhanced TDM Switch Network Board

TSNB TDM Switch Network Board

Switching board

PSN4V/8V IP Packet Switching Network Board

Protocol processing board

SPB Signaling Processing Board

CLKG CLOCK Generator Main control module

MPx86 Main Processing Board

UIM Universal Interface Module Intra-shelf interconnection board GUIM GE Universal Interface Module

GLIQV 2.5G Line Interface Board

TFI TDM Fiber Interface

Inter-shelf Interconnection board

CHUB Control HUB Board

MRB Media Resource Board Other functional boards

VTCD Voice Transcoder Card

A number of patterns indicating components are used in the board descriptions, as shown in Table 41.

T AB L E 41 B O A R D C O M P O N E N T S

Name Pattern Description

(1)

The front view of the serial port in the pull-down panel diagram of a circuit board (viewed from the front of the panel of the circuit board). The view in the DIP switch and jumper schematic diagram of the circuit board is (2).

Serial Port (RJ45)

(2)

The front view of the serial port in the DIP switch and jumper schematic diagram of a circuit board (viewed from the side of the circuit board). The view in the pull-down panel diagram of the circuit board is (1).




ON1 2

3 4

5 6

7 8

ON1 2

3 4

( 1 )

The front view of 8- and 4-position DIP switches in the pull-down panel diagram of a circuit board (viewed from the front of the panel of the circuit board). The view in the DIP switch and jumper schematic diagram of the circuit board is (2).

1 2

3 4

5 6

7 8

1 2

3 4

(2)

The front view of 8- and 4-position DIP switches in the DIP switch and jumper schematic diagram of a circuit board (viewed from the side of the circuit board). The view in the pull-down panel diagram of the circuit board is (1).

DIP Switch

OFF ON

OFF ON

The side view of 8- and 4-position DIP switches in the DIP switch and jumper schematic diagram of a circuit board (viewed from the side of the circuit board). There is no corresponding view for such DIP switches in the pull-down panel diagram of the circuit board. The patterns for a DIP switch on other positions are similar to this view. In the pattern, black blocks indicate the positions where the DIP switch is set. “OFF” indicates that the DIP switch is set to “OFF” by default. “ON” indicates that the DIP switch is set to “ON” by default.

(1)

The front view of the reset switches in the pull-down panel diagram of a circuit board (viewed from the front of the panel of the circuit board). The view in the DIP switch and jumper schematic diagram of the circuit board is (2).

(2)

The front view of the reset switch in the DIP switch and jumper schematic diagram of a circuit board (viewed from the side of the circuit board). The view in the pull-down panel diagram of the circuit board is (1).

Reset switch

The front view of the reset switch in the DIP switch and jumper schematic diagram of a circuit board.




Jumper

The front view of the jumper in the DIP switch and jumper schematic diagram of a circuit board (viewed from the side of the circuit board). The left view indicates that, by default, the jumper is set to short. The right view indicates that, by default, the jumper is broken. Other jumpers are similar to these views.

Fiber inlet

The front view of the fiber inlet in the pull-down panel diagram of a circuit board (viewed from the front of the panel of the circuit board).

STM-1 high-speed coaxial cable inlet

The front view of the high-speed coaxial cable inlet in the pull-down panel diagram of a circuit board (viewed from the side of the circuit board).

Note:

In the description of the functions of DIP switches or jumpers, if a function is described as “reserved”, it indicates that the corresponding DIP switch or jumper is limited by the ZXWN MGW system. Then, only the default settings can be used.

When the circuit board is equipped with large-scale Integrated Circuit (IC), always remember to protect against static during operation. Follow the operational rules strictly to prevent any damage of circuit board caused by static.

As the board itself consumes lots of power, always keep good ventilation to blow away heat.

Clock Generator Board (CLKG) This section describes the CLKG board.

Precautions

Introduction




T AB L E 42 TO P I C S I N CL O C K GE N E R AT O R B O AR D (CLKG) S E C T I O N

Topics Page No.

CLKG Board Appearance 57

CLKG Board Working Principles 65

CLKG Board Functions 66

CLKG Board Technical Indices 67

CLKG Board Appearance

The CLKG board is the clock generator board in the system.

The front and side view of the CLKG board are shown in Figure 37 and Figure 38.

Contents

Overview

Outside View



F I G U R E 37 PAN E L O F T H E CLKG

2Mbps1

2MHz1

8K1

8K3

QUTD

ENUM

ACT

CLKG

2MHz2

2Mbps2

NULL

MANI

MANSL

MANEN

8K2

ALM

RUN

EXCH

TRACE

KEEP

FREE

CATCH

RST



F I G U R E 38 LAY O U T O F T H E CLKG C I R C U I T B O AR D

X40X41 X42

X43

X48

X50

X60

X53X54 X56 X55

X45

X44

X47

X46

NOTE: The block in the jumper indicates pin 1 in the following descriptions.

There are 18 indicators on the panel of the CLKG. Their meanings are described in Table 43.

T AB L E 43 I N D I C AT O R S O F CLKG B O AR D

Name Color Indication Description

RUN Green RUN indicator Flash: board is normal.

Long-time on: The crystal is pre-heating.

Off: board is abnormal.

Indicators




ENUM Yellow Board extraction indicator

When the board is plugged into a slot, the ENUM indicator is on. That is, when the software is not started when the board is powering on, the ENUM indicator is on.

When the software detects the ENUM signal and knows that the extractor is closed, the ENUM indicator is turned off, indicating that the system starts to work.

To unplug the board, open the extractor first and turn the switch slightly. An ENUM interruption signal is generated to the CPU. After the CPU exits from the working status under the control of the system, the ENUM indicator comes on, meanwhile the system continuously checks whether the ENUM signal is changed. When the ENUM indicator is on, it indicates that the board can be plugged. (If the ENUM indicator is off, do not unplug the board forcedly. Otherwise, services will be lost.)

If the maintenance personnel close the extractor again without unplugging the board, then the software can detect that the ENUM signal is changed, thus knows the extractor is closed again. The software restarts to enter the working status, and the ENUM indicator is off simultaneously.

ACT Green Active/standby indicator

On: board is active.

Off: board is standby.

ALM Red Alarm indicator

The indicator is on when the board detects an error in the SRAM and output clock lost.

CATCH Green Catch indicator

When the indicator is on, it indicates that the board is currently in the catch status, that is, having reference, and unlocked.

TRACE Green Trace indicator When the indicator is on, it indicates that the board is currently in the trace status, that is, having reference, and locked.




KEEP Green Keep indicator When the indicator is on, it indicates that the board has been locked, but the midway reference is lost.

FREE Green Free running indicator

When the indicator is on, it indicates that the board is in free running status, that is, the board is not locked to any inference, and no reference is available.

2Mbps1 Green Reference indicator

It is used to indicate the clock reference selected in the CLKG board. When the indicator is on, it indicates the reference is the first channel 2M clock provided by BITS equipment and transmitted in HDB3 code.

2Mbps2 Green Reference indicator

It is used to indicate the clock reference selected in the CLKG board. When the indicator is on, it indicates the reference is the second channel 2M clock provided by BITS equipment and transmitted in HDB3 code.

2MHz1 Green Reference indicator

It is used to indicate the clock reference selected in the CLKG board. When the indicator is on, it indicates the reference is the first channel 2M clock, provided by BITS equipment and transmitted in TTL differential mode.

2MHz2 Green Reference indicator

It is used to indicate the clock reference selected in the CLKG board. When the indicator is on, it indicates the reference is the second channel 2M clock provided by BITS equipment and transmitted in TTL differential mode.

8K1 Green Reference indicator

It is used to indicate clock reference selected in the CLKG board. When the indicator is on, it indicates the reference is line 8k Hz clock provided by such boards as the DTEC, APBE, SDTEC, and SPB.


It is used to indicate clock reference selected in the CLKG board. When the indicator is on, it indicates the reference is 8k Hz clock provided by the GPS module.





It is used to indicate clock reference selected in the CLKG board. When the indicator is on, it indicates the reference is 8k Hz clock provided by the UIMC board.

NULL Green Reference indicator

It is used to indicate clock reference selected in the CLKG board. When the indicator is on, it indicates there is no external reference available currently.

QUTD Red Reference deterioration indicator

On: indicating reference deterioration.

MANI Green Indicator for allowing manually selecting reference

On: The reference can be selected manually.

Off: The reference cannot be selected manually.

Table 44 shows the buttons on the CLKG board.

T AB L E 44 B U T T O N S O N CLKG B O AR D

Button Name Description

EXCH Performs active/standby changeover of the CLKG board.

RST Resets the CLKG board.

MANSL Manually selects external 8K clock reference.

MANEN Enable manual selection of external 8K clock reference.

Figure 38 shows the jumper location.

X40~X41, X44~X45: selection of the first 2M bit/s and 2M Hz matching impedance of BITS clock.

When Pin 1 and Pin 2 are short-circuited, it means the matching impedance is 75 Ω.


X42~X43, X46~X47: selection of the second 2M bit/s and 2M Hz matching impedance of BITS clock.



Buttons

Jumpers



X53~X56: grounding protection jumper of coaxial cable shell for inputting two 2M bit/s and 2M Hz clocks.

When 1 and 2 are short-circuited, it means the cable sleeve is connected to the protection ground.

X48 and X50 are for debug use, disconnected at ordinary times.

X60 is the jumper of RS485 connection relation.

During debugging, download data through serial ports of the computer; 3-5 and 4-6 are short-circuited.

When communicating with the background through the RS485 at ordinary times, 1-3 and 2-4 are short-circuited.

Note:

Block of upper jumper hint in Figure indicates pin 1. The following layout diagrams are drawn according to the same principle.

The corresponding rear board of the CLKG is RCKG1 and RCKG2. The RCKG1 board must be configured, while the RCKG2 board is optional according to the requirements.

Its panel is shown in Figure 39.

Corresponding Rear Board



F I G U R E 39 PAN E L D I AG R A M O F T H E RCKG1 AN D RCKG2

RCKG1

8KIN

1

CLK

OU

TP

P2S

/16C

HIP

2Mbp

s/2M

Hz

8KIN

2

CLK

OU

T

CLK

OU

T

CLK

OU

T

RCKG2

CLK

OU

T

The interfaces on the RCKG1 and RCKG2 are as shown in Table 45.



T AB L E 45 I N T E R F AC E S O N RCKG1 AN D RCKG2

Name Description

CLKOUT (DB44 interface)

Providing 3-set 8K/16M/PP2S system clock output interfaces, which are usually output to the UIM. For RCKG1 and RCKG2, there are five CLKOUT interfaces in total, that is, the CLKG board can provide up to 15-set 8K/16M/PP2S system clock output interface.

8KIN1 and 8KIN2 (RJ45 interface)

The input interfaces of the 8 K reference clock, accessing the 8 K reference clock provided by the DTEC, SPB, APBE, SDTEC, and GPS.

2 Mbps/2 MHz (DB9 interface)

Accessing two-channel 2 Mbps or 2 MHz reference clock.

PP2S/16CHIP (RJ45 interface)

Providing the input interface of the P2S/16CHIP reference clock from the GPS.

The CLKG has the following external interfaces.

15 sets of 8K/16M/PP2S system clock output interfaces

Two sets of 8 K reference input interfaces for the DTEC, SPB, APBE and SDTEC

Two sets of 2 Mbps and 2 MHz reference input interfaces

One set of PP2S and 16CHIP reference input interface for GPS module

CLKG Board Working Principles

Figure 40 shows the schematic diagram of the CLKG.

F I G U R E 40 SC H E M AT I C D I AG R AM O F CLKG

Local crystal oscillator

Active/Standby changeover circuit

CPU sub-system

Phase-locked loop

frequency synthesis

circuit

PP2S transceiver

circuit

RS485

Changeover signal input Changeover signal output

Reference clock signal input PP2S signal output

Reference selection

Reference test

8K, 16K, 32M and 64M clock signal

GPS, circuit 8K

2MHz, 2MBit/s

16CHIP, PP2S

Schematic Diagram



The CLKG board communicates with the main control unit through the RS485.

The following clocks can serve as the local clock reference.

The clock reference 8 KHz frame synchronizing signal from the SPB

The 2MHz / 2Mbit/s signal from the BITS system

The 8 k (PP2S, 16CHIP) clock signal from the GPS equipment

The 8 kHz clock signal from the UIM board, synchronizing with the upper-level office clock when it serves as the local clock reference.

The CLKG can perform deterioration judgment on these input references. If the reference is lost, the CLKG will generate corresponding alarm signal.

The CLKG conducts the phrase lock after selecting one channel of input reference clock from the input clocks, and outputs the 16M frame header signal meeting the time sequence requirements. And it assigns this signal to the UIM board by balancing the drive. For the received PP2S and 16 CHIP signals, it obtains the new PP2S signal through the pulse broadening, and then distributes this new signal to the UIM. The frame lock system adopts the loose coupling phase-locked principle.

CLKG Board Functions

The CLKG board provides the required clock for the MGW system. With the hot active/standby design, the active and standby CLKG boards are locked to the same reference to implement smooth changeover. The CLKG adopts a measure to filter out jitters to remove possible burrs or jitters of the clock during the changeover.

The CLKG has the following functions:

Communicate with the control console through the RS485 bus.

Allow to select reference sources in the background or manually, including the BITS, line (8 K), GPS, and local (level-2 or level-3). Manual switchover can be shielded through software. The sequence for selecting references manually is:

2 Mbit/s1-2 Mbit/s2-2 MHz1-2 MHz2-8 K1-8 K2-8 K3-NULL

Adopt the loose coupling phase-locked system, working in four modes: CATCH, TRACE, HOLD and FREE

The output clock can be level 2 or level 3, implemented by changing the constant-temperature crystal oscillator and corresponding software.

Processing Flow

Overview

Functions



Provide 15-channel 16.384 M, 8 K and PP2S clocks to the UIMC.

Be capable of clock lost alarming and deterioration judgment of inputted reference.

Be capable of active/standby changeover function with the hot active/standby design. The active and standby CLKG boards are locked to the same reference to implement smooth changeover. The CLKG adopts the measure of filtering out phase jitters to remove possible burrs or jitters of the clock during changeover. Provide such modes as the command changeover, manual changeover, fault changeover, and reset changeover. The Bit Error Ratio (BER) effect on the system during maintenance changeover is less than 1%.

The discontinuity between phases of two CLKG boards is less than 1/8 UI code element.

Provide relatively sound alarm function, including SRAM failure alarm, constant-temperature trough alarm, reference and output clock loss alarm, reference deterioration alarm, reference frequency deviation exceeding standard alarm and phase-locked loop phase detection loss alarm. These alarms facilitate to quickly detect the current working status and failure location of the clock generating board.

The clock is maintainable. The VCXO provides the frequency modulation knob to facilitate frequency modulation when the axis frequency deviates in a certain range due to the aging of quartz crystal several years later.

CLKG Board Technical Indices

16 W

Supported

Main Processing Board (MPx86) This section describes the MPx86 board.


T AB L E 46 TO P I C S I N M AI N P R O C E S S I N G B O AR D (MP X 86) S E C T I O N

Topics Page No.

MPx86 Board Appearance 68

Power Consumption

Hot Swap

Introduction

Contents



Topics Page No.

MPx86 Board Working Principles 73

SMP Board Functions 74

OMP Board Functions 75

MPx86 Technical Indices 77

MPx86 Board Appearance

In the MGW system, the MPx86 board serves as two functional units, the OMP and the SMP.

Figure 41 shows its front view, and Figure 42 shows its circuit board layout.

Overview

Outside View



F I G U R E 41 PAN E L D I AG R A M O F MPX 86 B O AR D

OMP SMP

USB1 USB2 USB2USB1

ENUM2 RUN2

OMC1

HD1 HD2

OMC2

ACT2EXCH2

ALM2

EXCH1

RST

ENUM1

ACT1 ALM1

RUN1

ENUM2 RUN2

ALM2

HD2

EXCH2

HD1

ACT2

RUN1

EXCH1ALM1

RST

ACT1

ENUM1



F I G U R E 42 LAY O U T D I AG R AM O F MP X 86 C I R C U I T B O AR D

CPU_A

CPU_B

Power Module

X8

Hard Disk

Hard Disk

NOTE: When the MPx86 Board serves as the OMP, there is only a hard disk on the lower right of the circuit board. When it serves as the SMP, there are two hard disks.

Table 47 shows indicators on the MPx86 board.

T AB L E 47 I N D I C AT O R S O N T H E MP X86 BO AR D

Name Color Name Description

ALM1 Red Alarm indicator of the CPU subsystem A

On: An alarm exists on the board.

Off: No alarm is generated on the board.

RUN1 Green Run indicator of the CPU subsystem A

During power-on, the run indicator flashes at 5 Hz.

After successful power-on, the run indicator flashes at 1 Hz.

If the power-on fails, the run indicator keeps flashing at 5 Hz.

ACT1 Green Active/standby indicator of the CPU subsystem A

On: active.

Off: standby.

Indicators




ENUM1

Yellow Board extraction indicator of the CPU subsystem A





ALM2 Red Alarm indicator of the CPU subsystem B


Off: no alarm exists on the board.

RUN2 Green Run indicator of the CPU subsystem B

If the indicator flashes slowly, it indicates that the board runs normally.

ACT2 Green Active/standby indicator of the CPU subsystem B

On: active.

Off: standby.




ENUM2

Yellow Board extraction indicator of the CPU_B

When the board is plugged into a slot, the ENUM indicator is on. That is, when the software is not started when the board is being powered on, the ENUM indicator is on.




OMC1 Green OMC Ethernet indicator at background of subsystem A

On: OMC1 Ethernet port at the background of the rear board can be pinged through.

Off: OMC1 Ethernet port at the background of the rear board cannot be pinged through.

OMC2 Green OMC Ethernet indicator at the background of subsystem B

On: OMC2 Ethernet port at the background of the rear board can be pinged through.

Off: OMC2 Ethernet port at the background of the rear board cannot be pinged through.




HD1 Red Hard disk indicator of subsystem A

On: hard disk in the subsystem A is working.

Off: Hard disk in the subsystem A is not working.

HD2 Red Hard disk indicator of subsystem B

On: hard disk in the subsystem B is working.

Off: hard disk in subsystem B is not working.

Table 48 shows buttons on the MPx86 board panel.

T AB L E 48 P AN E L B U T T O N S O N MP X 86 B O A R D

Name Description

RST Resets the MPx86 board.

EXCH1 Performs active/standby changeover of the system A.

EXCH2 Performs active/standby changeover of the system B.

There is an X8 jumper on the MP module, as shown in Figure 42.

The X8 jumper is used for selecting the Debug version or Release version.

Short-circuited: Debug version

Not short-circuited: Release version.

MPx86 Board Working Principles

In the MGW system, an MPx86 module can be used as two functional units, the OMP and the SMP.

Figure 43 shows the principle of the MPx86 circuit board.

Buttons

DIP Switches and Jumpers

Overview

Schematic Diagram



F I G U R E 43 SC H E M AT I C D I AG R AM O F T H E MP X 86 B O AR D

BACKPLANE

Panel

Pow

er m

anagement

Logical time sequence adjustment

and control management

CPU sub-system 1

PCI bus

Bridge slice2*USB

IDE

Ethernet interface

circuitBIOS

Periphery memory Serial port chip

RS232

Power management 485

Backplane ID

GPS management 485

Backup RS485

Control flow Ethernet

Media flow Ethernet

OMC Ethernet

Active/Standby Ethernet

Logical time sequence adjustment

and control management

CPU sub-system 2

BIOS


Media flow Ethernet

OMC Ethernet


PCI bus

Ethernet interface

circuit

There are two sets of CPU systems on one MPx86 board, individually called CPU_A and CPU_B. Two CPU systems are independent from each other. The CPU_A is the main control CPU system, managing the circuit boards. When the MPx86 board serves as the OMP board, the CPU_A conducts as the RPU module, while CPU_B serves as the OMP module.

Besides two CPU systems, there is a public power supply on the board to supply power to the whole board. The MPx86 board also provides externally the control flow, media flow, active/standby Ethernet and OMC Ethernet, power management 485, GPS 485 and UIM-communication 485 interfaces.

SMP Board Functions

The MPX86 board has powerful processing ability. Configured with bulk memory as high as 2G, the MPX86 board also provides many external interfaces such as IDE, 10/100M Ethernet, RS485, RS232 and USB interfaces. The MPx86 board uses the standard PCI bus to connect with other peripheral equipments and supports MP active/standby switchover function. It has control register and data register to set the functions of the board through the main control software and exchange the working status data.

When the MPX86 board is used as the SMP board, it completes the bearer control function, and processes various kinds of signaling. When the SGW function is built in the MGW, it completes the conversion of various kinds of signaling, such as the inter-working between the SCN and IP domains.

When MPx86 serves as the SMP, its corresponding rear board is a blank panel.

Working Principles

Functions




OMP Board Functions

Serving as the OMP, the MPx86 module is responsible for processing the overall procedure and implementing the control related to the operation and maintenance of entire system (including operation and maintenance agent). In addition, it connects with the OMC through the 100M Ethernet port, implementing the separation between internal and external network segment. As the processing core of MGW operation and maintenance, the OMP directly or indirectly supervises and manages boards in the system.

When the MPX86 board is used as the OMP board, it is responsible for the global process and implements the control functions (including the operation and maintenance agent) related with the operation and maintenance of the whole system. Connected with the OMC through the 100M Ethernet port, the OMP board implements the isolation between the internal network section and the external one. The OMP also acts as the operation and maintenance core of the MGW, directly or indirectly monitoring and managing the boards in the system.

When the MPx86 serves as the OMP, its corresponding rear board is the RMPB.

Figure 44 shows the corresponding panel of the RMPB board.

Functions




F I G U R E 44 PAN E L D I AG R A M O F T H E RMPB

RMPB

PD

485

DE

BU

G1-

232

DE

BU

G2-

232

RS

232

GP

S48

5O

MC

2O

MC

1

The interfaces on the RMPB are described as follows:

OMC1 and OMC2 (FE interface): connects with the background maintenance system. Usually, only the OMC2 is used.

DEBUG1-232 and DEBUG2-232: are used for the test, and does not provide the service functions.

PD486 (RJ45 interface): connects with the RS485 interface of the PWRDB on the power distribution shelf. It receives the alarm information monitored by the PWRN, including the



power, fan, access control and environment alarm information.

GPS485: is used to connect with the GPS module for communication.

RS232 (RJ45 interface): is responsible for the out-of-band management of OMP.

MPx86 Technical Indices

45 W

Supported

Multi-Function Network Interface Board (MNIC) This section describes the MNIC board.


T AB L E 49 TO P I C S I N M U L T I -FU N C T I O N N E T W O R K I N T E R F AC E B O AR D (MNIC) S E C T I O N

Topics Page No.

MNIC Board Appearance 77

MNIC Board Working Principles 83

IPI Board Functions 84

SIPI Board Functions 86

MNIC Technical Indices 88

MNIC Board Appearance

In the ZXWN MGW system, the MNIC circuit board serves as the logical board of the SIPI and IPI boards. There are five types of IPI boards according to different interfaces.

IPI board providing the FE interface (IPI (FE) for short)

IPI board providing the GE optical interface (IPI (GE optical) for short)

IPI board providing the GE electric interface (IPI (GE electric) for short)

Power Consumption

Hot Swap

Introduction

Contents

Overview



IPI board providing the 155M POS interface (IPI (POS155M) for short)

IPI board providing the 622M POS interface (IPI (POS622M) for short).

Figure 45 shows the front panel of the SIPI board.

F I G U R E 45 S IP I OU T S I D E V I E W

SIPI Outside View



Figure 46 and Figure 47 show five types of the IPI board.

From left to right, Figure 46 shows the IPI (FE), IPI (GE optical) and IPI (GE electrical) boards, while Figure 47 shows the IPI (POS155M) and IPI (POS622M) boards.

F I G U R E 46 MNIC B O AR D P AN E L (1 )

IPI Outside View



F I G U R E 47 MNIC B O AR D P AN E L (2 )



Table 50 describes the indicators on the MNIC board panel.

T AB L E 50 I N D I C AT O R S O N MNIC P AN E L


RUN Green RUN indicator During the power-on, the run indicator flashes at 5 Hz.

After successful power-on, the run indicator flashes at 1 Hz.

If the power-on fails, the run indicator constantly flashes at 5 Hz.


ON: An alarm exists on the board.

OFF: no alarm exists on the board.






Indicators





On: The board is active.

Off: The board is standby.

LINK1 Green Status indicator of external 100 M access network port 1

On: The external 100M access network port 1 is connected.

Off: The external 100 M access network port 1 is not connected.


On: The external 100 M access network port 2 is connected.








ACT (upper)

Green Active/standby indicator

ON: The board is active.

OFF: The board is standby.

ACT (Below)

Green Optical interface activation indicator

Indicating whether the optical interface is activated at present.

SD Green Optical signal indicator

Indicating whether the optical interface has received optical signals.

Table 51 shows the buttons on the MNIC panel.

T AB L E 51 B U T T O N S O N MNIC M O D U L E

Name Description

RST Resets the MNIC board

EXCH Performs active/standby changeover of the MNIC board.

There is no jumper or DIP switch on the MNIC board.

The MNIC board offers different interfaces externally when it serves as different boards.

Button Description

DIP Switch and Jumper

External Interface



When it serves as the SIPI board, the MNIC board does not provide interface externally.

When it serves as IPI (FE) or IPI (GE electric), the MNIC board provides the interface through the rear board.

When it serves as IPI (GE optical), its panel provides a GE optical interface.

When it serves as IPI (POS155M), its panel provides four 155M optical interfaces. The first and second channels of the optical interface are mutually active/standby protected, and the third and fourth channels of the optical interface as well. It provides two groups of 155M SDH optical interfaces.

When it serves as IPI (POS622M), its panel provides two 622M optical interfaces. The first and second channels of the optical interface are mutual active/standby protection. It provides one group of 622M SDH optical interfaces.

MNIC Board Working Principles

Figure 48 shows the principles of the MNIC board.

F I G U R E 48 SC H E M AT I C D I AG R AM O F MNIC B O AR D

PCI

bus

Inte

rnal

bus

The MNIC board consists of the network processor subsystem, physical interface part, and CPU subsystem. The minimum network processor system and Ethernet interface part are placed on the backplane. The CPU unit adopts the mode of sub-cards. Data transmission between the sub-cards and the network processor is performed through the PCI bus and internal buses.

Schematic Diagram

Working Principles



CPU sub-card and Ethernet chips are peripheral devices on the PCI bus of the network processor. Sub-cards are connected in standard mode. One of two Ethernet chips serves as a data backup channel. If the CPU sub-card exists, the data backup channel is provided by the CPU and needs no installation. If the CPU sub-card does not exist, this channel is used for active/standby data backup. Another Ethernet chip serves as a control flow channel to communicate with the UIMC. In addition, it can be used to debug and download codes.

IPI Board Functions

In the ZXWN MGW system, the MNIC circuit board serves as the SIPI and IPI logical boards.

When it serves as the IPI interface module, it works in 1+1 backup or load-sharing mode.

The IPI provides a physical interface to external IP network. For the IP data accessed to the system, it first processes the bottom-layer protocol. It forwards service flow data of a user plane to the corresponding internal processing boards through the media flow switching Ethernet, based on the destination address routes of the IP data packets. In addition, the IPI also performs such protocol processing as the IP data filtering and the NAT translation to protect internal IP communication.

Following are the functions of IPI board.

Providing 1×100M control flow Ethernet interface

Providing 1×100M Ethernet interface for the communication between active and standby boards

Providing 4×100M or 1×100M Ethernet interface internally

Providing RS485 backup control channel interfaces

Supporting 1+1 active/standby logical control of the board

Providing at most four 100M and one 1000M Ethernet interfaces, two groups of 155M POS interfaces (optical interface active/standby protection), or one group of 622M POS interface (optical interface active/standby protection).

The MGW system supports five types of IPI boards (FE, GE optical, GE electric, 155M POS and 622M POS interfaces), which provides different interfaces externally. Rear boards of each board are as follows.

IPI (GE optical), IPI (POS155M), and IPI (POS622M) have no rear board. Its panel provides the external optical interfaces. For detailed contents, refer to MNIC Board Appearance.

The RMNIC board is the rear board of the IPI (FE).

The RGER board is the rear board of the IPI (GE optical).

Figure 49 shows the panel diagram of the RMNIC and RGER.

Introduction

Functions

Function Indices




F I G U R E 49 RGER P AN E L D I AG R AM

RMPB

PD

485

DE

BU

G1-

2 32

DE

BU

G2-

2 32

RS

232

GPS

485

OM

C2

OM

C1

RGER

GE1

GE2

The RMNIC rear board of the IPI (FE) provides the following interfaces.

FE1 ~ FE4 (RJ45 interface): Provides four FE interfaces for the IPI board. The SIPI board only uses the FE1 interface and supports IP signaling flow at most 60Mbit/s.



8KOUT/ARM232 (RJ45 interface): is used for debugging without service function.

PrPMC232 and DEBUG-FE (RJ45 interface): are used for debugging without service function.

The RGER rear board of the IPI (GE electric) provides the following interfaces.

GE1 (RJ45 interface): provides 1000M electronic interface access.

GE2 (RJ45 interface): is not used.

PrPMC-232 and DEBUG2-232 (RJ45 interface): are used for debugging without service function.

SIPI Board Functions

In the ZXWN MGW system, the MNIC circuit board serves as the SIPI and IPI logical boards, working in the 1+1 backup or load-sharing mode.

When used as the SIPI board, the MNIC board provides the bottom-layer IP interface of the H248 signaling of the Mc interface. The SIPI board performs the bottom-layer IP protocol processing first for the packet data entering the system, and sends the SCTP packet to the home SMP through the control Ethernet port of the resource shelf. The SMP performs the processing of the SCTP, M3UA and other upper-layer protocols.

The SIPI board also can implements the IP data filter, NAT conversion and other protocol processing as required to protect the IP communication inside the equipment.

Following are the functions of SIPI board.

Providing 1×100M control flow Ethernet interfaces

Providing 1×100M Ethernet interface for the communication between active and standby boards

Providing RS485 backup control channel interfaces

Supporting 1+1 active/standby logical control of the board

Providing one 100M Ethernet interface for the external network.

When the MNIC board is used as SIPI functional board, its corresponding rear board is the RMNIC board.

Figure 50 shows the panel diagram of the RMNIC.

Introduction

Functions




F I G U R E 50 PAN E L D I AG R A M O F T H E RMNIC

PrP

MC

232

8 KO

UT/

ARM

232

DEB

UG

-FE

F E4

F E3

RMNIC

FE2

FE1

The RMNIC board provides the following interfaces.

FE1 ~ FE4 (RJ45 interface): The SIPI board only uses the FE1 interface and supports IP signaling flow at most 60Mbit/s. When the RMNIC serves as the rear board of the IPI board, it provides four FE interfaces.



8KOUT/ARM232 (RJ45 interface): provides the output of 8K system clock, which can be output to the UIM board to provide the reference clock for the boards in the shelf. In addition, this interface can be used for debugging. At this moment, it does not provide the service function.

PrPMC232 and DEBUG-FE (RJ45 interface): are used for debugging without service function.

MNIC Technical Indices

IPI (FE): 30 W.

IPI (GE optical): 40 W.

IPI (GE electric): 40 W.

IPI (POS155M): 40 W.

IPI (POS622M): 40 W.

SIPI: 24 W.

Supported

When the MNIC board serves as the SIPI board, it provides one FE interface.

When the MNIC board serves as the IPI board, it provides at most four FE interfaces, one GE interface (electric or optical), two groups of 155M SDH interfaces (optical interface active/standby protection), or one group of 622M SDH interface (optical interface active/standby protection).

Universal Interface Module Board (UIM) This section describes the UIM board.


T AB L E 52 TO P I C S I N U N I V E R S A L I N T E R F AC E M O D U L E BO AR D (U IM) SE C T I O N

Topics Page No.

UIM Board Appearance 89

UIM Board Working Principle 92

UIMC Board Functions 93

UIMU Board Functions 93

UIMT Board Functions 94

UIM Technical Indices 95

Power Consumption

Hot Swap

Service Capability

Introduction

Contents



Topics Page No.

Rear Boards of UIMC Board 96

Rear Board of UIMU or UIMT Board 97

UIM Board Appearance

The UIM board in the MGW can be used as the UIMC, UIMU, and UIMT boards.

Figure 51 shows the panels of UIM, UIMU, and UIMT. Figure 52 shows the layout of UIM board.

F I G U R E 51 PAN E L S O F U IM, U IMU, AN D U IMT

Overview

Outside View



F I G U R E 52 U IM L AY O U T

GCS/GXS/GTS

Sub-card

CPU Sub-card

Table 53 shows indicators of UIM board. There are total 16 indicators in UIM board.

T AB L E 53 I N D I C AT O R S O F U IM B O AR D


RUN Green RUN indicator Flashing at 5 Hz: indicates board is powering on.

Flashing at 1 Hz: indicates board is running normally.


On: active

Off: Standby.




Indicators









ACT-P Green Packet domain indicator

On: The UIM board in packet domain is running normally.

Off: The UIM board in packet domain is not running normally.

ACT-T Green Circuit switched domain indicator

On: The UIM board in circuit domain is running normally.

Off: The UIM board in circuit domain is not running normally.

LINK1~LINK10

Green Status indicator of control plane cascade interface

On: Control plane cascade 100M interface is connected.

Off: Control plane cascade 100M interface is not connected.

ACT1~2

Green Status indicator of GE interface 1

Indicating currently activated optical interface.




SD1~4 Green Optical signal indicator of GE interface 1~4

Indicating whether the optical signals are received by the optical module.

Table 54 shows list of buttons on UIM board.

T AB L E 54 B U T T O N S I N UIM B O AR D


EXCH Perform active/standby changeover of UIM board

RST Reset UIM board

There is no a DIP switch or jumper on UIM board.

UIM Board Working Principle

Figure 53 shows working principle of UIM board.

F I G U R E 53 U IM B O AR D W O R K I N G P R I N C I P L E

CPU sub-system Periphery memory

PCI bus

Control panel Ethernet

Logical control circuit

User panel Ethernet

RS485

Media panel-control panel

interconnection

Gigabit optical interface on media panel

Gigabit electro interface on media panel

RS232


Debugging Ethernet

GCS sub-card

GXS sub-card

GTS sub-card

24×100M+2×1000MMedia panel Ethernet

24×100M+2×1000M

Control panel Ethernet

Internal bus

Buttons




UIMC Board Functions

When the UIM serves as the UIMC board, it is only used in the control shelf, level-1 switching shelf, and circuit switching shelf, acting as the HUB to exchange the control plane data.

Following are functions of UIMC board:

UIMC provides two 24+2 switched HUBs. One is the control plane Ethernet HUB, and the other is the user plane Ethernet HUB. The control plane Ethernet HUB and the user plane Ethernet HUB provide 10 external control plane FE interfaces for interconnection between control planes in the shelf through the GE interconnection mode.

UIMC provides one external user plane GE interface to cascade the CHUB in the control shelf.

Internal FE ports on two hot active/standby boards and 8MHW use high resistance multiplexed mode for backup on the backboard.

UIMC provides functions such as reading the cabinet number, shelf number, slot number, equipment number, and backboard version number.

UIMC provides the internal RS-485 management interface and board reset and reset signal collection function.

UIMC provides clock-driven function inside the resource shelf. After phase lock and drive, input PP2S, 8K, 16M signals are distributed to various slots of the resource shelf. It provides 16M, 8K and PP2S clocks for the resource boards.

UIMC also provides MAC configuration, VLAN and broadcast packet control functions.

UIMC can be compatible with the commercial HUB.

UIMU Board Functions

When the UIM serves as the UIMC board, it is only used in the control shelf, level-1 switching shelf, and circuit switching shelf, acting as the HUB for exchanging the control plane data.

When the UIM serves as the UIMU board, it is generally used in the resource shelf, acting as the HUB to exchange the data of control plane and user plane. It provides the 16K circuit switching function. It does not provide the optical interface for the circuit switching shelf (big T-network), but provides a group of optical interface (active/standby protection) for the packet switching shelf. It is applied at the single-shelf or multi-shelf configuration with small circuit switching capacity (at most 16K timeslot TDM switching).

Following are functions of UIMU board.

Description

Functions

Description

Functions



UIMP provides two 24+2 switched HUBs. One is the control plane Ethernet HUB, and the other is the user plane Ethernet HUB. The control plane HUB provides 20 internal control plane FE interfaces to interconnect with the boards of the resource shelf, and also provides 4 external control plane FE interfaces that are used between resource shelves or for interconnection between the resource shelf and the CHUB. The user plane HUB provides 23 internal FE to interconnect resource shelves and one external FE.

UIMU provides one or two internal user plane GE interfaces and provides 1-2 GE slots for the resource shelf.

UIMU can provide the 16K circuit switching function within the resource shelf. This function cannot coexist with the external multiplexing function on the UIMT board. These two functions are selected through inserting different daughter cards and selecting the welding methods.


UIMU provides functions such as reading the cabinet number, shelf number, slot number, equipment number, and backboard version number.

UIMU provides the internal RS-485 management interface and board reset and reset signal collection function.

UIMU provides clock-driven function inside the resource shelf. After phase lock and drive, input PP2S, 8K, 16M signals are distributed to various slots of the resource shelf. It provides 16M, 8K and PP2S clocks for the resource boards.

UIMU also provides MAC configuration, VLAN and broadcast packet control functions.

UIMU can be compatible with the commercial HUB.

UIMT Board Functions

When the UIM serves as the UIMT board, it is generally used in the resource shelf to exchange the data of control plane and user plane. Without the circuit switching function, it provides the timeslot resource for the local shelf through interconnecting with the big T-network. It provides optical interfaces for the resource shelf to connect the level-1 switching shelf and circuit switching shelf (big T-network) for cascading multiple resource shelves. It can be applied at the multi-shelf configuration with relatively large capacity.

Following are functions of UIMT board:

UIMT provides two 24+2 switched HUBs. One is the control plane Ethernet HUB, and the other is the user plane Ethernet HUB. The control plane HUB provides 20 internal control

Description

Functions



plane FE interfaces to interconnect with the boards of the resource shelf, and also provides 4 external control plane FE interfaces that are used between resource shelves or for interconnection between the resource shelf and the CHUB. The user plane HUB provides 23 internal FE to interconnect resource shelves and one external FE.

UIMT provides one external user plane GE optical interface to interconnect the resource shelf and the core switching units by matching GXS daughter cards. The GE channel adopts active/standby dual channel backup mode to provide 1+1 backup for core switching units.

UIMT provides one or two user plane GE interfaces and provides 1-2 GE slots for the resource shelf.

UIMT implements resource shelf access to 16K timeslot of circuit switching units through two pairs of external optical fibers. UIMT also implements 8M to 32M multiplexing of 16K timeslot. Multiplexing of UIMT uses inter-shelf insertion, and provides 128 8M HWs to the resource shelf.


UIMT provides functions such as reading the cabinet number, shelf number, slot number, equipment number, and backboard version number.

UIMT provides the internal RS-485 management interface and board reset and reset signal collection function.

UIMT provides clock-driven function inside the resource shelf. After phase lock and drive, input PP2S, 8K, 16M signals are distributed to various slots of the resource shelf. It provides 16M, 8K and PP2S clocks for the resource boards.

UIMT also provides MAC configuration, VLAN and broadcast packet control functions.

UIMT can be compatible with the commercial HUB.

UIM Technical Indices

UIMC: 41 W.

UIMT: 37 W.

UIMU: 37 W.

Supported

Power Consumption

Hot Swap



Rear Boards of UIMC Board

When the UIM board is used as the UIMC board, the corresponding rear boards are RUIM2 and RUIM3. The RUIM2 is inserted to the slot 9, and the RUIM3 is inserted to the slot 10. Figure 54 shows the panels of RUIM2 and RUIM3.

F I G U R E 54 PA N E L S O F RUIM2 AN D RUIM3

Description



The RUIM2 and RUIM3 boards provide the following interfaces:

FE1~FE10 (RJ45 interface): The RUIM2 and RUIM3 boards provide 10 FE interfaces for the interconnection between the control panels of the shelf.

CLKIN (DB9 interface): The CLKIN interfaces on the RUIM2 and RUIM3 boards respectively introduce two lines of active/standby 8K system clock output by the CLKG board.

DEBUG (RJ45 interface): used for debugging and providing no service functions.

Rear Board of UIMU or UIMT Board

When the UIM board is used as the UIMU or UIMT board, the corresponding backboard is RUIM1. Figure 55 shows the panel of RUIM1.

External Interfaces

Description



F I G U R E 55 PAN E L O F RUIM1

The RUIM1 board provides the following interfaces:

FE1-C1/2 and FE-C3/4 (RJ45 interface): The UIMU and UIMT boards are configured with two RUIM1 rear boards. This interface provides 4 lines of FE interfaces of the control panel for the interconnection between the resource shelf, and between the resource shelf and the CHUB.

FE-U (RJ45 interface): used for debugging and providing no service functions.

External Interface



CLKIN (DB9 interface): The CLKIN interfaces on the RUIM1 board can introduce two lines of active/standby 8K system clock output by the CLKG board.

GE Universal Interface Module Board (GUIM) This section describes the GUIM board.


T AB L E 55 TO P I C S I N GE UN I V E R S AL I N T E R F AC E M O D U L E B O AR D (GUIM) S E C T I O N

Topics Page No.

GUIM Board Appearance 99

GUIM Board Working Principle 104

GUIM Board Functions 104

GUIM Technical Indices 105

GUIM Board Appearance

The GUIM is used in the GE switching resource shelf (BGSN) of the MGW.

Figure 56 shows the front panel of the GUIM.

Introduction

Contents

Description

Outside View



F I G U R E 56 FR O N T P AN E L D I AG R AM O F GUIM

Table 56 shows indicators of UIM board.

T AB L E 56 I N D I C AT O R S O F GUIM B O AR D




Indicators





On: active

Off: Standby.









ACT-P Green Packet domain indicator

On: The GUIM board in packet domain is running normally.

Off: The GUIM board in packet domain is not running normally.

ACT-T Green Circuit switched domain indicator

On: The GUIM board in circuit domain is running normally.

Off: The GUIM board in circuit domain is not running normally.




L1~L6 Green Status indicator of control plane cascade interface

On: Control plane cascade 100 M interface is connected.

Off: Control plane cascade 100M interface is not connected.

ACT Green Status indicator of GE interface 1

Indicating currently activated optical interface

SD Green Optical signal indicator of GE interface 1~4

Indicating whether the optical signals are received by the optical module.

Table 57 shows list of buttons on GUIM board.

T AB L E 57 B U T T O N S I N GUIM B O AR D


EXCH Perform active/standby changeover of GUIM board

RST Reset GUIM board

There is no a DIP switch or jumper on UIM board.

The GUIM1 and GUIM2 boards are the corresponding rear boards of the GUIM board.

Figure 57 shows the panel diagram of the GUIM1 and GUIM2.

Buttons





F I G U R E 57 PAN E L D I AG R A M O F GUIM1 AN D GUIM2

The interfaces on the RGUIM1 and RGUIM2 are as follows:

FE1~FE6 (RJ45 interface): the GUIMC board provides six external control plane FE interfaces for the interconnection between the resource plane and the control plane of the CHUB.

CLKIN (DB9 interface): the CLKINs on the RGUIM1 and RGUIM2 access respectively 2-channel active/standby 8K system clock output by the CLKG.

DEBUG (RJ45 interface): is used for debugging and provides no service function.

External Interfaces



GUIM Board Working Principle

Figure 58 shows working principle of GUIM board.

F I G U R E 58 GUIM B O AR D W O R K I N G P R I N C I P L E

GUIM Board Functions

The GUIM is used in the GE switching resource shelf (BGSN) of the MGW. It provides the following functions.

GUIM provides 48 FE + 4 GE switched HUBs. Its 48 interfaces are divided into two switching planes.

One is the control plane Ethernet HUB. This HUB provides 19 internal control plane FE interfaces to interconnect with the boards inside resource shelves. It provides six external control plane FE interfaces used among inside resource shelves or for the interconnection between resource shelves and CHUBs, and one GE interface to concatenate the control plane of resource shelves.

The other is the user plane Ethernet HUB, providing 21 internal FE interfaces for interconnection of boards inside resource shelves.

GUIM provides 24 GE + 2×10 GE switched HUBs. It provides 19 GE switching interfaces for the service slots, and two groups of external GE interfaces or two 10G Ethernet interfaces to connect the level-1 switching shelf. Two GE interfaces and two 10G Ethernet interfaces are not provided simultaneously.

It provides two groups of GE Ethernet interfaces or two 10G Ethernet interfaces for accessing the level-1 switching shelf or implementing the interconnection of the resource shelves. Each interface implements the active/standby protection on and between boards.



It completes 64K timeslot switching, and accesses 32K user timeslot switching through four external TDM optical interfaces.

Four external TDM optical interfaces complete the inter-board active/standby protection.

Internal FE ports on two hot active/standby boards and 8MHW use high resistance multiplexed mode for backup on the backplane.

It provides the function for reading the cabinet number, shelf number, slot number, equipment number, backplane version number and backplane type number.

It provides the internal RS-485 management interface and board reset and reset signal collection function.

It provides the clock-driven function inside resource shelves. After the phase lock and drive, the input PP2S, 8K, 16M signals will be distributed to various slots in resource shelves. It provides the 16M, 8K and PP2S clocks for the resource boards.

It provides MAC configuration, VLAN and broadcast packet control functions.

It can be compatible with the commercial HUB.

It supports the BOOT online downloading function.

GUIM Technical Indices

90 W.

Supported

Signaling Processing Board (SPB) This section describes the SPB board.


T AB L E 58 TO P I C S I N S I G N AL I N G P R O C E S S I N G B O AR D (SPB) SE C T I O N

Topics Page No.

SPB Board Appearance 106

SPB Board Working Principles 111

SPB Board Functions 113

Power Consumption

Hot Swap

Introduction

Contents



Topics Page No.

SPB Technical Indices 113

SPB Board Appearance

The SPB board is responsible for processing the narrowband signaling, including the HDLC of the No.7 signaling and the signaling below the MTP-2 layer.

Figure 59 shows the front panel of the SPB board, and Figure 60 shows the layout of the circuit board.

F I G U R E 59 PAN E L D I AG R A M O F SPB C I R C U I T B O AR D

RST

ALMACT

RUNENUM

SPB

Overview

Outside View



F I G U R E 60 LAY O U T D I AG R AM O F SPB C I R C U I T B O AR D

CPU sub-card

CPU sub-card

CPU sub-card

CPU sub-card

ON21 34

ON21 34

ON21 34

ON21 34

S3

S4

S5

S6

ON

234

S1

1

ON

234

S2

1

There are four indicators on the SPB board panel, as shown in Table 59.

T AB L E 59 I N D I C AT O R S O N SPB B O AR D






Off: No alarm exists on the board.

Indicators












Table 60 shows the button on the SPB panel.

T AB L E 60 B U T T O N S O N SPB M O D U L E

Name Description

RST Resets the SPB board.

There are six 4-bit DIP switches in total on the SPB board, namely S1~S6.

Button Description




1. DIP switches S3~S6 are used to select the matching resistance of impedance on each E1 channel as 75 Ω or 120 Ω; switch on indicating the matching resistance of 120 Ω, while switch off indicating the matching resistance of 75 Ω.

Bit 1~4 of the S3 represents channel 1~4 E1 of the SPB respectively.




2. S1 and S2 are used to indicate corresponding received matching resistance and long/short wire status of each channel E1 chip. The CPU read this status, and performs different initializing to the E1 chip according to this status. Bit 1~4 of the S1 and S2 represents 1~4 E1 chips (that is, channel 1~4 E1, channel 5~8 E1, channel 9~12 E1, and channel 13~16 E1) respectively.

S1 switch on (that is, 1 is read out) indicates long wire; switch off (that is, 0 is read out) indicates short wire.

S2 switch on (that is, 1 is read out) indicates the matching resistance is 120 Ω; switch off (that is, 0 is read out) indicates the matching resistance is 75 Ω.

The corresponding rear board of the SPB board is the RSPB.

Figure 61 shows the panel diagram of the RSPB.




F I G U R E 61 PAN E L D I AG R A M O F RSPB

8 KO

UT/

DE

BUG

-232

E1

12-1

6E

1 1

-11

RSPB

Follows are the external interfaces of the RSPB.

E1~E11 and E12~E16 (DB44 interface) provide 16 external E1 interfaces.

External Interfaces



For its cable connection and corresponding relationship between pins and core wires, refer to corresponding contents in MGW Inner Cables.

8KOUT/DEBUG-232 (RJ45 interface) interface provides the output of 8 K system clock to the UIM board, providing the reference clock for boards in the shelf. In addition, this interface can be used for debugging. At this moment, no service function is provided.

75 Ω E1 access

On the RSPB rear board, E1 adopts the 75 Ω non-balanced coaxial transmission mode by default. The originating end connects with the protection ground through jumpers, while the receiving end connects with a capacitor (0.1 μF) and then connects with the protection ground through jumpers. The specific modes are selected through the jumpers (X9 ~ X16) on the RSPB board. X9~X16 Selection modes are listed in Table 61.

T AB L E 61 C O N N E C T I O N MO D E O F P I N S X9~X16

Connection Mode Concrete Definition

1－2 Connecting E1_TX (N) –R to the protection ground (NO. N channel)

3－4 Connecting E1_RX (N) -R to the protection ground (NO.N channel)

5－6 Connecting E1_TX (N+1) –R to the protection ground (NO.N+1 channel)

7－8 Connecting E1_RX (N+1) –R to the protection ground (NO.N+1 channel)





120 Ω E1 access

If E1 line adopts the 120 Ω PCM wire-balanced transmission mode, the short circuit blocks at jumpers X9~X16 on the RSPB need be removed.

SPB Board Working Principles

The SPB is provided with 16-channel E1s and a multi-CPU processing board with four 8M-Highway-interfaces. It serves as

Jumpers

Description



narrowband signaling processing board that processes the HDLC of multi-channel No.7 signaling and the signaling below the MTP-2 layer.

Figure 62 shows the schematic diagram of the SPB board.

F I G U R E 62 SC H E M AT I C D I AG R AM O F SPB C I R C U I T B O AR D

CPU subsystem

Control planeEthernet switch

Media planeEthernet switch

TDM switch E1 line interface

16×E1

4×8MHW

4×8MHW

Control plane Ethernet

Media plane Ethernet

The LIU and Framer of 16-channel E1/T1 are integrated to the SPB. In the communication processing unit, there are four CPUs, two of which are used for timeslot switching chips on the user plane and the control plane. Single-chip CPU may connect to E1 and HW through switching chips to support signaling transfer. The CPU system is configured in form of sub-card of the entire system.

The SPB may support E1 access, HW access, or both, depending on the system configuration. A single chip CPU may connect to E1 and HW through switching chips to support signaling transfer. The CPU system is configured in form of sub-card of the entire system.

The SPB provides externally two Ethernet switch planes with individual output rate of 100M, and two Ethernet ports of the CPU are connected to these two Ethernet planes. In addition, the SPB provides two-channel reference 8 k Hz clocks to the clock board.

Schematic Diagram

Working Principles



SPB Board Functions

The SPB is a multi-CPU processing board with 16-channel E1 and four 8M Highway interfaces. It is used for narrowband signaling processing, including HDLC of multi-channel No.7 signaling and signaling below the MTP-2 layer.

It supports E1/T1 mode, and two impedance configurations, 120 Ω and 75 Ω. According to different system configurations, it is used for accessing E1 or HW, or E1 and HW simultaneously.

It supports the signaling transfer.

It supports at most 64-channel 64K and 4-channel 2M signaling links.

It provides two-channel external reference 8 KHz clock to the clock board.

SPB Technical Indices

31 W

Supported

The SPB board provides 16 E1 interfaces to the external. It supports four 2M signaling links or 64 64K signaling links at most. Each 64K signaling link can support 50,000 subscribers.

ATM Process Board (APBE) This section describes the APBE board in the MGW cabinet.


T AB L E 62 TO P I C S I N ATM P R O C E S S B O AR D ( APBE) S E C T I O N

Topics Page No.

APBE Board Appearance 114

APBE Board Working Principles 119

APBE Board Functions 119

APBE Technical Indices 120

Power Consumption

Hot Swap

Service Capacity

Introduction

Contents



APBE Board Appearance

This topic describes the front panel view, layout view of the circuit board, indicators, buttons, DIP switches, jumpers, and external interfaces of the APBE board.

Figure 63 shows the panel of the APBE module, and Figure 64 shows its layout.

F I G U R E 63 PAN E L D I AG R A M O F T H E APBE

ACT4 SD4

RX

SD1ACT1

TX

ACT3 SD3TX

RX

RX

ACT2 SD2

TX

RX

TX

APBE

RST

ACTEXCHALM

ENUM RUN

Overview

Outside View



F I G U R E 64 LAY O U T D I AG R AM O F APBE

CPU sub-card

There are eight indicators on the APBE panel, as shown in Table 63.

T AB L E 63 APBE P AN E L I N D I C AT O R S


RUN Green RUN indicator

Flashing at 5 Hz: the board is powering on.

Flashing at 1 Hz: the circuit board runs normally.



Off: No alarm on the module.

Indicators










On: module active.

Off: module active.

ACT1~2 Green Optical interface starting indicator

Indicating currently started optical interface.

SD1~2 Green Optical signal indicator

Indicating whether the optical module has received optical signals.

Table 64 shows the buttons on the APBE panel. Button Description



T AB L E 64 B U T T O N S O N T H E APBE M O D U L E

Name Description

RST Reset APBE board

EXCH Perform active/standby changeover of APBE board

There is no DIP switch or jumper on the APBE.

The APBE panel provides two pairs of external STM-1 optical interface, as shown in Figure 63.

The RGIM1 is configured for extracting the reference clock from the APBE line interface. Otherwise, the corresponding rear board of the APBE board is a blank panel.

Figure 65 shows the panel of RIMG1 rear board.


External Interfaces




F I G U R E 65 PAN E L D I AG R A M O F RGIM1

8KO

UT/

DEB

UG

-232

RGIM1

The 8KOUT/DEBUG-232 (RJ45 interface) interface on the RGIM1 provides the output of 8 K system clock, which can be output to the UIM board providing the reference clock for the boards in the shelf. In addition, this interface can be used for debugging. At this moment, no service function is provided.



APBE Board Working Principles

The APBE module is used for ATM access processing.

Figure 66 shows the principles of the APBE.

F I G U R E 66 SC H E M AT I C D I AG R AM O F APBE

UTO

PIA b

us

UTO

PIA b

us

The APBE system consists of CPU sub-card subsystem, ATM port controller APC64013E, C5e NP subsystem, and ATM access subsystem.

APBE Board Functions

APBE module is used for ATM access processing. APBE board provides STM-1 interface and processes ATM adaptation and broadband No.7 base-layer signaling such as AAL5-SAR, SSCOP and SSCF, transmitting the MTP3B signaling packet via FE interface to signaling MP for processing. Through the interface provided by APBE board, MGW can implement butt joint between RNC, MGW and Nb interface (when ATM adopts a signaling carrier).

The APBE has the following functional indices when serving as the SIUP:

Provide ATM interface of the 2×STM-1 to meet the demands for ATM networking of 2-channel STM-1.

Implement ATM AAL2 with 155 Mbps line-speed and the SAR of the AAL5 (2K VC, 8K CID).

Implement the OAM function of the ATM.

Implement the processing of the SSCOP and the SSCF.

Introduction

Schematic Diagram

Description

Functions



APBE Technical Indices

51 W

Supported

The provided service capacity is as follows:

Provide ATM interface of the 2×STM-1 to meet the demands for ATM networking of 2-channel STM-1;

Implement the ATM AAL2 with 155 Mbps line-speed and the SAR of the AAL5.

Inter-Working Function Board (IWFB) This section describes the IWFB board in the MGW cabinet.


T AB L E 65 TO P I C S I N I N T E R-W O R K I N G FU N C T I O N B O AR D ( IWFB) S E C T I O N

Topics Page No.

IWFB Board Appearance 120

IWFB Board Working Principles 124

IWFB Board Functions 125

IWFB Board Technical Indices 125

IWFB Board Appearance

IWFB offers circuit switching data bearer service for transparent/non-transparent, synchronous or asynchronous data services and nontransparent fax service.

Figure 67 shows the panel of IWFB, and Figure 68 shows its layout.

Power Consumption

Hot Swap

Service Capacity

Introduction

Contents

Description

Outside View



F I G U R E 67 IWFB P AN E L

IWFB

RST

ACT ALM

ENUM RUN



F I G U R E 68 IWFB L AY O U T

There are four indicators on the IWFB board panel, as shown in Table 66.

T AB L E 66 I N D I C AT O R S O N IWFB B O AR D






Off: No alarm exists on the board.

Indicators












Table 67 shows the buttons on the IWFB panel.

T AB L E 67 B U T T O N S O N IWFB M O D U L E

Name Description

RST Resets the IWFB board

EXCH Performs active/standby changeover of the IWFB board.

There is no jumper or DIP switch on the IWFB board.

Button Description




There is no external interface on the IWFB board.

The corresponding rear board of the IWFB board is a blank panel.

IWFB Board Working Principles

IWFB offers circuit switching data bearer service for transparent/non-transparent, synchronous or asynchronous data services and nontransparent fax service.

Figure 69 shows the principles of the IWFB.

F I G U R E 69 SC H E M AT I C D I AG R AM O F IWFB

16K

IWFSCPU

DSP

CPLD

Backp

lane

8K

Control flow

Media flowAC104

H1102

H1102

PCI

IWFB processes circuit-domain data service. Uplink data may come from HW interface or Ethernet interface, depending on system configuration.

If uplink data comes from HW interface, DSP processes the data link protocol of wireless network, implements rate adaptation, and converts other protocols. For modem/fax service, after processing data, the DSP sends it to main control processor MPC8250 (data can also directly sent to MPC8250 without passing through DSP); MPC8250 then sends data to M80310 for data/fax modem processing; after modulation, 64 Kbps data is generated and then sent to the PSTN through DTU.

For ISDN service, after terminating the RLP, CPU sends data again to DSP; DSP then adapts data into ISDN service flow generates ISDN service flow and transfers it to the ISDN through DTB/SDTB.

External Interface


Overview

Schematic Diagram

Working Principles



IWFB Board Functions

The IWFB offers circuit switching data bearer service for the transparent/non-transparent synchronous or asynchronous data services and the nontransparent fax service.

The baseband modem supports V series protocols and the highest rate in V.90. It also supports the G3 fax service based on the T.30 fax protocol and two kinds of rate: V.17 (14.4kbit/s) and V.34 (28.8kbit/s). It also supports the ISDN adaptation service at rate of up to 64kbit/s.

The IWFB supports at least 60 channels of data services. It can support at most 240 channels of data services when configured with sub-cards.

The backplane can connect at most four pairs of 8MHz HW cables to the resource processing part on the backplane through the TDM switching network. In this way, the backplane ensures the flexible allocation of timeslots to facilitate the future expansion. The data flow in the TDM side shall be synchronized with the 8 KHz and 16 MHz clocks from the UIM.

The backplane connects with one 10/100M control flow Ethernet for downloading CPU and DSP versions and modem firmware, connecting voice channels, and transferring the signal flow to be processed inside the backplane and the commands and parameters sent by the system for controlling, configuring, maintaining, and managing the backplane.

The backplane connects with one 10/100M media flow control Ethernet for bearing the circuit-domain data services from the switching Ethernet.

The IWFB reserves one set of RS-485 bus for connecting with the UIM.

The IWFB can read the information of cabinet number, shelf number and slot number transmitted by the backplane.

The IWFB reports its reset status to the UIM and accepts the hardware reset signal from the UIM.

The IWFB can implement HW mutual-lock logic with the neighboring board.

IWFB Board Technical Indices

18.68 W

Supported

Description

Functions

Power Consumption

Hot Swap



It supports at least 60 channels of data services.

It supports at most 240 channels of data services when configured with sub-cards.

Media Resource Board (MRB) This section describes the MRB board in the MGW cabinet.


T AB L E 68 TO P I C S I N M E D I A R E S O U R C E BO AR D (MRB) S E C T I O N

Topics Page No.

MRB Board Appearance 126

MRB Board Working Principles 129

MRB Board Functions 130

MRB Board Technical Indices 131

MRB Board Appearance

This section describes the MRB board, including the front panel view, layout view, indicators, buttons, DIP switches, jumpers, and external interfaces.

Figure 70 shows the panels of the MRB.

Service Capacity

Introduction

Contents

Overview

Outside View



F I G U R E 70 MRB P AN E L

MRB

RST

ALMACT

RUNENUM

There are four indicators on the MRB panel, as shown in Table 69.

Indicators



T AB L E 69 I N D I C AT O R S O N MRB P AN E L


RUN Green RUN indicator Flashing at 5Hz: indicates board is powering on.

Flashing at 1Hz: indicates board is running normally.


On: Alarm exists on board.

Off: No alarm exists on board.









Table 70 shows the buttons on the MRB panel. Button Description



T AB L E 70 B U T T O N S O N MRB M O D U L E

Name Description

RST Resets the MRB board

There is no DIP switch or jumper on the MRB board.

The MRB board does not provide external interface.

The corresponding rear board of the MRB board is a blank panel.

MRB Board Working Principles

The MRB board provides the following functions for the switch system:

Sending tones and voice

DTMF receiving and sending numbers

MFC receiving and sending numbers

Conference call.

Figure 71 shows the working principle of MRB board.

F I G U R E 71 MRB W O R K I N G P R I N C I P L E S

8/16M

GPCM

CPU

DSP module

DSP module

DSP module

DSP module

PHY

SDRAM

BOOT

FLASH

RS485 chip

8MHW*8

EPLD (1)

ID8k16MRESETHEALTHY

-48V GND

Global clock and logic

Control flow

RS- 485

DSP+MAC+PHY

DSP+MAC+PHY

EPLD (2)

4

8MHW*8

8/16M 8MHWJP1

Media flow 1

Media flow 2JP2

Circuit trunk module

Media resource module

Transformer


External Interfaces


Description

Schematic Diagram



MRB can be divided into two modules according to internal function:



It consists of five functional parts:

Control part

Switching part

Resource processing part

Circuit trunk part

Global logical combination part.

Through 100M control flow Ethernet links, the control core receives and processes the commands from the MP on the UIM, controls and coordinates the working state of peripheral chips such as DSP and DX2K, sends the resource timeslot processing results of DSP back to the DSP.

Universal resource processing platform consists of four independent DSP sub-elements with the same configuration. Each sub-element can process 120 channels of resources of the same type. Resources include tone/voice, DTMF detection/generation, MFC detection/generation, and conference call.

The circuit-domain module provides bidirectional bridging function for 480~1440 channels between the circuit switching side and the packet switching side. That is, it adapts the PCM code flow from the circuit switching side into PCM/UDP/IP packets and sends them to the packet switching side. It also decodes PCM code flow from the PCM/UDP/IP packets from the packet switching side and then sends the flow to the circuit switching side.

MRB Board Functions

The MRB board provides the following functions for the switch system:

Sending tones and voice

DTMF receiving and sending numbers

MFC receiving and sending numbers

Conference call.

The MRB consists of two relatively independent modules: media resource module and circuit trunk module.

The MRB provides 480 channels of media resources for the circuit switching side, including Tone/Voice, DTMF

Working Principles

Description

Function



Detection/Generation, MFC Detection/Generation, and Conference Call.


It provides 480 channels of Tone/Voice, DTMF Detection/Generation, MFC Detection/Generation, and Conference Call. 3~120 parties can be flexibly configured for each group.

For each service function, 120 channels constitute one basic sub-element. The software can be configured by taking a sub-element as the unit.

It reports the number receiving results of DTMF and MFC to the control center through the control flow Ethernet.


It provides bidirectional bridging function for 480~1440 channels between the circuit switching side and the packet switching side. That is, it adapts the PCM code flow from the circuit switching side into PCM/UDP/IP packets and sent them to the packet switching side; it also decodes PCM code flow from the PCM/UDP/IP packets from the packet switching side and then sent the flow to the circuit switching side.

MRB Board Technical Indices

7 W

Supported

It provides 480 channels of Tone/Voice, DTMF Detection/Generation, MFC Detection/Generation, and Conference Call. 3~120 parties can be flexibly configured for each group.

For each service function, 120 channels constitute one basic sub-element. The software can be configured by taking a sub-element as the unit.

Voice Transcoder Card (VTCD) This section describes the VTCD board in the MGW cabinet.


Power Consumption

Hot Swap

Service capability

Introduction

Contents



T AB L E 71 TO P I C S I N V O I C E TR AN S C O D E R C AR D (VTCD) S E C T I O N

Topics Page No.

VTCD Board Appearance 132

VTCD Board Working Principles 136

VTCD Board Functions 137

VTCD Board Technical Indices 137

VTCD Board Appearance

The VTCD board is responsible for processing the voice coding/decoding and the Iu-UP protocol.

Figure 72 shows the panels of the VTCD board, while Figure 73 shows its layout.

Overview

Outside View



F I G U R E 72 VTCD P AN E L

VTCD

RST

ALMACT

RUNENUM



F I G U R E 73 VTCD L AY O U T

There are four indicators on the VTCD panel, as shown in Table 72.

T AB L E 72 I N D I C AT O R S O N MRB P AN E L







Indicators












Table 73 shows the buttons on the VTCD panel.

T AB L E 73 B U T T O N S O N VTCD M O D U L E

Name Description

RST Resets the VTCD board

There is no DIP switch or jumper on the VTCD board.

Button Description




The VTCD board does not provide external interface.

The corresponding rear board of the VTCD board is a blank panel.

VTCD Board Working Principles

The VTCD is the TC unit configured in the MGW system. It implements voice coding/decoding, rate adaptation, and EC function. It also processes the Iu-UP protocol when processing the AMR.

VTCD consists of following parts, as shown in Figure 74.

CPU sub-card

DSP array

Circuit switching part

FE switching part

100M Ethernet switching part

EC sub-card

FE PHY interface part.

F I G U R E 74 VTCD W O R K I N G P R I N C I P L E S

External Interfaces


Description

Schematic Diagram



VTCD Board Functions

The VTCD is the TC unit configured in the MGW system. It implements QCELP8K, QCELP13K, AMR, EVRC, and SMV voice coding/decoding, rate adaptation, and EC function. It also processes the Iu-UP protocol when processing the AMR.

VTCD Board Technical Indices

50 W

Supported

DSP array of the VTCD can process 960 channels of AMR signals.

IP Packet Switching Network Board (PSN4V/PSN8V) This section describes the PSN4V/PSN8V board in the MGW cabinet.


T AB L E 74 TO P I C S I N IP P AC K E T S W I T C H I N G N E T W O R K B O AR D (PSN4V/PSN8V) S E C T I O N

Topics Page No.

PSN4V/PSN8V Board Appearance 137

PSN4V/PSN8V Board Working Principles 140

PSN4V/PSN8V Board Functions 141

PSN4V/PSN8V Technical Indices 141

PSN4V/PSN8V Board Appearance

This section describes the PSN4V/PSN8V board, including the front panel view, layout view, indicators, buttons, DIP switches, jumpers, and external interfaces.

Figure 75 shows the panels of the PSN4V and the PSN8V.

Power Consumption

Hot Swap

Service capability

Introduction

Contents

Overview

Outside View



F I G U R E 75 PAN E L S O F T H E PSN4V/PSN8V

RSTRST

EXCHALMACT

PSN4V

RUNENUM

ACTEXCHALM

PSN8V

ENUM RUN

There are four indicators on the PSN4V/PSN8V panel, as shown in Table 75.

Indicators



T AB L E 75 I N D I C AT O R S O N T H E PSN4V/PSN8V P AN E L















Table 76 shows the buttons on the PSN4V/PSN8V panel. Button Description



T AB L E 76 B U T T O N S O N T H E PSN4V/PSN8V M O D U L E

Name Description

RST Resets PSN4V/PSN8V board

EXCH Performs active/standby changeover of PSN4V/PSN8V board

There is no DIP switch or jumper on the PSN4V/PSN8V board.

The PSN4V/PSN8V board does not provide any external interface.

The corresponding rear board of the PSN4V/PSN8V board is a blank panel.

PSN4V/PSN8V Board Working Principles

The PSN4V/PSN8V switching board performs packet data switching between different line cards. The difference between the PSN4V and the PSN8V lies in the quantity of CrossBar switching chips.

Figure 76 shows the principles of PSN4V/PSN8V.

F I G U R E 76 SC H E M AT I C D I AG R AM O F T H E PSN4V/PSN8V

CPUSubsystem

CPLD

HSSL

ControlBus

CrossBar Switch


External Interfaces


Description

Schematic Diagram



The PSN4V/PSN8V is a self-routing Crossbar switching system, coordinating with the queue engine on the interface board to complete the switching function with the subscriber data switching capacity up to 40G/80G.

Adopting the 1+1 load sharing mode, the PSN switching board connects with the line interface board GLI of the 1+1 port backup. It cooperates with the GLI to complete the switching functions to provide the 40G subscriber data switching capacity. Meanwhile, the PSN connects with the control center of the level-1 switching sub-system (UIMC) through one 10/100 M base Ethernet to implement the operation and maintenance of the subsystem. The CPU subsystem connects with the switching matrix unit through the inner control bus to conduct the basic configuration and management. The PSN connects with the GLI board through the high-speed serial link externally provided by the switching matrix unit to establish the data switching channel. The CPLD implements the necessarily logical adaptation function in the board.

PSN4V/PSN8V Board Functions

The PSN4V/PSN8V switching board implements the packet data interchange between different line cards with the maximum user data switching capacity of 40G/80G.

PSN4V/PSN8V board provides the following functions:

It provides the dual-directional subscriber data switching capacity, 40 Gbps for PSN4V, and 80Gbps for PSN8V.

It provides 1+1 load sharing, manual switching or software switching.

It achieves maximum 80G switching capacity through smooth upgrade to the PSN8V.

It provides 1×100 M Ethernet as the active/standby communication channel, and the control flow channel as well.

It provides the version identification and physical ID reading of the cabinet, shelves and slot numbers.

PSN4V/PSN8V Technical Indices

30 W

Supported

The PSN4V provides dual-directional packet data interchange, 40 Gbps in each direction.

Description

Function

Power Consumption

Hot Swap

Service Capability



The PSN8V provides dual-directional packet data interchange, 80 Gbps in each direction.

2.5G Line Interface Board (GLIQV) This section describes the GLIQV board in the MGW cabinet.


T AB L E 77 TO P I C S I N 2 .5G L I N E I N T E R F AC E B O AR D (GLIQV) S E C T I O N

Topics Page No.

GLIQV Board Appearance 142

GLIQV Board Working Principles 146

GLI Board Functions 146

GLIQV Technical Indices 147

GLIQV Board Appearance

In the MGW system, the GLIQV board serves as the GLI functional board.

Figure 77 shows its panel view, and Figure 78 shows its circuit board layout.

Introduction

Contents

Overview

Outside View



F I G U R E 77 PAN E L D I AG R A M O F GLI M O D U L E

TX

SD8ACT8

RX

TX

TX

ACT7TX

SD7

RX

ACT6 SD6

RX

RX

ACT5 SD5

TX

ACT4 SD4

RX

SD2ACT2

RX

ACT3 SD3

TX

RX

ACT1TX

SD1

RST

RX

TX

ALMACTEXCH

ENUM RUN

GLI



F I G U R E 78 LAY O U T D I AG R AM O F GLIQV M O D U L E

There are 20 indicators on the GLIQV module panel, as shown in Table 78.

T AB L E 78 GLIQV P AN E L I N D I C AT O R S



Flashing at 5 Hz: The module is being powered on.



On: An alarm from the module.

Off: No alarm from the module.

Indicators










On: active.

Off: standby.

ACT1-8 Green Optical interface starting indicator


SD1-8 Green Optical signal indicator

Indicating whether the optical interface has received optical signals.

Table 79 shows the buttons on the GLIQV panel. Button Description



T AB L E 79 B U T T O N S O N T H E GLIQV M O D U L E

Name Description

RST Resets GLIQV board

EXCH Performs active/standby changeover of GLIQV board

There is no DIP switch or jumper on GLIQV.

GLIQV provides four pairs of external GE optical interfaces, each pair mutually backing up. Through these interfaces, it connects to backplane of the resource shelf.

The corresponding rear board of the GLIQV board is a blank panel.

GLIQV Board Working Principles

The GLIQV board is the line interface board with four GE ports. Its functions include the physical layer adaptation, IP packet checklist, fragmentation, transfer, and traffic management. Its processing capability orientation is 2.5 Gbps line-speed processing and transfer, and 1K-stream traffic management.

Figure 79 shows the working principles of the GLIQV board.

F I G U R E 79 SC H E M AT I C D I AG R AM O F T H E GLIQV

Ingress NP

Egress NP

GE MAC

GE optical module

GE optical module

Queue manager

HSSL

CPLD

GLI Board Functions

In the MGW system, the GLI board serves as the GLI functional board to access the packet services of the resource shelf to the level-1 switching platform.

The GLI board provides the following functions:


External Interfaces


Introduction

Schematic Diagram

Description

Functions



Providing four pairs of GE ports for 1+1 backup of optical interface of each GE port, totally eight physical GE ports to the external. Provide GE port backup between GE ports of adjunct GLI. Adopt 1+1 backup mode. Generally, the GLI uses four of all GE ports. Thus, a pair of GLI boards can connect to two BUSNs.

Implementing the functions of the physical layer adaptation, IP packet checklist, fragmentation, transfer, and traffic management. Its processing capability orientation is 2.5Gbps line-speed processing and transfer, and 1K-stream traffic management.

Providing 1×100M Ethernet as the active/standby communication channel.

Providing 1×100M Ethernet as the control-of-flow channel.

GLIQV Technical Indices

65 W

Supported

The GLIQV offers the processing capability of 2.5 Gbps line-speed processing and transfer, and 1K-stream traffic management.

Digital Trunk Board (DTB) This section describes the DTB board in the MGW cabinet.


T AB L E 80 TO P I C S I N D I G I T AL TR U N K B O AR D (DTB) S E C T I O N

Topics Page No.

DTB Board Appearance 147

DTB Board Working Principles 153

DTB Board Functions 154

DTB Board Technical Indices 155

DTB Board Appearance

The DTB board is the digital trunk interface module for accessing the E1/T1 link.

Power Consumption

Hot Swap

Service capability

Introduction

Contents

Overview




F I G U R E 80 DTB P AN E L

Outside View



F I G U R E 81 DTB L AY O U T

S1

S2

S3

S4

S5

S6

S12

S9

S7S8S10S12

X23

ON

ONONONON

ON

ON

ON

ON

ON

ON

ON

There are 36 indicators on the DTB panel, as shown in Table 81.

T AB L E 81 I N D I C AT O R S O N DTB P AN E L





Keeping flashing at 5 Hz: Power-on failure.


Flashing at 5 Hz: Power-on failure.

Off: The board runs normally.

Indicators










On: active.

Off: standby.

L1~L32 Green 32-channel E1 indicators

Off: This E1 is not configured in the database.

Staying on: This E1 is configured in the database, but is not connected.

Flashing at 1 HZ: The E1 is configured in the database, and it is connected.

Table 82 shows the button on the DTB panel. Button Description



T AB L E 82 B U T T O N O N DTB M O D U L E

Name Description

RST Resets DTB board

There are 12 DIP switches on the DTB board.

Eight 4-digit DIP switches (S1-S6, S9, and S12) are used to select the matching impedance of each E1 channel: 75 Ω or 120 Ω.

If DIP switch is “ON”, the line impedance is 75 Ω.

If DIP switch is “OFF”, the line impedance is 120 Ω.

Two 4-digit DIP switches (S7 and S8) indicate the receiving matching impedance of each E1 chip for the CPU.

If DIP switch is “ON”, it indicates that the matching impedance of the corresponding E1 is 75 Ω.

If DIP switch is “OFF”, it indicates that the matching impedance of corresponding E1 is 120 Ω.

Each DIP switch corresponds to one E1 chip: S7 corresponds to E1 Chips 1–4 (E1 Channels 1–16); S8 corresponds to E1 Chips 5–8 (E1 Channels 17–32). CPU retrieves the state and initializes the E1 chip according to the state.

Two 4-digit DIP switches (S10 and S11) indicate the long/short haul state of each E1 chip for the CPU.

If DIP switch is “ON”, it indicates that the corresponding E1 chip (four E1 channels) works in the “SHORT HAUL” mode.

If DIP switch is “OFF”, it indicates that the corresponding E1 chip works in “LONG HAUL” mode.

Each DIP switch corresponds to one E1 chip: S10 corresponds to E1 Chips 1–4 (E1 Channels 1–16); S11 corresponds to E1 Chips 5–8 (E1 Channels 17–32). CPU retrieves the state and initializes E1 chip according to the state.

DTB provides one jumper (X23) for debugging the module. In normal operation, X23 is disconnected.

The RDTB board is the rear board of the DTB. Figure 82 shows the panel of the RDTB.





F I G U R E 82 RDTB P AN E L

DE

BU

G-F

E/2

32E

1 2

2 -32

E1

11 -

21

RDTB

E1

1- 1

0

The RDTB board provides the following interfaces.

E1 1~10, E1 11~21 and E1 22~32 (DB44 interface): Provides 11 lines of E1/T1 interfaces respectively. Therefore, the RDTB board can totally provide 32 E1/T1 interfaces.

8KOUT/DEBUG-232 (RJ45 interface): Outputs the 8K system clock to the UIM board and provides the reference clock to



the boards in the shelf. In addition, this interface can be used for debugging, and does not provide service functions in this case.

Table 83 shows the selection of X9-X16 on the rear board.

T AB L E 83 C O N N E C T I O N MO D E O F X9-X16 J U M P E R S

Connection Mode Description

1–2 They connect E1_TX (N)-R to the protection ground (Channel N).

3–4 They connect E1_RX (N)-R to the protection ground (Channel N).

5–6 They connect E1_TX (N+1)-R to the protection ground (Channel N+1).

7–8 They connect E1_RX (N+1)-R to the protection ground (Channel N+1).





Note:

E1 line uses 120 Ω PCM unbalanced transmission mode, the connected blocks of X9-X16 on RDTB shall be removed.

DTB Board Working Principles

DTB is the digital trunk interface module for providing external E1/T1 link.

Figure 83 shows the working principles of the DTB.

Description

Schematic Diagram



F I G U R E 83 DTB W O R K I N G P R I N C I P L E

The circuitry consists of these modules:

Unit processing circuit

E1 basic interface circuit

Timeslot switching circuit

EC circuit

Alarm detection and indication circuit

Time sequence and logic generation circuit

Bus receiving and transmitting circuit.

DTB Board Functions

DTB has the following functions:

It provides 32×E1/T1 interfaces and supports the EC function (optional).

It supports transparent transmission of intra-office CAS and CCS.

It can extract 8K synchronous clock from a line and transfer it through a cable to the clock module as a reference clock.

The difference between DTB and DTEC lies in the Echo Cancellation (EC) function. The DTEC can be configured with EC function optionally.



DTB Board Technical Indices

12 W

Supported

It supports at most 32 channels of E1/T1 links.

Digital Trunk Board with EC Function (DTEC) This section describes the DTEC board in the MGW cabinet.


T AB L E 84 TO P I C S I N D I G I T AL TR U N K B O AR D W I T H EC FU N C T I O N (DTEC) S E C T I O N

Topics Page No.

DTEC Board Appearance 155

DTEC Board Working Principles 161

DTEC Board Functions 162

DTEC Board Technical Indices 163

DTEC Board Appearance

The DTB board is the digital trunk interface module for accessing the E1/T1 link.


Power Consumption

Hot Swap

Service capability

Introduction

Contents

Overview

Outside View



F I G U R E 84 DTEC P AN E L



F I G U R E 85 DTEC L AY O U T

S1

S2

S3

S4

S5

S6

S12

S9

S7S8S10S12

X23

ON

ONONONON

ON

ON

ON

ON

ON

ON

ON

There are 36 indicators on the DTEC panel, as shown in Table 85.

T AB L E 85 I N D I C AT O R S O N DTEC P AN E L









Indicators










On: active.

Off: standby.

L1~L32 Green 32-channel E1 indicators

Off: This E1 is not configured in the database.

Staying on: This E1 is configured in the database, but is not connected.

Flashing at 1 HZ: The E1 is configured in the database, and it is connected.

Table 86 shows the button on the DTEC panel. Button Description



T AB L E 86 B U T T O N O N DTB M O D U L E

Name Description

RST Resets DTB board

There are 12 DIP switches on the DTEC board.

Eight 4-digit DIP switches (S1-S6, S9, and S12) are used to select the matching impedance of each E1 channel: 75 Ω or 120 Ω.

If DIP switch is “ON”, the line impedance is 75 Ω.

If DIP switch is “OFF”, the line impedance is 120 Ω.

Two 4-digit DIP switches (S7 and S8) indicate the receiving matching impedance of each E1 chip for the CPU.

If DIP switch is “ON”, it indicates that the matching impedance of the corresponding E1 is 75 Ω.

If DIP switch is “OFF”, it indicates that the matching impedance of corresponding E1 is 120 Ω.

Each DIP switch corresponds to one E1 chip: S7 corresponds to E1 Chips 1–4 (E1 Channels 1–16); S8 corresponds to E1 Chips 5–8 (E1 Channels 17–32). CPU retrieves the state and initializes the E1 chip according to the state.

Two 4-digit DIP switches (S10 and S11) indicate the long/short haul state of each E1 chip for the CPU.

If DIP switch is “ON”, it indicates that the corresponding E1 chip (four E1 channels) works in the “SHORT HAUL” mode.

If DIP switch is “OFF”, it indicates that the corresponding E1 chip works in “LONG HAUL” mode.

Each DIP switch corresponds to one E1 chip: S10 corresponds to E1 Chips 1–4 (E1 Channels 1–16); S11 corresponds to E1 Chips 5–8 (E1 Channels 17–32). CPU retrieves the state and initializes E1 chip according to the state.

DTEC provides one jumper (X23) for debugging the module. In normal operation, X23 is disconnected.

The RDTB board is the rear board of the DTB. Figure 86 shows the panel of the RDTB.





F I G U R E 86 RDTB P AN E L

DE

BU

G-F

E/2

32E

1 2

2 -32

E1

11 -

21

RDTB

E1

1- 1

0

The RDTB board provides the following interfaces.

E1 1~10, E1 11~21 and E1 22~32 (DB44 interface): Provides 11 lines of E1/T1 interfaces respectively. Therefore, the RDTB board can totally provide 32 E1/T1 interfaces.

8KOUT/DEBUG-232 (RJ45 interface): Outputs the 8K system clock to the UIM board and provides the reference clock to



the boards in the shelf. In addition, this interface can be used for debugging, and does not provide service functions in this case.

Table 87 shows the selection of X9-X16 on the rear board.

T AB L E 87 C O N N E C T I O N MO D E O F X9-X16 J U M P E R S

Connection Mode Description

1–2 They connect E1_TX (N)-R to the protection ground (Channel N).

3–4 They connect E1_RX (N)-R to the protection ground (Channel N).







Note:

E1 line uses 120 Ω PCM unbalanced transmission mode, the connected blocks of X9-X16 on RDTB shall be removed.

DTEC Board Working Principles

DTEC is the digital trunk interface module for providing external E1/T1 link.

Figure 87 shows the working principles of the DTEC.

Description

Schematic Diagram



F I G U R E 87 DTEC W O R K I N G P R I N C I P L E

The circuitry consists of these modules:

Unit processing circuit

E1 basic interface circuit

Timeslot switching circuit

EC circuit

Alarm detection and indication circuit

Time sequence and logic generation circuit

Bus receiving and transmitting circuit.

DTEC Board Functions

DTEC has the following functions:

It provides 32×E1/T1 interfaces and supports the EC function (optional).

It supports transparent transmission of intra-office CAS and CCS.

It can extract 8K synchronous clock from a line and transfer it through a cable to the clock module as a reference clock.

The difference between DTB and DTEC lies in the Echo Cancellation (EC) function. The DTEC can be configured with EC function optionally.



DTEC Board Technical Indices

15 W

Supported

It supports at most 32 channels of E1/T1 links.

Control Plane Interconnection Board (CHUB) This section describes the CHUB board.


T AB L E 88 TO P I C S I N C O N T R O L P L AN E I N T E R C O N N E C T I O N B O AR D (CHUB) S E C T I O N

Topics Page No.

CHUB Board Appearance 163

CHUB Board Working Principles 168

CHUB Board Functions 169

CHUB Technical Indices 169

CHUB Board Appearance

This section describes the CHUB board, including the front panel view, layout view of the circuit board, indicators, buttons, DIP switches, jumpers, and external interfaces.

Figure 88 shows the front panel of the CHUB board, and Figure 89 shows its circuit layout.

Power Consumption

Hot Swap

Service capability

Introduction

Contents

Overview

Outside View



F I G U R E 88 PAN E L D I AG R A M O F CHUB



F I G U R E 89 LAY O U T D I AG R AM O F CHUB

GE sub-card

There are 50 indicators on two types of the CHUB module respectively, as shown in Table 89.

T AB L E 89 I N D I C AT O R S O N CHUB M O D U L E


RUN Green RUN indicator Flashing at 5 Hz: The module is being powered on.






On: An alarm exists on the module.

Off: No alarm exists on the module.

Indicators









L1-L46

Green Status indicator of control plane cascade interface

On: Control plane cascade 100 M interface 1 is connected.

Off: Control plane cascade 100 M interface 1 is not connected.

Table 90 shows the buttons on the CHUB panel.

T AB L E 90 B U T T O N S O N CHUB M O D U L E

Name Description

RST Resets the CHUB board.

EXCH Performs the active/standby changeover of the CHUB board.

Button Description



There is no DIP switch or jumper on the CHUB board.

The RCHB1 and RCHB2 boards are the corresponding rear boards of the CHUB. They jointly provide external interfaces of the CHUB board.

Figure 90 shows the panel diagram of the RCHB1 and the RCHB2.

F I G U R E 90 PAN E L D I AG R A M O F RCHB1 AN D RCHB2 D

EB

UG

-FE

/23 2

FE17

-24

DE

BU

G-F

E/2

32F E

41-4

6

FE9-

16

F E33

-40

RCHB2RCHB1

FE1-

8

F E25

-32

Follows are the interfaces on the RCHB1 and the RCHB2.





FE1-8, FE9-16, FE17-24, FE25-32, FE33-40, and FE41-46 (DB44 interface): through these ports, the CHUB module provides 46 100M Ethernet interfaces to the external for the shelf cascade of the control plane.

For the connection method, refer to Interconnection Cable on the Control Panel.

DEBUG-FE/232 (RJ45 interface): is used for debugging and has no service function.

CHUB Board Working Principles

In the MGW system, the CHUB board is used to expand the distributed processing platform.

Figure 91 shows the schematic diagram of the control plane interconnection board CHUB.

F I G U R E 91 SC H E M AT I C D I AG R AM O F CHUB

The CPU system manages the Ethernet switching sub-system through the PCI bus. It provides a debugging interface and the active/standby interconnection channel. The CPU system provides the following functions:

It implements the configuration of the switching chips.

It provides the function of reading rack number, shelf number, slot number, equipment number, backplane version number and backplane type number.

It provides the functions of reading board status, 485 communication, and serial debugging interface.

Description

Schematic Diagram



CHUB Board Functions

In the MGW system, the CHUB is used for the expansion of the distributed processing platform. Each resource shelf, level-1 switching shelf and circuit switching shelf provide two or four 100M Ethernet interfaces (control flow) to connect with the convergence Ethernet (CHUB).

CHUB Technical Indices

34 W

Supported

The CHUB provides 46 100M external Ethernet interfaces and one 1000M internal Ethernet interface.

TDM Switch Network Board (TSNB) This section describes the TSNB board.


T AB L E 91 TO P I C S I N TDM S W I T C H N E T W O R K B O AR D (TSNB) S E C T I O N

Topics Page No.

TSNB Board Appearance 169

TSNB Board Working Principles 173

TSNB Board Functions 174

TSNB Board Technical Indices 174

TSNB Board Appearance

TSNB provides switching function for the 64k circuit timeslots.

Figure 92 shows the panels of the TSNB, and Figure 93 shows its circuit layout.

Power Consumption

Hot Swap

Service Capability

Introduction

Contents

Overview

Outside View



F I G U R E 92 TSNB P AN E L

RUNENUM

EXCH

RST

ALMACT

TSNB



F I G U R E 93 TSNB L AY O U T

There are four indicators on the TSNB panel, as shown in Table 92.

T AB L E 92 I N D I C AT O R S O N TSNB P AN E L








Indicators












Table 93 shows the buttons on the TSNB panel.

T AB L E 93 B U T T O N S O N TSNB M O D U L E

Name Description

RST Resets the TSNB board.

EXCH Performs the active/standby changeover of the TSNB board.

Button Description



There is no DIP switch or jumper on the TSNB board.

The TSNB board does not provide external interface.

The corresponding rear board of the TSNB board is a blank panel.

TSNB Board Working Principles

TSNB provides switching function for the 64K circuit timeslots. The switching network is connected to the TFI in the local shelf through a backplane with 576M LVDS.

Figure 94 shows the working principle of TSNB board.

F I G U R E 94 TSNB W O R K I N G P R I N C I P L E S

EPLD

Backplane ID

I_UIM_HEALTHY

64K Digital

Switching array

128 pairs of 32M HW 8 pairs of

576M LVDS

32M/64M/8K clock

-48V power

Active/standby logic

RS485

FPGA

TSNB

ZXPMC

Sub-card


Bus drive

Drive

Isolation

Clock drive

Chip selection Clock Control

Data busOutput enabling

Address/data bus

O_UIM_RSTActive/standby

information Ethernet

Power module

+2.5V+3.3V

Debug serial port

Rear board in position

Clock

Clock

Address/data bus

Data bus

The TSNB provides unblocked switching network with the T-T-T structure. The switching capacity is 64K×64K timeslots, and the rate of the PCM bus is 32Mb/s. Two TSNB boards work in active/standby mode. The active and standby TSNBs exchange information through one Ethernet channel. The MPB controls the connection of the T network through the control plane. The backup RS485 channel is provided. The TSNB consists of these


External Interfaces


Description

Schematic Diagram

Working Principles



parts: CPU sub-card control part, digital switching array part, power conversion part, LVDS interface part, Ethernet and RS485 part, frame synchronization adjustment part.

TSNB Board Functions


TSNB Board Technical Indices

20 W

Supported

It can provide the unblocked circuit switching of 64K×64K.

Enhanced TDM Switch Network Board (ETSN) This section describes the ETSN board.


T AB L E 94 TO P I C S I N E N H AN C E D TDM SW I T C H N E T W O R K B O AR D (ETSN) S E C T I O N

Topics Page No.

ETSN Board Appearance 174

ETSN Board Working Principles 178

ETSN Board Functions 179

ETSN Board Technical Indices 179

ETSN Board Appearance

This section describes the ETSN board, including the front panel view, layout view of the circuit board, indicators, buttons, DIP switches, jumpers, and external interfaces.

Power Consumption

Hot Swap

Service capability

Introduction

Contents

Overview



Figure 95 shows the panels of the ETSN, and Figure 96 shows its circuit layout.

F I G U R E 95 ETSN P AN E L

RUNENUM

EXCH

RST

ALMACT

ETSN

Outside View



F I G U R E 96 ETSN L AY O U T

CPUsub-card

There are four indicators on the ETSN panel, as shown in Table 95.

T AB L E 95 I N D I C AT O R S O N ETSN P AN E L








Indicators












Table 96 shows the buttons on the ETSN panel.

T AB L E 96 B U T T O N S O N ETSN M O D U L E

Name Description

RST Resets the ETSN board.

EXCH Performs the active/standby changeover of the ETSN board.

Button Description



There is no DIP switch or jumper on the ETSN board.

The ETSN board does not provide external interface.

The corresponding rear board of the ETSN board is a blank panel.

ETSN Board Working Principles

ETSN provides switching function for the 128K circuit timeslots. The switching network is connected to the TFI in the local shelf through a backplane with 576M LVDS.

Figure 97 shows the working principle of ETSN board.

F I G U R E 97 ETSN W O R K I N G P R I N C I P L E S

EPLD

Backplane ID

I_UIM_HEALTHY

128K Digital

Switching array


576M LVDS

32M/64M/8K clock

-48V power


RS485

FPGA

ZXPMC

Sub-card


Bus drive

Drive

Isolation

Clock drive



Address/data bus



Power module

+1.5V+3.3V

Debug serial port


Clock

Clock

Address/data bus

Data bus

The ETSN provides unblocked switching network with the T-T-T structure. The switching capacity is 128K×128K timeslots, and the rate of the PCM bus is 32Mb/s. Two TSNB boards work in active/standby mode. The active and standby TSNBs exchange information through one Ethernet channel. The MPB controls the connection of the T network through the control plane. The backup RS485 channel is provided.


External Interfaces


Description

Schematic Diagram

Working Principles



The ETSN consists of these parts: CPU sub-card control part, digital switching array part, power conversion part, LVDS interface part, Ethernet and RS485 part, frame synchronization adjustment part.

ETSN Board Functions


ETSN Board Technical Indices

40 W

Supported


Advanced TDM Switch Network Board (STSN) This section describes the STSN board.


T AB L E 97 TO P I C S I N AD V A N C E D TDM SW I T C H N E T W O R K B O AR D (STSN) S E C T I O N

Topics Page No.

STSN Board Appearance 179

STSN Board Working Principles 183

STSN Board Functions 184

STSN Board Technical Indices 184

STSN Board Appearance

This section describes the STSN board, including the front panel view, layout view of the circuit board, indicators, buttons, DIP switches, jumpers, and external interfaces.

Figure 98 shows the panels of the STSN, and Figure 99 shows its circuit layout.

Power Consumption

Hot Swap

Service capability

Introduction

Contents

Overview

Outside View



F I G U R E 98 STSN P AN E L

RUNENUM

EXCH

RST

ALMACT

ETSNSTSN



F I G U R E 99 STSN L AY O U T

CPUsub-card

There are four indicators on the STSN panel, as shown in Table 98.

T AB L E 98 I N D I C AT O R S O N STSN P AN E L








Indicators












Table 99 shows the buttons on the STSN panel.

T AB L E 99 B U T T O N S O N STSN M O D U L E

Name Description

RST Resets the STSN board.

EXCH Performs the active/standby changeover of the STSN board.

Button Description



There is no DIP switch or jumper on the STSN board.

The STSN board does not provide external interface.

The corresponding rear board of the STSN board is a blank panel.

STSN Board Working Principles

STSN provides switching function for the 256K circuit timeslots. The switching network is connected to the TFI in the local shelf through a backplane with 576M LVDS.

Figure 100 shows the working principle of STSN board.

F I G U R E 100 STSN WO R K I N G P R I N C I P L E S

EPLD

Backplane ID

I_UIM_HEALTHY

256K Digital

Switching array


576M LVDS

32M/64M/8K clock

-48V power


RS485

FPGA

ZXPMC

Sub-card


Bus drive

Drive

Isolation

Clock drive



Address/data bus



Power module

+1.5V+3.3V

Debug serial port


Clock

Clock

Address/data bus

Data bus

The STSN provides unblocked switching network with the T-T-T structure. The switching capacity is 256K×256K timeslots, and the rate of the PCM bus is 32Mb/s. Two TSNB boards work in active/standby mode. The active and standby TSNBs exchange information through one Ethernet channel. The MPB controls the connection of the T network through the control plane. The backup RS485 channel is provided.


External Interfaces


Description

Schematic Diagram

Working Principles



The STSN consists of these parts: CPU sub-card control part, digital switching array part, power conversion part, LVDS interface part, Ethernet and RS485 part, frame synchronization adjustment part.

STSN Board Functions


STSN Board Technical Indices

66 W

Supported


TDM Fiber Interface (TFI) This section describes the TFI board.


T AB L E 100 TO P I C S I N TDM F I B E R I N T E R F AC E (TF I ) S E C T I O N

Topics Page No.

TFI Board Appearance 184

TFI Board Working Principles 187

TFI Board Functions 188

TFI Board Technical Indices 188

TFI Board Appearance

The TFI board is the interface of the T network unit.

Figure 101 shows the panels of the TFI.

Power Consumption

Hot Swap

Service capability

Introduction

Contents

Overview

Outside View



F I G U R E 101 TF I P AN E L

RX

TX

ACT8 SD8

RX

ACT6 SD6

RX

ACT7 SD7

TX

RX

TXACT5 SD5

RX

TX

ACT4 SD4

RX

TXACT3 SD3

TX

TXACT2 SD2

RX

ACT1 SD1

TX

RX

RUNENUM

EXCH

RST

ACT ALM

TFI

There are 20 indicators on the TFI panel, as shown in Table 101.

T AB L E 101 I N D I C AT O R S O N TF I P AN E L








Indicators










On: module active.

Off: module active.

ACT1~8 Green Optical interface starting indicator


SD1~8 Green Optical signal indicator


Table 102 shows the buttons on the TFI panel. Button Description



T AB L E 102 BU T T O N S O N TF I M O D U L E

Name Description

RST Resets the TFI board.

EXCH Performs the active/standby changeover of the TFI board.

There is no DIP switch or jumper on the TFI board.

The TFI panel provides eight GE optical interfaces for the TDM access.

The corresponding rear board of the TFI board is a blank panel.

TFI Board Working Principles

The TFI provides interfaces from the TSNB or ETSN board inside the T-network unit to the external DTU and TCU.

Figure 102 shows the working principles of TFI.

F I G U R E 102 TF I B O AR D W O R K I N G P R I N C I P L E S

Board management

unit

LVDS selector

SERDES× 8 Optical

module8

LVDS multiplexer

LVDS divider

FPGA

8 sets of 576M active/standby

LVDS

Active/standby selection signal

8 sets of 576M active/standby

×

CPU monitoring part monitors the de-multiplexing and multiplexing of eight channels of optical transmission and establishes links. It checks links, bit error, and clock. It also provides functions such as state query and active/standby control. Besides, it communicates with the MP through an RS485 port. FPGA extracts and inserts 8 KHz frame synchronization signal. It also generates, inserts, and checks pseudo number.


External Interfaces


Description

Schematic Diagram

Working Principle



TFI Board Functions

In MGW system, T network unit provides switching function for the TDM timeslots between boards (for example DTB or VTC) inside the DTU and TCU. TFI is the interface of the T network unit. It provides interfaces from the TSNB inside the T network unit to the external DTU and TCU.

TFI Board Technical Indices

18 W

Supported

Each pair of TFIs supports the access of 64K timeslots.

SONET Digital Trunk Board (SDTB) This section describes the SDTB board.


T AB L E 103 TO P I C S I N SONET D I G I T AL TR U N K B O AR D (SDTB) S E C T I O N

Topics Page No.

SDTB Board Appearance 188

SDTB Board Working Principles 194

SDTB Board Functions 195

SDTB Board Technical Indices 195

SDTB Board Appearance

This section describes the SDTB board, including the front panel view, layout view of the circuit board, indicators, buttons, DIP switches, jumpers, and external interfaces.

Figure 103 shows the panels of the SDTB, and Figure 104 shows its circuit layout.

Power Consumption

Hot Swap

Service capability

Introduction

Contents

Overview

Outside View



F I G U R E 103 SDTB P AN E L

SDTB

ENUM RUN

ALMACTEXCH

RST

TX

RX

SD



F I G U R E 104 SDTB L AY O U T

EC subcard 1 EC subcard 2

EC subcard 3

EC subcard 4

There are five indicators on the SDTB panel, as shown in Table 104.

T AB L E 104 I N D I C AT O R S O N SDTB P AN E L








Indicators










On: module active.

Off: module active.

SD Green Optical signal indicator


Table 105 shows the buttons on the SDTB panel.

T AB L E 105 BU T T O N S O N SDTB M O D U L E

Name Description

RST Resets the SDTB board.

EXCH Performs the active/standby changeover of the SDTB board.

Button Description



There is no DIP switch or jumper on the SDTB board.

The SDTB provides one STM-1 external optical interface.

If 8K reference clock is not retrieved from STM-1 line, then no back board is used.

If 8K reference clock is retrieved from STM-1 line, then RGIM1 is used. Figure 105 shows the panel of RIMG1.


External Interfaces

Rear Board



F I G U R E 105 RGIM1 P AN E L

8KO

UT/

DE

BU

G-2

32

RGIM1

The RGIM1 board provides the following interface:

8KOUT/DEBUG-232 (RJ45 interface): Outputs the 8K system clock to the UIM board and provides the reference clock to the boards in the shelf. In addition, this interface can be used for debugging, and does not provide service functions in this case.



SDTB Board Working Principles

The SDTB board provides the STM-1 optical trunk interface for the system.

Figure 106 shows the working principle of the SDTB.

F I G U R E 106 SDTB B O AR D W O R K I N G P R I N C I P L E S

CPU subsystem

Ethernet PHY

Overhead

processing circuit

Mapping&

framing

circuit

Sw

itching circuit

8K

16M

2×8K

Board slot information

Optical module

Add/data bus

Optical fiber

Debug serial port

100M Ethernet

Clock drive

Drive

8K

16M

8K

Trans-former

Debug RJ45

Active/standby signal

Power supply

-48V

+3.3V,+5V+1.8V

STM-1

Clock phase-

locked drive

FPGAEPLD

19.44M

19.44M16M, 8K

TDMB

TDMA

To CLKG

To UIM

Drive

Drive

Overhead

16M, 8K

To FPGA

Ethernet PHY

Transformer

Debug RJ45

10M Ethernet to peer board

EC

Subcard

Bypass

The Circuitry of SDTB includes following parts:

CPU subsystem

155.52 MHz optical/electrical interface circuit

Switching circuit

Overhead processing circuit

Mapping and framing circuit

Data received from STM-1 optical interface is sent to the overhead processing circuit. Overhead processing circuit performs operations such as clock phase-locking and synthesis, section overhead processing, parallel-to-serial conversion, channel overhead processing and pointer processing on the data. Then the overhead processing sends data to the mapping and framing circuit for de-mapping. After that, data sends to framer and then sent to the backplane through switching circuit as 8MHW. If the EC function is needed, 8M HW is sent by the switching circuit and then sent to the backplane through the EC

Overview

Schematic Diagram

Working Principles



circuit. Framer can process CAS, which is then retrieved by the CPU. Mapping and framing circuit does not process CCS. Communication link data of the CPU is sent to the UIM through HDLC. Similarly, the switching circuit retrieves the communication link data from 8MHW of the backplane, and then sends the data through HDLC to the CPU for processing. Voice channel is sent to the mapping and framing circuit as 8 MHz. Mapping and framing circuit maps the voice channel and then sends it to the overhead processing circuit.

SDTB Board Functions

The SDTB provides the STM-1 trunk interface for the system. It can process the CAS signaling and CCS signaling. Each board has the processing capability of 63 E1s or 84 T1s.

It is usually used for the Nb interface (TDM bearer), and the access of the A and Ai interfaces. It also provides the EC function.

SDTB has the following functions:

It provides one 155 M STM-1 standard interface.

It is compatible with E1 and T1.

It provides AU pointer processing, mapping and de-mapping functions for the STM-1 signal.

It supports CAS and CCS.

It provides SDH network management function through the TDM.

It provides sixteen 8M HW to provide adaptation for the UIM.

It outputs two channels of differential 8K synchronization clock signal as the reference clock of the clock board.

It provides one 100M Ethernet interface for communicating with the UIM and transferring management information, control information, software version, and so on.

It provides functions such as remote reset and load and hardware WATCHDOG.

It provides active/standby communication and changeover functions.

SDTB Board Technical Indices

9.6 W

Supported

Description

Functions

Power Consumption

Hot Swap



The SDTB can process 63 channels of E1 signals or 84 channels of T1 signals.

Power Distribution Board (PWRD) This section describes the PWRD board.


T AB L E 106 TO P I C S I N P O W E R D I S T R I B U T I O N B O AR D (PWRD) S E C T I O N

Topics Page No.

PWRD Board Appearance 196

PWRD Board Working Principles 198

PWRD Board Function 199

PWRD Board Technical Indices 199

Corresponding Interface Board 200

PWRD Board Appearance

This section describes the PWRD, including the front panel view, layout view, indicators, DIP switches, and jumpers.

The PWRD is installed in the power distribution shelf, so it has no panel.

Figure 107 shows the layout of PWRD.

F I G U R E 107 L AY O U T D I AG R AM O F PWRD B O AR D

3214

23 14

There are eight indicators on the PWRD panel, as shown in Table 107.

Service capability

Introduction

Contents

Overview

Outside View

Indicators



T AB L E 107 I N D I C AT O R S O N T H E PWRD BO AR D


RUN Green RUN indicator Flashing at 5 Hz: the program version is being updated.

Flashing at 1 Hz: the board is running normally.

-48V (I) Red -48 V power Alarm indicator of the first channel

On: -48V power supply of the first channel is unavailable or in over-voltage/under-voltage status.

Off: -48 V power supply of the first channel is normal.

-48V (II) Red -48 V power Alarm indicator of the second channel

On: -48V power supply of the second channel is unavailable or in over-voltage/under-voltage status.

Off: -48 V power supply of the second channel is normal.

FAN Red Fan alarm indicator

On: At least one fan is faulty.

Off: All of the fans are normal.

HOT Red Temperature alarm indicator

On: the ambient temperature exceeds the threshold.

Off: the ambient temperature is normal.

SMOKE Red Smoke alarm indicator

On: the smoke exceeds the threshold.

Off: the smoke is parameter is normal.

DOOR Red Access alarm indicator

On: At least one monitored door is open.

Off: all the monitored doors are closed.

ARRESTER Red Lightning arrester alarm indicator

On: the lightning arrester is damaged and need be replaced.

Off: the lightning arrester is normal.

1. There are three jumpers on the PWRD: X1, X2, and X8.

X1 is used to debug the hardware. When the board works normally, it is short-circuited by default. The jumper breaks up for hardware debugging only.




X2 is used to download the EPLD logic.

X8 is used to select the RS485 matching mode.

1-2 and 9-10 are short-circuited to connect the terminal resistance. They should be short-circuited only when the PWRD is at the end of the RS485 bus.

3-4 and 7-8 are short-circuited to connect the RS485 port. They should be short-circuited only when the PWRD is in the middle of the RS485 bus.

5-6 are not used.

2. There are two DIP switches on the PWRD, S2 and S3.

S2 is used for software configuration. It is not used at present.

S3 is used for cabinet number configuration. ON = 0, OFF = 1. The jumper value is used as the address number for RS485 communication.

PWRD Board Working Principles

In the MGW system, the PWRD distributes, isolates, and backs up 2-channel -48 V power supply. It also monitors the power supply, cabinet, and environment.

Figure 108 shows the working principles of the PWRD.

F I G U R E 108 S C H E M AT I C D I AG R AM O F PWRD

Overview

Schematic Diagram



The PWRD comprises the sensor interfaces of the environment parameter, voltage detection circuit, signal processing and optoelectronic isolation circuit, digital interface logic circuit, minimum single-chip computer, alarm LEDs, and RS485 serial communication interface circuit. In the case of -48 V over-voltage/under-voltage, power failure, fan abnormality, smoke signal, intrusion signal, or temperature/humidity threshold-crossing signal, an LED alarm signal is generated and then sent to the OMP, related functional boards or the background server through an RS485 port.

PWRD Board Functions

In the MGW system, the PWRD distributes, isolates, and backs up 2-channels -48 V power supply. It also monitors the power supply, cabinet, and environment.

Power supply

It provides the functions of the EMC filter design, lightening protection design, and isolation design at the input/output end of the power supply.

Environment monitoring

It provides the functions of the over-voltage/under-voltage test of 2-channel -48 V power supplies, rotary speed test of 18 fans, ambient temperature/humidity test, smoke-sensitive alarm test, infrared alarm test, cabinet access control and access control of the equipment room.

PWRD Board Technical Indices

The environment parameters of the PWRD are adjustable. Default alarm points are as follows.

Voltage: An alarm occurs when the voltage is lower than -60 V or higher than -42 V.

Equipment-room temperature: An alarm occurs when temperature is lower than 0 °C or higher than 40 °C.

Cabinet temperature: An alarm occurs when temperature is lower than 0 °C or higher than 70 °C.

Ambient humidity: An alarm occurs when humidity is higher than 90%.

Working Principles

Overview

Functions



Corresponding Interface Board

The PWRD is installed in the power distribution shelf, and has no matching rear board. However, all of the external interfaces are provided by power distribution backplane PWRDB.

Figure 109 shows the layout of PWRDB.

F I G U R E 109 PWRDB B O AR D L AY O U T

The PWRD provides the following external signal interfaces.

Environment detection interfaces to connect the smoke sensor, temperature-humidity sensor, infrared sensor, and the access control sensors of the equipment room and cabinet.

Six groups of fan speed signal interfaces.

Two RS485 concatenated interfaces for connecting the OMP, and the RS485 cables used for the interconnection of cabinets.

Introduction

View

External Interface


C h a p t e r 4

Integrated Alarm Box

Overview

This chapter describes the appearance, functions and principle of the integrated alarm box.


T AB L E 108 TO P I C S I N CH AP T E R 4

Topic Title Page No.

Appearance 201

Functions 202

Principle 203

Appearance

Figure 110 shows the panel of the Integrated Alarm Box.

F I G U R E 110 IN T E G R AT E D AL A R M B O X P A N E L

Introduction

Contents

Panel Description



There are four indicators with different colors: red, blue, yellow, and green that indicate the level of alarm from higher to lower.

The corresponding alarm indicator flashes or stays on when an alarm is generated.

Environment alarm is processed as a certain level alarm, and no separate alarm indicator is set for it.

The Integrated Alarm Box implements alarm display functions with LCM. The dimension of LCM is lattice graphics display mode, and the front size is controlled by software to display different type of information.

The light on LCD is usually closed just to extend the life of light.

The light is powered on to enhance the effect of display on pressing key or displaying information.

There are some keys on the alarm box, which implements operation & maintenance functions with LCM.

Menu Key “M”: selecting menus.

Left arrow key: moving cursor to left when inputting numbers.

Right arrow key: moving cursor to right when inputting numbers.

Up arrow key: selecting menus, roll up or plus “1”.

Down arrow key: selecting menus, roll down or minus “1”.

Cancel key “C”: return menu or clear up.

Confirm key “OK”: confirming the operation.

Functions

The integrated alarm box has the characteristic of the previous alarm box with extra advantages and special features. Having distinct advantages, powerful functions and beautiful appearance, the integrated alarm box can meet the new requirements and future development requirements.

The alarm box employs the modular integrated design, which not only implements basic alarm functions but also implements enhanced functions to meet other requirements by using plug-in or components according to different configurations

According to different configurations, the integrated alarm box can implement the following functions to meet the requirements of different products:

Audio and visual alarms: The alarm box receives the alarm information from the OMC server, and the indicators on the alarm box indicate the severity of the alarm information. The alarm box also can give alarms through voice ringing of DC electrical bell.

Indicators

LCD

Keyboard

Overview

Functions

Chapter 4 Integrated Alarm Box


Hearing alarms: The voice management function of the background can record, edit and pre-play the voice, and download the voice file to the FLASH of the alarm box. Compared with the simple audio frequency alert tone, the alarm function with voice is more visual, diversified, and needs less hardware and software processing.

Display: The integrated alarm box displays the current alarm information, which includes locus, date and detailed content of the alarm.

Transmission: The integrated alarm box transmits the current alarm information to the maintenance persons. through wireless or lineate medium

Query: The integrated alarm box receives remote query orders, and transmits the current alarm information or parameters of equipment working status to the remote end.

Multi-office: Various kinds of communication equipment in one switching office can use one alarm box to indicate alarm information for different equipments.

Operation & maintenance: The alarm box can set parameters, diagnose itself and can be queried with the man-machine interface.

Remote end: The alarm box can be put in an office, which is hundred meters away from the equipment room.

GPS time choice: By using the time choice function of GPS receiver, the alarm box provides exact time or steady synchronous clock reference for equipment.

Interface: The alarm box provides not only Ethernet interface, but also RS232 and RS485 serial interfaces to connect to foreground or background directly.

The alarm box can be used at both the locale and the remote end. When used at the remote end, the alarm box connects with the remote server, such as being used for the OMC system or the integrated maintenance center. Through PLMN/PSTN, the remote alarm box can receive and display alarm information from some local alarm boxes or receive the local alarm files, and can send commands to the locale.

Furthermore, the remote sever receives alarm information from the locale through data net, then the remote alarm box displays the alarm information.

Principle

Figure 111 shows the principle of the integrated alarm box. Schematic Diagram



F I G U R E 111 IN T E G R AT E D AL AR M B O X P R I N C I P L E S

Serial EPROM

485 Interface

MS Module

GPS Module

232 Interface

Ethernet Transceiver

Voice Codec

RJ 11

RJ 11

DB 9

RJ 45

Buzzer

Standby Interface

Alarm Tone

LCD Module

ALMP

EPLDUnit

The integrated alarm box is composed of the ALMP, ALMK and ALML boards.

ALML board: Includes alarm indicators with four levels (in four colors) and corresponding drive circuits.

ALMK board: Includes key-press, adaptive socket of LCS module, providing power for LCD module to work normal and negative circuit for LCD display. The card and LCD module can be cancelled if the LCD is not necessary.

ALMP board: main processor card completes alarm information receiving and processing, generates and transmits audio & visual alarms. It consists of control circuit, interface circuit, and acts as a mother board for connection of the ALML and ALMK boards.

Principle Description


C h a p t e r 5

MGW Inner Cables

Overview

This chapter describes cables inside the cabinet, mainly focusing on the function of the inner cables, connection position at both ends, wire routing and signal features. The inner cables refer to the cables that are interconnected within the cabinet without going out of the cabinet.

Note:

The cables inside the cabinet are connected before delivery. The engineer only needs to check whether the cable wiring is tidy, secure and reasonable, and whether there is any wrong insertion or missing insertion.



Topics Page No.

System Clock Cable 206

Line Reference Clock Cable 207

Interconnection Cable on the Control Panel 208

PD485 Cable 209

Fan Monitoring Cable 209

Power Cables 210

Grounding Cables 215

Interconnection Fiber for TDM Switching Network 218

Interconnection Fiber for Packet Switching Network 220

Introduction

Contents



System Clock Cable

It implements the connection between the clock generator board CLKG and the UIM board for transmitting the clock signal (8 K, 16 M, and PP2S), and distributes synchronous clock signal to various shelves inside the MGW system. Every system clock cable implements the clock distribution to three shelves (that is, six UIMC/UIMU boards).

Cable end A connecting to the CLKG is the DB44 (pin) connector, while the cable end B connecting to UIM is the DB9 (pin) connector. The cable adopts six 8-core single-strand round cables. The cable structure is shown in Figure 112.

F I G U R E 112 S T R U C T U R E D I AG R AM O F S Y S T E M C L O C K C AB L E

Label

End A

End B1

End B2

End B3

End B4

End B5

End B6

Label

Label

Label

Label

Label

Label

Cable end A is located physically at the silkscreen identifier “CLKOUT” on the panel of the rear board RCKG1 and RCKG2.

Cable end B is divided into three groups, B1-2, B3-4, and B5-6. Each group connects to a shelf. Two terminals in one group connect to the corresponding rear board of active/standby UIMC or UIMU. When cable end B is connected to the UIMC, two terminals in one group respectively connect at the silkscreen identifier “CLK_IN” on the rear board RUIM2 and RUIM3. And when cable end B is connected to the UIMU, these two terminals are respectively connected at the silkscreen identifier “CLK_IN” on two rear boards RUIM1.

The signal flows from end A to end B.

1. 16 M refers to 16 MHz clock signal when the duty ratio is 50%.

2. Required time sequence relation between 8 K frame header and 16 M clock is as follows.

Functions

Structure

Connection Position

Wire Routing

Signal Flow Direction

Signal

Chapter 5 MGW Inner Cables


8 K frame header is in form of negative pulse; the rising edge of the 16 M clock starts the falling edge of the 8K frame header.

Width of the negative pulse, 8K frame header, is one 16M cycle.

Width of one frame is 125 μs.

3. PP2S signal meets the following requirement.

The PP2S is in form of negative pulse with its cycle as 2 s.

The width of the negative pulse is one CHIP clock (1.2288MHz) cycle.

Line Reference Clock Cable

The clock reference source of the CLKG is the upper-office 8 K line reference clock sent by the service board (APBE, SPB, DTEC, and DTB). Line reference clock cable implements connection between the service board and the system clock board CLKG. It sends the 8K reference clock signal to system clock board for phase-lock selection, and generates system synchronous clock.

Both ends of the cable are the 8P8C straight crimping shielding connectors, and the cable adopts 4-core single-strand round cable. The cable structure is shown in Figure 113.

F I G U R E 113 S T R U C T U R E D I AG R AM O F L I N E 8 K C L O C K C AB L E

Cable end A is located physically at the silkscreen identifier “8KOUT/DEBUG-232” on the rear board RSPB, RSPB, or RGIM1, or at the silkscreen identifier “8KOUT/ARM232” on the rear board RMNIC. These rear boards provide the reference clock.

Cable end B is located physically at the silkscreen identifier “8KIN1” and “8KIN2” on the panel of the rear board RCKG1.

Signal flows from the service board (end A) to the CLKG board (end B).

8K frame header extracted from the line

Functions

Structure

Connection Position


Signal



Interconnection Cable on the Control Panel

The interconnection cables on the control panel implement the tandem from the control plane Ethernet of each cascade shelf to the CHUB in the control shelf.

Cable end A is the DB44 (pin) connector, while the cable end B is the 8P8C straight crimping shielding connector. The cable adopts the FTP super category-5 shielding data cable. Figure 114 shows the cable structure.

F I G U R E 114 S T R U C T U R E D I AG R AM O F C O N T R O L P L AN E T AN D E M C AB L E

Label

Cable end A is located physically at any one of the silkscreen identifiers, which are FE1-8, FE9-16, FE17-24, FE25-32, FE33-40, and FE41-46, on the rear board RCHB1 or RCHB2.

Cable end B1~B8 are divided into four groups. End B2n-1 and End B2n (n=1~4) are in the same group. Each group connects to a shelf with two physical connections. Take End 1 and End 2 for example. When the cable is connected with the resource shelf, End B1 is located at the silkscreen identifier “FE-C1/3” on one RUIM1 board, while End B2 is located at the silkscreen identifier “FE-C1/3” on another RUIM1 board. When the cable is connected with other control shelf or switching shelf, End B1 is located at the silkscreen identifier “FE2n-1” on the RUIM2 board, while End B2 is located at the silkscreen identifier “FE2n” on the RUIM3 board (n=1~5).

100 M full-duplex Ethernet signal

Functions

Structure

Connection Position

Signal



PD485 Cable

PD485 cable is used for RS485 communication between the OMP and power distribution module to monitor the status of the PWRD board.

Both ends of the cable are the 8P8C straight crimping shielding connectors, and the cable adopts the FTP super category-5 shielding data cable. Figure 115 shows the cable structure.

F I G U R E 115 S T R U C T U R E D I AG R AM O F PD 485

END B

END A

LABEL

LABEL

Cable end A is located physically at the silkscreen identifier “PD485” on the panel of the rear board RMPB.

Cable end B is located physically at the silkscreen identifier “RS485” on the power distribution board PWRDB (the port above two RS485s).

The signal flows in dual direction.

Half-duplex RS485 signal

Fan Monitoring Cable

The fan monitoring cable connects the power distribution shelf with the fan shelf, facilitating the system monitoring the fan.

Both ends of the cable are the 8P8C straight crimping shielding connectors, and the cable adopts the FTP super category-5 shielding data cable. Figure 116 shows the cable structure.

F I G U R E 116 S T R U C T U R E D I AG R AM O F PD 485

END B

END A

LABEL

LABEL

Functions

Structure

Connection Position


Signal

Functions

Structure



Cable end A is located physically at RJ45 connector at the left back of the fan shelf, or at the left top-mounted fan rack.

Cable end B is located physically at the silkscreen identifier “FAN BOXn” (n=1~4) on the interface board PWRDB in the power distribution shelf.

The signal flows from the fan shelf to the power monitoring board.

Level signal of fan monitoring

Power Cables

Figure 117 shows the overall wire connection of the power system in the cabinet.

Connection Position


Signal

Overall Wire Connection



F I G U R E 117 OV E R AL L W I R E C O N N E C T I O N O F C AB I N E T P O W E R

Wiring shelf

BCTC

Fan shelf

-48V

-48V

PE

-48VGND

-48VGND

BCTC

BCTC

BCTC

Cabinet ground

Filter

-48V-48VGND

PE

-48VGND-48V

-48V-48VGND

PE

-48VGND-48V

-48V-48VGND

PE

-48VGND-48V

-48V-48VGND

PE

-48VGND-48V

PE

-48V-48VGND

BusbarGround grid

Filter

Wiring shelf

Fan shelf

Wiring shelf

Wiring shelfFan shelf

Functions

-48V power incoming line, blue, is used for accessing -48V power from the EMI filter on top to distribution shelf and then accessing the -48V from the power distribution shelf to cabinet busbar.

-48VGND power incoming line, black, is used for accessing -48VGND from the EMI filter on top to distribution shelf and

-48V Power Cable



then accessing the -48VGND from the distribution shelf to cabinet busbar.

Schematic diagram

Figure 118 shows the structure of the -48V power cable.

F I G U R E 118 -48V P O W E R CAB L E

Technical indices

Table 110 shows the technical indices of the -48V power cable.

T AB L E 110 -48V P O W E R CAB L E

Item Technical Indices

Nominal cross-sectional area 16 mm2

Rated voltage 450 V

Highest operational temperature 70 °C

Fire resistant Supported

Functions

The service shelf power cable implements the connection of power -48V, -48VGND, PGND, and GND from the busbar to shelf filter and from the shelf filter to the backplane. In this way, it accomplishes power supply to the shelf.

Schematic diagram

Figure 119 shows the structure of the power cable between the busbar and the shelf filter. Figure 120 shows the power cable from the shelf filter to the backplane.

F I G U R E 119 P O W E R C AB L E F R O M B U S B AR T O S H E L F F I L T E R (C AB L E 1 )

Service Shelf Power Cable



Note: End C connects to the power interface on the shelf filter, and B1~B3 connect to the busbar.

F I G U R E 120 P O W E R C AB L E F R O M S H E L F F I L T E R T O BA C K P L A N E (C AB L E 2 )

Note: Direction C is a shelf filter, and B1~B3 connect to the backplane.

Technical indices

Table 111 shows the technical indices of the power cable from a busbar to a shelf filter.

T AB L E 111 PO W E R C AB L E F R O M B U S B AR T O S H E L F F I L T E R



Maximum DC resistance at 20 3.3 Ω/km

Insulation thickness rating 0.8 mm

Rated voltage 450 V


Table 112 shows the technical indices of the power cable from a shelf filter to the backplane.

T AB L E 112 PO W E R C AB L E F R O M S H E L F F I L T E R T O B AC K P L AN E





Rated voltage 450 V


Functions

Fan shelf power cable implements the power connection from the busbar to the fan shelf, supplying power to fans in the fan shelf.

Schematic diagram

Fan Shelf Power Cable



The structure of fan shelf power cable is shown in Figure 121.

F I G U R E 121 S T R U C T U R E D I AG R AM O F F A N S H E L F P O W E R C AB L E

Technical indices

Table 113 shows the technical indices of the Fan shelf power cable.

T AB L E 113 FAN S H E L F P O W E R C AB L E





Rated voltage 300 V


Function

The set-top fan shelf power cable implement the power connection from the busbar to the set-top fan shelf, supplying power to fans in the set-top fan shelf.

Structure

Figure 122 shows the structure of set-top fan shelf power cable.

F I G U R E 122 S T R U C T U R E D I AG R AM O F S E T -TO P F AN S H E L F P O W E R C AB L E

Set-Top Fan Shelf Power

Cable



Note: End A connects to the set-top fan shelf, while end B1~B3 connect to the busbar.

Technical indices

Table 114 shows the technical indices of the Fan shelf power cable.






Rated voltage 300 V


Grounding Cables

Figure 123 shows the overall wire connection of the grounding system in the cabinet.

Overall Wire Connection



F I G U R E 123 OV E R AL L W I R E C O N N E C T I O N O F GR O U N D I N G C AB L E

Wiring shelf

BCTC

Fan shelf

-48V

-48V

PE

-48VGND

-48VGND

BCTC

BCTC

BCTC

Cabinet ground

Filter

-48V-48VGND

PE

-48VGND-48V

-48V-48VGND

PE

-48VGND-48V

-48V-48VGND

PE

-48VGND-48V

-48V-48VGND

PE

-48VGND-48V

PE

-48V-48VGND

BusbarGround grid

Filter

Wiring shelf

Fan shelf

Wiring shelf

Wiring shelfFan shelf

Functions

The cabinet-door grounding cable connects the front/back door of the cabinet with the cabinet ground.

Schematic diagram

Figure 124 shows the structure of the grounding cable of the cabinet door.

Cabinet-Door Grounding

Cable



F I G U R E 124 C AB I N E T -D O O R GR O U N D I N G C AB L E

Technical indices

Table 115 shows the technical indices of the fan shelf power cable.






Rated voltage 450 V


Function

The protective grounding transit cable connects the busbar protection ground and the cabinet ground.

Schematic diagram

Figure 125 shows the structure of the protective grounding transit cable.

F I G U R E 125 P R O T E C T I V E GR O U N D I N G TR AN S I T C AB L E

Technical indices

Table 116 shows the technical indices of the protective grounding transit cable.

T AB L E 116 PR O T E C T I V E GR O U N D I N G TR A N S I T C AB L E



Rated voltage 450 V



Protective Grounding

Transit Cable



Function

The shelf grounding grid cable connects the shelves to the cabinet grounding grid to ensure the reliable lap-connection between shelves and rack.

Structure

The structure of the shelf grounding grid cable is shown in Figure 126. Without directivity, either End A or End B can be connected to the PE interface of the shelf or the grounding grid.

F I G U R E 126 S H E L F GR O U N D I N G GR I D C AB L E

Technical indices

Table 117 shows the technical indices of the protective grounding tandem cable.

T AB L E 117 PR O T E C T I V E GR O U N D I N G T AN D E M C AB L E



Rated voltage 450 V/750 V



Interconnection Fiber for TDM Switching Network

The interconnection fiber for the TDM switching network is used to connect the data over TDM in the resource shelf or GE switching resource shelf to the circuit switching shelf for T network switching.

From resource shelf to circuit switching shelf

Figure 127 shows the fiber connection from the resource shelf to the circuit switching shelf with full capacity. The value of N in "Sn" is 1, 3, 5, or 7.

For half switching capacity of 8K, active and standby boards individually connect a pair of optical interfaces.

For 16K full switching capacity, active and standby boards individually connect two pairs of optical interfaces.

Shelf Grounding Grid

Cable

Functions

Fiber Connection



F I G U R E 127 IN T E R C O N N E C T I O N F I B E R F O R TDM S W I T C H I N G N E T W O R K (FU L L S W I T C H I N G CAP AC I T Y )

From GE switching resource shelf to circuit switching shelf

The fiber connection from GE switching resource shelf to circuit switching shelf with full switching capacity is as follows.

The fourth ~ eighth pairs of optical interfaces on the left active GUIM panel are connected to the first ~ fourth or fifth ~ eighth pairs of optical interfaces on the left TFI panel.

The fourth ~ eighth pairs of optical interfaces on the right standby GUIM panel are connected to the first ~ fourth or fifth ~ eighth pairs of optical interfaces on the right TFI panel.

Each pair of optical interface interconnection provides 8K switching capacity. The full switching capacity is 32K (All of the four pairs of optical interfaces are connected with the circuit switching shelf).

The signal is 640 M optical signal.

Technical Indices



Interconnection Fiber for Packet Switching Network

The interconnection fiber for the packet switching network is used to connect the packet data in the resource shelf to the circuit switching shelf for packet switching.

From resource shelf to packet switching shelf

Eight fibers are used to implement the fiber connection with the intra-board and inter-board optical port protection, as shown in Figure 128. The “n” in the SDn port is 1, 3, 5, or 7.

F I G U R E 128 IN T E R C O N N E C T F I B E R F O R PAC K E T S W I T C H I N G N E T W O R K (U IMT-GLI )

From GE switching resource shelf to packet switching shelf

16 fibers are used to implement the fiber connection with the intra-board and inter-board optical port protection, as shown in Figure 129. The “n” in the SDn port is 1 or 4.

Overview

Fiber Connection



F I G U R E 129 IN T E R C O N N E C T F I B E R F O R PAC K E T S W I T C H I N G N E T W O R K (GUIM -GLI )

The signal is 1000 M optical signal. Technical Indices


C h a p t e r 6

MGW Outer Cables

Overview

This chapter describes outer cables of the MGW cabinet. Outer cables are used to connect external system out of the cabinet.



Topics Page No.

Environment Monitoring Transit Cable 224

Hygrothermal Sensor Cable 225

Smoke Sensor Cable 226

Infrared Sensor Cable 227

Access Control Sensor Cable 228

Cable from Carrier Power Supply to Cabinet-Top Filter Power Supply

229

Cables between Cabinet Protective Ground and Equipment Room Ground

230

75 Ω E1 Trunk Cable 231

120 Ω E1 Trunk Cable (3×16-Core) 234

120 Ω E1 Trunk Cable (11×4-Core) 237

100 Ω T1 Trunk Cable (50-Core) 240

100 Ω T1 Trunk Cable (6×8-Core) 242

OMC Ethernet Cable 245

Inter-Cabinet PD485 Interconnection Cable 246

IP Access Cable of Mc Interface 247

User Plane Interconnection Cables of Nb Interface 247

Introduction

Contents



Environment Monitoring Transit Cable

The environment monitoring transit cable is used to connect the PWRD board in the power distribution shelf to connect the outer sensors and access control system. One end of the cable connects with the power distribution shelf, and the other end with five DB9 connectors connects with different sensors and access control system.

Figure 130 shows the structure of the environment monitoring transit cable.

F I G U R E 130 S T R U C T U R E O F E N V I R O N M E N T M O N I T O R I N G TR AN S I T C A B L E

End A is located physically at the silkscreen identifier “SENSORS” on rear of the power distribution shelf, and end B connects with various sensors or access control system. The corresponding relation between each connector of the cable and the sensor is shown in Table 119.

T AB L E 119 CO R R E S P O N D I N G C O N N E C T I O N R E L AT I O N

End B ID Corresponding Sensor

B1 Access control sensor

B2 Infrared sensor

B3 Hygrothermal sensor

B4 Smoke sensor

B5 Reserved

Technical indices of the environment monitoring transit cable are shown in Table 120.

Function

Structure

Technical Indices

Chapter 6 MGW Outer Cables


T AB L E 120 TE C H N I C AL I N D I C E S O F E N V I R O N M E N T M O N I T O R I N G TR AN S I T C AB L E

Item Indices

Conductor Tin-coated copper, chlorinated polyethylene insulation

Sheath Complying with the requirements in the GB8815 for the Type H-70 chlorinated polyethylene sheath material

Nominal diameter of conductor 0.4 mm

Nominal insulation thickness 0.2 mm

Nominal sheath thickness 0.6 mm

DC resistance < 153 Ω/km

Characteristic impedance 100 Ω

Attenuation < 40 dB/km (1 MHz)

Insulation resistance ≧ 500 MΩ/km

Working capacitance <120 nF/km (1 kHz)

Transmission frequency 10 MHz

Hygrothermal Sensor Cable

The hygrothermal sensor cable is used to connect the hygrothermal sensor with the End B3 of the environment monitoring transit cable to monitor the ambient temperature and humidity.

In the hygrothermal sensor, the humidity core adopts humidity-sensitive capacitance elements. After linearization processing of the single-chip computer, the system outputs frequency signals without A/D transfer. It directly collects and processes the hygrothermal signal value through computer. It is installed with wall-mounted mode, with hidden cabling slot at the back of the transmitter.

Figure 131 shows the schematic diagram of the hygrothermal sensor. End A connects with the End B3 of the environment monitoring transit cable, while End B connects with the hygrothermal sensor.

Functions

Structure



F I G U R E 131 H Y G R O T H E R M AL S E N S O R C AB L E

End A End B

CD

Direction C Direction D

Label

Label

Male Female

Table 121 shows technical indices of the hygrothermal sensor.

T AB L E 121 TE C H N I C AL I N D I C E S O F T H E HY G R O T H E R M AL S E N S O R

Item Indices

Humidity precision ±3% RH (25 °C), 25-95% RH (typical)

Temperature precision ±0.5 °C (25 °C)

Output

(0~+50, 0%RH ~100%RH)

1 kHz~1.5 kHz square wave;

1 kHz~2 kHz square wave

Supplied voltage 5 V~12 V DC

Working temperature -20 °C~+80 °C

Smoke Sensor Cable

The smoke sensor cable is used to connect the smoke sensor and the End B4 of the environment monitoring transit cable, monitoring the environmental smoke signal.

The exploration room of the smoke sensor is in herringbone maze structure. It can effectively probe smoke at the initial smoldering stage or smoke generated after the fire breaks out. When the smoke enters the explorer, the light source scatters and the light-receiver senses the light signal; when light intensity reaches the preset threshold value, the explorer generates fire alarm signal, lightens its own fire-alarm-indicator (red) to confirm a fire, and outputs alarm signal to peripheral devices.

Figure 132 shows the cable structure of the smoke sensor. End A connects with the End B4 of the environment monitoring transit cable, while End B connects with the smoke sensor.

Technical Indices

Functions

Schematic Diagram



F I G U R E 132 SM O K E S E N S O R C AB L E

Schematic diagram of sensor base pin

LED

Label

Label

Direction C

End A

End B

C

Table 122 shows technical indices of the smoke sensor.

T AB L E 122 TE C H N I C AL I N D I C E S O F T H E SM O K E S E N S O R

Item Indices

Working voltage 17 V~33 V DC

Alert current ≤25 μA

Working temperature -10 °C～+50 °C

Relative humidity ≤95% (40 °C±2 °C)

Alarm current ≤15 mA

Source of emission Am241 source < 2.59×104 Bq (0.7 μci)

Outline dimensions Explorer: 100×39.9 mm;

Base:104×12 mm

Online mode Double wires: power supply anode (pin 3), signal (pin 6)

Installation Mode Ceiling exposed, protected area (storey height H<6 M): 60 M2

Infrared Sensor Cable

The infrared sensor cable is used to connect the infrared sensor and the End B2 of the environment monitoring transit cable.

There are micro wave transmitting antenna and receiving antenna on the infrared sensor. The microwave frequency transmitted by the explorer is set as ft. After reflection, the frequency of the reflected microwave received by the explorer is

Technical indices

Functions



set as fr. f=f t-fr, when f is not equal to zero, the system outputs alarm signal.

Figure 133 shows the cable structure of the infrared sensor. End A connects with the End B2 of the environment monitoring transit cable, while End B connects with the infrared sensor.

F I G U R E 133 IN F R AR E D S E N S O R C AB L E

Technical indices of the infrared sensor are shown in Table 123.

T AB L E 123 TE C H N I C AL I N D I C E S O F T H E IN F R AR E D S E N S O R


Working voltage 9 V~16 V DC

Working current 12 V DC: static 25 mA; start 45 mA

Working temperature -10 °C ~ 50 °C

Detection range 5 m ~ 15 m

Detection angle 90 °C

Access Control Sensor Cable

Access control sensor cable is used to monitor doors of equipment rooms and cabinet.

Figure 134 shows the cable structure of the access control sensor on the door of the equipment room. End A connects to the DB9 (the DB25 interface is converted into the DB9 interface) interface on the cable let out from the identifier “DOOR” on the back side of the power distribution shelf. End B connects to the access control sensor on the door of the equipment room.

Schematic Diagram

Technical Indices

Functions

Schematic Diagram



F I G U R E 134 C AB L E S T R U C T U R E O F AC C E S S C O N T R O L S E N S O R (E Q U I P M E N T R O O M )

Label

Figure 135 shows the structure of the access control sensor cable. End A connects to the End B1 of the environment monitoring transit cable. End B connects to the access control sensor on the cabinet front or back door of the cabinet.

F I G U R E 135 C AB L E S T R U C T U R E O F AC C E S S C O N T R O L S E N S O R (C AB I N E T D O O R )

Table 124 shows technical indices of the access control sensor.

T AB L E 124 TE C H N I C AL I N D I C E S O F T H E AC C E S S C O N T R O L S E N S O R

Item Indices

Action distance 16 mm~45 mm

Working current ≤0.5 A

Working voltage ≤100 V DC

Life ≥1000000 hours (10 mVA)

Impedance 0.3 Ω

Withstand voltage 250 DCV

Cable from Carrier Power Supply to Cabinet-Top Filter Power Supply

This cable is used to connect the power supply in the equipment room and the filters on top of the cabinet.

Figure 136 shows the structure of the cable.

Technical Indices

Functions

Schematic Diagram



F I G U R E 136 -48 V P O W E R C AB L E

Table 125 shows the technical indices.

T AB L E 125 TE C H N I C AL I N D I C E S O F -48V P O W E R C AB L E

Item Indices


Rated voltage 450 V



Cables between Cabinet Protective Ground and Equipment Room Ground

This cable connects the cabinet protective ground to the equipment room ground.

Figure 137 shows the structure of the cable.

F I G U R E 137 C AB L E B E T W E E N C AB I N E T P R O T E C T I V E GR O U N D AN D E Q U I P M E N T RO O M GR O U N D

Without directivity, either End A or End B can be connected to the protective ground on top of the cabinet or that of the equipment room.

The technical indices are shown in Table 126.

T AB L E 126 TE C H N I C AL I N D I C E S O F C AB L E S B E T W E E N C AB I N E T P R O T E C T I V E GR O U N D AN D E Q U I P M E N T RO O M GR O U N D

Item Indices


Technical Indices

Functions

Schematic Diagram

Technical Indices



Item Indices

Rated voltage 450 V



75 Ω E1 Trunk Cable

The common 75 Ω trunk cable used by DTB, DTEC and SPB boards implements non-balanced access of the external E1.

Figure 138 shows the structure of the 75 Ω trunk cable.

F I G U R E 138 75 Ω TR U N K C AB L E S T R U C T U R E D I AG R A M

Acting as the trunk cable of DTB/DTEC

The end A connects with the E1 interface (DB44 interface) of the RDTB. The RSPB has three groups of E1 interfaces connecting with three groups of cables, totally introducing 32 lines of E1 signal.

The first group of E1 cable introduces the No. 1~11 lines of E1 signal.

The second group of E1 cable introduces the No. 11~21 lines of E1 signal.

The third group of E1 cable introduces the No. 22~32 lines of E1 signal.

Each group of cables introduces at most 11 lines of E1 signal.

The End B1 corresponds to the first five lines of E1 signal.

The End B2 corresponds to the last 6 lines of E1 signal.

In the first group of cables, the last line of the B2 is not used.

The 10-core micro-coaxial cable is used at the End B1, while the 12-core micro-coaxial cable is used at the End B2. Corresponding to the sending of the E1 signal, the odd cores in the cables at the Ends B1 and B2 connect to the receiving end of the opposite end; corresponding to the receiving of the E1 signal, the even cores in the cables at the Ends B1

Functions

Schematic Diagram

Cable Connection



and B2 connect to the coaxial sending end of the opposite end (for example, the first 2 cores correspond to a pair of E1).

Acting as the trunk cable of SPB

The End A connects with the E1 interface (DB44 interface) of the RSPB. The RSPB has 2-group E1 interfaces to connect with 2-group cables. It can introduce totally 16 lines of E1 signal.




The End B1 corresponds to the first five lines of E1 signal.

The End B2 corresponds to the last six lines of E1 signal.

The End B2 in the second group of cables is not used.

The 10-core micro-coaxial cable is used at the End B1, while the 12-core micro-coaxial cable is used at the End B2. Corresponding to the sending of the E1 signal, the odd cores in the cables at the Ends B1 and B2 connect to the receiving end of the opposite end. Corresponding to the receiving of the E1 signal, the even cores in the cables at the Ends B1 and B2 connect to the coaxial sending end of the opposite end (for example, the first 2 cores correspond to a pair of E1).

Table 127 shows the corresponding relationship between the pins on the port A and the core wires of the End B1.

T AB L E 127 CO R R E S P O N D I N G R E L AT I O N S H I P B E T W E E N P I N S O F P O R T A AN D C O R E W I R E S O F E N D B1

Pin Number at the End A

Cores at the End B1 Signal Name

36 E1_TX0+

35 The first core shield wire (OUT0)

E1_TX0-

34 E1_RX0+

33 The second core shield wire (IN0)

E1_RX0-

17 E1_TX1+

18 The third core shield wire (OUT1)

E1_TX1-

31 E1_RX1+

32 The fourth core shield wire (IN1)

E1_RX1-

16 E1_TX2+

1 The fifth core shield wire (OUT2)

E1_TX2-

2 The sixth core shield wire (IN2) E1_RX2+

Relationship between Pins

and Cores





3 E1_RX2-

21 E1_TX3+

22 The seventh core shield wire (OUT3)

E1_TX3-

6 E1_RX3+

7 The eighth core shield wire (IN3)

E1_RX3-

19 E1_TX4+

20 The ninth core shield wire (OUT4)

E1_TX4-

4 E1_RX4+

5 The tenth core shield wire (IN4)

E1_RX4-

Table 128 shows the corresponding relation between the pins at the End A and the cores at the End B2.

T AB L E 128 CO R R E S P O N D I N G R E L AT I O N B E T W E E N T H E P I N S AT T H E E N D A AN D T H E C O R E S AT T H E E N D B2



25 E1_TX5+

26 The first core shield wire (OUT5)

E1_TX5-

10 E1_RX5+

11 The second core shield wire (IN5)

E1_RX5-

8 E1_TX6+

9 The third core shield wire (OUT6)

E1_TX6-

23 E1_RX6+

24 The fourth core shield wire (IN6)

E1_RX6-

12 E1_TX7+

13 The fifth core shield wire (OUT7)

E1_TX7-

27 E1_RX7+

28 The sixth core shield wire (IN7)

E1_RX7-

43 E1_TX8+

44 The seventh core shield wire (OUT8)

E1_TX8-

42 E1_RX8+

41 The eighth core shield wire (IN8)

E1_RX8-

14 E1_TX9+

15 The ninth core shield wire (OUT9)

E1_TX9-

29 E1_RX9+

30 The tenth core shield wire (IN9)

E1_RX9-





40 E1_TX10+

39

The eleventh core shield wire (OUT10) E1_TX10-

38 E1_RX10+

37 The twelfth core shield wire (IN10)

E1_RX10-

The cable adopts the 10-core and 12-core 75 Ω micro-coaxial cable. The outside diameter of one core is 2.6 mm or 2.0 mm.

Each trunk cable can provide 11-group E1 access.

120 Ω E1 Trunk Cable (3×16-Core)

The common 120Ω trunk cable used by DTB, DTEC and SPB boards implements balanced access of the external E1.


F I G U R E 139 S T R U C T U R E D I AG R AM O F 120 Ω TR U N K CAB L E (3×16-CO R E ) Lab

el


The End A connects with the E1 interface (DB44 interface) of the RDTB. The RSPB has three groups of E1 interfaces connecting with three groups of cables, totally introducing 32 lines of E1 signal.




Each group of cables introduces at most 11 lines of T1 signal.

The End B1 corresponds to the No. 1~4 lines of E1 signal.


Technical Indices

Functions

Schematic Diagram

Cable Connection



The End B3 corresponds to the No. 9~10 or No. 9~11 lines of E1 signals.

In the first group of cables, the End B3 uses the first two lines. In the second and third groups of cables, the End B3 uses the first three lines.

The 16-core micro-coaxial cable is used at the Ends B1, B2 and B3. Corresponding to the sending and the receiving of one line of E1 signal, each four lines of cores connect to the receiving end and the sending end of the opposite end.

Acting as the trunk cable of the SPB

The end A connects with the E1 interface (DB44 interface) of the RSPB. The RSPB has 2-group E1 interfaces connecting with 2-group cables. It can introduce totally 16 lines of E1 signal.







The second group of E1 cables uses the Ends B1 and B2, and the end B2 uses the first line of E1 signal.

The 16-core micro-coaxial cable is used at the Ends B1, B2 and B3. Corresponding to the sending and the receiving of one line of E1 signal, each four lines of cores connect to the receiving end and the sending end of the opposite end.

Table 129 shows the corresponding relation between the pins at the end A and the cores at the end B.

T AB L E 129 CO R R E S P O N D I N G R E L AT I O N B E T W E E N T H E P I N S AT T H E E N D A AN D T H E C O R E S AT T H E E N D B

Signal Name


Color Spectrum

End B Core Sequence at the End B

E1_TX0+ 36

E1_TX0- 35

Blue (Red 1)

Blue (Black 1)

1 (OUT0)

E1_RX0+ 34

E1_RX0- 33

Pink (Red 1)

Pink (Black 1)

2 (IN0)

E1_TX1+ 17

E1_TX1- 18

Green (Red 1)

Green (Black 1)

3 (OUT1)

E1_RX1+ 31 Yellow (Red 1)

B1

4 (IN1)


and Cores



Signal Name


Color Spectrum


E1_RX1- 32 Yellow (Black 1)

E1_TX2+ 16

E1_TX2- 1

Grey (Red 1)

Grey (Black 1)

5 (OUT2)

E1_RX2+ 2

E1_RX2- 3

Blue (Red 2)

Blue (Black 2)

6 (IN2)

E1_TX3+ 21

E1_TX3- 22

Pink (Red 2)

Pink (Black 2)

7 (OUT3)

E1_RX3+ 6

E1_RX3- 7

Green (Red 2)

Green (Black 2)

8 (IN3)

E1_TX4+ 19

E1_TX4- 20

Blue (Red 1)

Blue (Black 1)

9 (OUT4)

E1_RX4+ 4

E1_RX4- 5

Pink (Red 1)

Pink (Black 1)

10 (IN4)

E1_TX5+ 25

E1_TX5- 26

Green (Red 1)

Green (Black 1)

11 (OUT5)

E1_RX5+ 10

E1_RX5- 11

Yellow (Red 1)

Yellow (Black 1)

12 (IN5)

E1_TX6+ 8

E1_TX6- 9

Grey (Red 1)

Grey (Black 1)

13 (OUT6)

E1_RX6+ 23

E1_RX6- 24

Blue (Red 2)

Blue (Black 2)

14 (IN6)

E1_TX7+ 12

E1_TX7- 13

Pink (Red 2)

Pink (Black 2)

15 (OUT7)

E1_RX7+ 27

E1_RX7- 28

Green (Red 2)

Green (Black 2)

B2

16 (IN7)

E1_TX8+ 43

E1_TX8- 44

Blue (Red 1)

Blue (Black 1)

17 (OUT8)

E1_RX8+ 42

E1_RX8- 41

Pink (Red 1)

Pink (Black 1)

18 (IN8)

E1_TX9+ 14

E1_TX9- 15

Green (Red 1)

Green (Black 1)

19 (OUT9)

E1_RX9+ 29

E1_RX9- 30

Yellow (Red 1)

Yellow (Black 1)

20 (IN9)

E1_TX10+ 40

E1_TX10- 39

Grey (Red 1)

Grey (Black 1)

B3

21 (OUT10)



Signal Name


Color Spectrum


E1_RX10+ 38

E1_RX10- 37

Blue (Red 2)

Blue (Black 2)

22 (IN10)

The cable adopts the 3×16-core 120 Ω PCM cable.


120 Ω E1 Trunk Cable (11×4-Core)

The common 120 Ω trunk cable used by DTB, DTEC and SPB boards implements balanced access of the external E1. It is not used at present, because it has many outgoing lines.


F I G U R E 140 S T R U C T U R E D I AG R AM O F 120 Ω TR U N K CAB L E (11×4-CO R E ) La

bel


The End A connects with the E1 interface (DB44 interface) of the RDTB. The RSPB has three groups of E1 interfaces connecting with three groups of cables, totally introducing 32 lines of E1 signal.




Each group of cables introduces at most 11 lines of E1 signal. Ends B11~B11 correspond to a line of E1 sequentially. In the first group of cables, the last line of the E1 is not used.

The 4-core micro-coaxial cable is used at the ends B1, B2 and B3. Corresponding to the sending and the receiving of

Technical Indices

Functions

Schematic Diagram

Cable Connection



one line of E1 signal, each four lines of cores connect to the receiving end and the sending end of the opposite end.


The end A connects with the E1 interface (DB44 interface) of the RSPB. The RSPB has 2-group E1 interfaces connecting with 2-group cables. It can introduce totally 16 lines of E1 signal.

The first group of E1 cables introduces the No. 1~11 lines of E1 signal.

The second group of E1 cables introduces the No. 12~16 lines of E1 signal.

The ends B1~B11 correspond to one line of E1 respectively according to sequence. Only the ends B1~B5 are used in the second group of cables.

The 4-core micro-coaxial cable is used at the ends B1, B2 and B3. Corresponding to the sending and the receiving of one line of E1 signal, each four lines of cores connect to the receiving end and the sending end of the opposite end.



Signal Name


Color Spectrum


E1_TX0+ 36

E1_TX0- 35

Blue (red)

Blue (black) 1 (OUT0)

E1_RX0+ 34

E1_RX0- 33

Pink (red)

Pink (black)

B1

2 (IN0)

E1_TX1+ 17

E1_TX1- 18

Blue (red)


E1_RX1+ 31

E1_RX1- 32

Pink (red)

Pink (black)

B2

4 (IN1)

E1_TX2+ 16

E1_TX2- 1

Blue (red)


E1_RX2+ 2

E1_RX2- 3

Pink (red)

Pink (black)

B3

6 (IN2)

E1_TX3+ 21

E1_TX3- 22

Blue (red)


E1_RX3+ 6

E1_RX3- 7

Pink (red)

Pink (black)

B4

8 (IN3)


and Cores



Signal Name


Color Spectrum


E1_TX4+ 19

E1_TX4- 20

Blue (red)


E1_RX4+ 4

E1_RX4- 5

Pink (red)

Pink (black)

B5

10 (IN4)

E1_TX5+ 25

E1_TX5- 26

Blue (red)


E1_RX5+ 10

E1_RX5- 11

Pink (red )

Pink (black)

B6

12 (IN5)

E1_TX6+ 8

E1_TX6- 9

Blue (red)


E1_RX6+ 23

E1_RX6- 24

Pink (red)

Pink (black)

B7

14 (IN6)

E1_TX7+ 12

E1_TX7- 13

Blue (red)


E1_RX7+ 27

E1_RX7- 28

Pink (red)

Pink (black)

B8

16 (IN7)

E1_TX8+ 43

E1_TX8- 44

Blue (red)


E1_RX8+ 42

E1_RX8- 41

Pink (red)

Pink (black)

B9

18 (IN8)

E1_TX9+ 14

E1_TX9- 15

Blue (red)


E1_RX9+ 29

E1_RX9- 30

Pink (red)

Pink (black)

B10

20 (IN9)

E1_TX10+ 40

E1_TX10- 39

Blue (red )


E1_RX10+ 38

E1_RX10- 37

Pink (red)

Pink (black)

B11

22 (IN10)

This cable adopts the 11×4-core 120 Ω PCM cable.


Technical Indices



100 Ω T1 Trunk Cable (50-Core)

The common 100 Ω trunk cable used by DTB, DTEC and SPB boards implements balanced access of the external T1.


F I G U R E 141 S T R U C T U R E D I AG R AM O F 100 Ω TR U N K CAB L E

Direction C

C

Label

End A

End B


The End A connects with the T1 interface (DB44 interface) of the RDTB. The RDTB has three groups of T1 interfaces connecting with three groups of cables, totally introducing 32 lines of T1 signal.

The first group of T1 cable introduces the No. 1~10 lines of T1 signals.

The second group of T1 cable introduces the No. 11~21 lines of T1 signals.

The third group of T1 cable introduces the No. 22~32 lines of T1 signals.

Each group of cables introduces at most 11 lines of T1 signals (the End B of the first group of T1 cables does not use the last line of T1 signal).

The 50-core micro coaxial cable is used at the End B. Corresponding to the sending and the receiving of one line of T1 signal, each four lines of cores connect to the receiving end and the sending end of the opposite end.


The end A connects to the T1 interface (DB44 interface) of the RSPB. The RSPB has 2-group T1 interfaces connecting with 2-group cables. It can introduce totally 16 lines of T1 signal.

The first group of T1 cables introduces the No. 1~11 lines of T1 signal.

The second group of T1 cables introduces the No. 12~16 lines of T1 signal.

Functions

Schematic Diagram

Cable Connection



Each group of cables introduces at most 11 lines of T1 signal (the end B of the second group of T1 cables only uses the first 5 lines of T1 signal).

The 50-core shield network cable is used at the end B. Corresponding to the sending and the receiving of one line of T1 signal, each four lines of cores connect to the receiving end and the sending end of the opposite end.



Signal Name

End A Color Spectrum Core Sequence at

the End B

E1_TX0+ 36

E1_TX0- 35

White

Orange

1 (OUT0)

E1_RX0+ 34

E1_RX0- 33

White

Blue

2 (IN0)

E1_TX1+ 17

E1_TX1- 18

White

Brown

3 (OUT1)

E1_RX1+ 31

E1_RX1- 32

White

Green

Red strip

4 (IN1)

E1_TX2+ 16

E1_TX2- 1

White

Orange

5 (OUT2)

E1_RX2+ 2

E1_RX2- 3

White

Blue

6 (IN2)

E1_TX3+ 21

E1_TX3- 22

White

Brown

7 (OUT3)

E1_RX3+ 6

E1_RX3- 7

White

Green

Yellow strip

8 (IN3)

E1_TX4+ 19

E1_TX4- 20

White

Orange

9 (OUT4)

E1_RX4+ 4

E1_RX4- 5

White

Blue

10 (IN4)

E1_TX5+ 25

E1_TX5- 26

White

Brown

11 (OUT5)

E1_RX5+ 10

E1_RX5- 11

White

Green

Blue strip

12 (IN5)

E1_TX6+ 8

E1_TX6- 9

White

Orange

Purple strip

13 (OUT6)


and Cores



Signal Name

End A Color Spectrum Core Sequence at

the End B

E1_RX6+ 23

E1_RX6- 24

White

Blue

14 (IN6)

E1_TX7+ 12

E1_TX7- 13

White

Brown

15 (OUT7)

E1_RX7+ 27

E1_RX7- 28

White

Green

16 (IN7)

E1_TX8+ 43

E1_TX8- 44

White

Orange

17 (OUT8)

E1_RX8+ 42

E1_RX8- 41

White

Blue

18 (IN8)

E1_TX9+ 14

E1_TX9- 15

White

Brown

19 (OUT9)

E1_RX9+ 29

E1_RX9- 30

White

Green

White strip

20 (IN9)

E1_TX10+ 40

E1_TX10- 39

White

Orange

21 (OUT10)

E1_RX10+ 38

E1_RX10- 37

White

Blue

Black strip

22 (IN10)

This cable adopts 50-core UTP CAT5 cable.

Each trunk cable can provide 11-group T1 access.

100 Ω T1 Trunk Cable (6×8-Core)

The common 100 Ω trunk cable of the DTB/DTEC/SPB board implements balanced access of the external T1.


F I G U R E 142 S T R U C T U R E D I AG R AM O F 100 Ω TR U N K CAB L E

Label

Technical Indices

Functions

Schematic Diagram




The End A connects with the T1 interface (DB44 interface) of the RDTB. The RDTB has three groups of T1 interfaces connecting with three groups of cables, totally introducing 32 lines of T1 signal.

The first group of T1 cable introduces the No. 1~10 lines of T1 signal.

The second group of T1 cable introduces the No. 11~21 lines of T1 signal.

The third group of T1 cable introduces the No. 22~32 lines of T1 signals.


The End B1 corresponds to the first and the second lines of T1 signal;

The End B2 corresponds to the third and fourth lines of T1 signals.

The End B3 corresponds to the fifth and sixth lines of T1 signals.

The end B4 corresponds to the seventh and the eighth lines of T1 signal;

The End B5 corresponds to the ninth and the tenth lines of T1 signals.

The End B6 corresponds to the eleventh line of T1 signal.

The End B6 of the first group of cables is not used.



The end A connects with the T1 interface (DB44 interface) of the RSPB. Having 2-group T1 interfaces connecting with 2-group cables, the RSPB can introduce totally 16 lines of T1 signal.

The first group of T1 cables introduces the No. 1~11 lines of T1 signal.

The second group of T1 cables introduces the No. 12~16 lines of T1 signal.


End B1 corresponds to the first and the second lines of T1 signal.

End B2 corresponds to the third and the fourth lines T1 signals.

End B3 corresponds to the fifth and the sixth lines of T1 signal.

Cable Connection



End B4 corresponds to the seventh and the eighth lines of T1 signal.

End B5 corresponds to the ninth and the tenth lines of T1 signal.

End B6 corresponds to the eleventh line of T1 signal.

The end B (B1, B2 and B3) of the second group of T1 cables only uses the first 5 lines of T1 signal, and the end B3 only uses the first line of T1 signal.




Signal Name


Color Spectrum


E1_TX0+ 36

E1_TX0- 35

White-orange

Orange

1 (OUT0)

E1_RX0+ 34

E1_RX0- 33

White-blue

Blue

2 (IN0)

E1_TX1+ 17

E1_TX1- 18

White-brown

Brown

3 (OUT1)

E1_RX1+ 31

E1_RX1- 32

White-green

Green

End B1

4 (IN1)

E1_TX2+ 16

E1_TX2- 1

White-orange

Orange

5 (OUT2)

E1_RX2+ 2

E1_RX2- 3

White-blue

Blue

6 (IN2)

E1_TX3+ 21

E1_TX3- 22

White-brown

Brown

7 (OUT3)

E1_RX3+ 6

E1_RX3- 7

White-green

Green

End B2

8 (IN3)

E1_TX4+ 19

E1_TX4- 20

White-orange

Orange

9 (OUT4)

E1_RX4+ 4

E1_RX4- 5

White-blue

Blue

10 (IN4)

E1_TX5+ 25 White-brown

End B3

11 (OUT5)


and Cores



Signal Name


Color Spectrum


E1_TX5- 26 Brown

E1_RX5+ 10

E1_RX5- 11

White-green

Green

12 (IN5)

E1_TX6+ 8

E1_TX6- 9

White-orange

Orange

13 (OUT6)

E1_RX6+ 23

E1_RX6- 24

White-blue

Blue

14 (IN6)

E1_TX7+ 12

E1_TX7- 13

White-brown

Brown

15 (OUT7)

E1_RX7+ 27

E1_RX7- 28

White-green

Green

End B4

16 (IN7)

E1_TX8+ 43

E1_TX8- 44

White-orange

Orange

17 (OUT8)

E1_RX8+ 42

E1_RX8- 41

White-blue

Blue

18 (IN8)

E1_TX9+ 14

E1_TX9- 15

White-brown

Brown

19 (OUT9)

E1_RX9+ 29

E1_RX9- 30

White-green

Green

End B5

20 (IN9)

E1_TX10+ 40

E1_TX10- 39

White-orange

Orange

21 (OUT10)

E1_RX10+ 38

E1_RX10- 37

White-blue

Blue

End B6

22 (IN10)

The cable adopts the 6×8-core UTP CAT5 cable.

Each trunk cable can provide 11-group T1 access.

OMC Ethernet Cable

The OMC Ethernet cable implements the connection from the operation and maintenance board OMP to the background.

Figure 143 shows the structure of the OMC Ethernet Cable. Cable end A is located at the silkscreen identifier “OMC2” on the panel of the rear board RMPB, while cable end B provides the standard RJ45 male interface externally.

Technical Indices

Function

Structure



F I G U R E 143 S T R U C T U R E D I AG R AM O F OMC E T H E R N E T C AB L E

End A End B

Label Label

10 10

Signal transmits as 100M full-duplex Ethernet signal.

Inter-Cabinet PD485 Interconnection Cable

PD485 interconnection cables interconnect the power P RS485 signal between cabinets.

Figure 144 shows the schematic diagram of the PD485 interconnection cable.

F I G U R E 144 IN T E R -C AB I N E T RS485 I N T E R C O N N E C T I O N C AB L E

Cable end A is located physically at the silkscreen identifier “RS485” (bottom) of the interface board PWRDB that is in the power distribution shelf of the outlet cabinet.

Cable end B is located physically at the silkscreen identifier “RS485” (top) of the interface board PWRDB that is in the power distribution shelf of the inlet cabinet.

Signal transmits as half-duplex 485 signal.

The RS485 signal on the PWRD supports the bus mode in connecting multiple racks. According to the configuration principle of matching resistance terminals of the RS485 bus, for multi-rack connection, it is required to set the X8 jumper on the power monitoring board PWRD based on the rack locations. Table 133 shows the configuration principle.

Signal

Functions

Schematic Diagram

Cable Connection

Technical Indices

Multiple Cabinet

Instructions



T AB L E 133 X8 C O N F I G U R AT I O N P R I N C I P L E

Connection Mode for Pin X8 Concrete Definition

1－2

9－10

Serving as the rack at the end-point of the 485 bus

3－4

7－8

Serving as the rack at the mid-point of the 485 bus

Taking three racks for example, Figure 145 shows the detailed PD485 cable connection during multi-cabinet interconnection.

F I G U R E 145 PD485 C AB L E C O N N E C T I O N M O D E

IP Access Cable of Mc Interface

The IP access cable implements the IP access of the Mc interface.

Cable End A is located physically at the silkscreen identifier “FEn” (n=1~4) on the panel of the rear board RMNIC of the SIPI board.

Cable End B provides externally standard RJ45 male interface to the IP network of the MSCS system.

Signal transmits as 100M full-duplex Ethernet signal.

User Plane Interconnection Cables of Nb Interface

The access modes of user plane interconnection cables at the Nb interface are as follows.

Example

Functions

Connection Position

Signal

Access Modes



TDM bearer cable, mainly adopting the DTB or DTEC board

TDM bearer fiber, mainly adopting the SDTB board

IP bearer cable, mainly adopting the IPI (FE) or IPI (GE electric) board

IP bearer fiber, mainly adopting the IPI (GE optical) board

IP-over-SDH fiber (POS access), mainly adopting the IPI (pos155M) and IPI (POS622M) boards.

Function

The SDTB board is usually used for the access of the Nb (TDM bearer), A, and Ai interfaces.

Cable Connection

One end of one fiber connects with “Tx” on the SDTB board, and the other end connects with the receiving end of the opposite end office.

One end of one fiber connects with “Rx” on the SDTB board, and the other end connects with the sending end of the opposite end office.

Technical Indices

The signal is the STM-1 optical signal.

Function

Currently, the IPI (FE) board is used for connecting the IP interconnection cable of the user plane to complete the access of the Nb interface when IP bearer is adopted.

Structure

The cable adopts the FTP super category-5 shielding data cable. Both ends of the cable are the 8P8C straight crimping shielding plugs.

Connection relation of both ends

Table 134 shows the connection relation of both ends.

T AB L E 134 CO N N E C T I O N RE L AT I O N O F B O T H E N D S

End A End B Signal Name Color Spectrum

1 3 Tx+ White-orange

2 6 Tx- Orange

3 1 Rx+ White-green

4 4 - Blue

5 5 - White-blue

6 2 Rx- Green

7 7 - White-brown

8 8 - Brown

TDM Bearer

IP Connection Cable



Plugging positions

The end A is physically located at the silkscreen identifier FEn (n=1~4) on the RMNIC rear board of the IPI (FE) board.

The end B provides externally Ethernet RJ45 male interface.

Function

The IPI (GE optical) boards can be connected with the IP interconnection fiber of the user plane to complete the access of the Nb interface when the IP bearer is adopted.

Cable connection

One end of one fiber connects with “Tx” on the IPI (GE optical) board of local end, and the other end connects with the receiving end of the switch or router.

One end of one fiber connects with “Rx” on the IPI (GE optical) board of local end, and the other end connects with the sending end of the switch or router.

Technical indices

The signal is the 1G optical signal.

Function

The IPI (POS155M) or IPI (POS622M) boards can be connected with the SDH interconnection fiber of the user plane to complete the access of the Nb interface when the IP-over-SDH is adopted.

Cable connection

One end of one fiber connects with “Tx” on the IPI (POS155M) or IPI (POS622M) board of local end, and the other end connects with the receiving end of the switch or router.

One end of one fiber connects with “Rx” on the IPI (POS155M) or IPI (POS622M) board of local end, and the other end connects with the sending end of the switch or router.

The quantity of 155M and 622M ports depends on the subscriber capacity.

Technical indices

The signal is the optical signal of the SDH (155M or 622M).

IP Connection Fiber of User

Plane

POS Interconnection Fiber of User

Plane


A p p e n d i x A

Abbreviations

Abbreviations Full Name

A

ACK Acknowledgement

ACM Accumulated Call Meter

ACM Address Complete Message

AE Application Entity

APB ATM Process Board

AoC Advice of Charge

AoCC Advice of Charge Charging supplementary service

AoCI Advice of Charge Information supplementary service

ASE Application Service Element

ASIG Analog Signaling

AuC Authentication Centre

B

BAIC Barring of All Incoming Calls supplementary service

BAOC Barring of All Outgoing Calls supplementary service

BCCH Broadcast Control Channel

BCTL Back Control

BCSN Backplane of Circuit Switch Network

BDT Back Digital Trunk

BCTC Backplane of Control Center

BFBI Back Fiber Bus Interface

BHCA Busy hour Calling Attempt

BIC-Roam Barring of Incoming Calls when Roaming outside

the home PLMN country supplementary service




BNET Back Network

BO all Barring of Outgoing call supplementary services

BOIC Barring of Outgoing International Calls supplementary service

BOIC-exHC Barring of Outgoing International Calls except those directed to the home PLMN Country supplementary service

BPSN Backplane of Packet Switch Network

BS Basic Service (group)

BS Bearer Service

BSG Basic Service Group

BTS Base Transceiver Station

BUSN Backplane of Universal Switch Network

C

CAI Charge Advice Information

CB Cell Broadcast

CBC Cell Broadcast Centre

CBCH Cell Broadcast Channel

CBK Clear Back signal

CC Country Code

Call Control

CCF Conditional Call Forwarding

CCITT The International Telegraph and Telephone Consultative Committee

Cct Circuit

CF all Call Forwarding services

CFB Call Forwarding on mobile subscriber Busy supplementary service

CFNRc Call Forwarding on mobile subscriber Not Reachable supplementary service

CFNRy Call Forwarding on No Reply supplementary service

CFU Call Forwarding Unconditional supplementary service

CG Charging Gateway

CGC Circuit Group Congestion signal

CI Cell Identity

CUG Index

CLKG CLOCK Generator

Appendix A Abbreviations



CLKI CLOCK Interface

CLI Calling Line Identity

CLIP Calling Line Identification Presentation supplementary service

CLIR Calling Line Identification Restriction supplementary service

CM Connection Management

CMD Command

CMP Control Main Processor

COLI Connected Line Identity

COLP Connected Line identification Presentation supplementary service

COLR Connected Line identification Restriction supplementary service

D

DTB Digital Trunk Board

G

COLP Connected Line identification Presentation supplementary service

GLI GE Line Interface

GERAN GSM Enhanced Radio Access Network

I

IMAB IMA Board

IPB IP Process Board

IPI IP bearer Interface

IWFB IWF Board

M

MNIC Multi-service Network Interface Card

MONB Monitor Board

MPB Main Process Board

MRB Media Resource Board

O

OMP Operation Main Processor

P

PLI POS Line Interface

PSN Packet Switch Network

PWRD POWER Distributor

S




SDHB SDH Board

SDTB Sonnet Digital Trunk Board

SDU Selection and Distribution Unit

SMP Signal Main Processor

SPB Signaling Process Board

T

TFI TDM Fiber Interface

TSNB TDM Switch Network Board

U

UIM Universal Interface Module

V

VTC Voice Trancoder Card


Glossary

3G refers to next generation of mobile communication systems. These offer enhanced services, such as multimedia and video. Main 3G technologies include UMTS and CDMA2000.

3GPP was formed in December 1998 as a collaboration agreement bringing together a number of telecommunication standards bodies. These standards bodies are referred to as Organizational Partners. Aim of 3GPP was to produce globally applicable technical specifications for third generation mobile systems based on evolved GSM Core Networks and the radio access technology Universal Terrestrial Radio Access (UTRAN).

3GPP2 is a sister project to 3GPP and is a collaboration agreement regarding third generation mobile networks. It is comprised of five Standards Development Organizations similar to Organizational Partners in 3GPP. 3GPP2 mainly deals with the following five areas: A-interface system, CDMA2000, American National Standards Institute-41 (ANSI-41), wireless packet data inter-working, and services & systems aspects.

An Access Point is a network device which provides the point of interconnection between wireless station (laptop computer, PDA) and wired network.

Bearer Service is a type of telecommunication service that provides the capability for transmission of signals between access points.

Broadband in radio systems identifies a type of communication channel capable of carrying a large portion of electromagnetic spectrum. It may also be applied to fixed communication systems when referring to bearers capable of carrying high volumes of traffic.

A client server application protocol using well known ports 20 and 21. It uses the services of Transmission Control Protocol (TCP) to provide reliability in the transfer of data files between network nodes. FTP was first defined as a standard in Request for Comments (RFC 959).

GE Ethernet (GE) is the Ethernet standard offering GE services and typically employs fibre. This technology has been used for backbone networks and desktops for high end servers and intensive graphical applications.

A Handoff, or Handover, is the process in which a cellular phone is handed from one cell to the next in order to maintain a radio connection with the network

3G

3GPP

3GPP2

Access Point

Bearer Service

Broadband

FTP

GE

Handoff or Handover



International Mobile Equipment Identity is a unique identifier allocated to each Mobile Equipment (ME). It consists of a Type Approval Code (TAC), a Final Assembly Code, Serial Number (SNR) and a Spare Digit.

International Mobile Subscriber Identity is a unique identifier allocated to each mobile subscriber in a GSM and UMTS network. It consists of a Mobile Country Code (MCC), a Mobile Network Code (MNC) and a Mobile Station Identification Number (MSIN).

ISDN User Part is part of the SS7 protocol layer and used in setting up, management, and release of trunks that carry voice and data between calling and called parties.

This is the interface in UMTS which links the Radio Network Controller with MSC Server.

This is the interface in UMTS which links the RNC with MGW.

Location Area Identity uniquely identifies a Location Area (LA) within any Public Land Mobile Network (PLMN). It is comprised of the Mobile Country Code (MCC), Mobile Network Code (MNC) and the Location Area Code (LAC).

MAC address refers to hardware address and uniquely identifies a device within a defined network area.

Mobile Station ISDN (MSISDN) Number is the standard international telephone number used to identify a given subscriber. MSISDN is based on the International Telecommunications Union-Telecommunication Standardization Sector (ITU-T) E.164 standard.

Mobile Station Roaming Number is an E.164 defined telephone number used to route telephone calls in a mobile network from a Gateway Mobile Switching Centre (GMSC) to the target MSC.

Message Transfer Part forms part of the SS7 protocol stack and provides reliable routing usually within a network.

A set of procedures, software, equipment etc in order to keep a network operating in an efficient manner. ITU-T have developed a series of standards for Network Management which are referred to as the Telecommunication Management Network (TMN). This sub-divides Network Management into the following five categories; Fault, Configuration, Performance, Accounting and Security.

Node B is the function within the UMTS network that provides physical radio link between User Equipment (UE) and the network.

A physical channel supports physical media, usually in an encoded format. This may be pulses of light, a modulated voltage or radio waves.

Conceptual model of layered architecture of communication protocols in which, layers within a station are represented in hierarchical order. Each layer in the protocol stack is defined in generic terms describing functionality and mode of operation.

IMEI

IMSI

ISUP

Iu-CS

Iu-PS

LAI

MAC Address

MSISDN

MSRN

MTP

Network Management

Node B

Physical Channel

Protocol Stack

Glossary


Performance of a communications channel or system is usually expressed in terms of Quality of Service (QoS). Depending upon the communication system, QoS may relate to service performance, Signal to Noise Ratio (SNR), Bit Error Ratio (BER), maximum and mean throughput rate, reliably, priority and other factors specific to each service.

Radio Access Network (RAN) performs the radio functionality of network, as well providing connection to Core Network. RAN typically includes a controller Radio Network Controller (RNC) in 3GPP and BSC in 3GPP2 and several transmitter/receivers Node B in 3GPP, BTS in 3GPP2.

Radio Access Network Application Part (RANAP) is used in a UMTS system on the Iu interface. It is responsible for function including setting up of a Radio Access Bearer (RAB) between the Core Network and RNC.

Signalling Connection Control Part is used to provide a means for the transfer of messages between any two signalling points in the same or different SS7 networks.

Streaming Control Transmission Protocol (SCTP) is a reliable transport protocol operating on top of IP. It provides acknowledged error free non duplicated transfer of data. STCP also detects data corruption, loss of data and duplication of data by using checksums and sequence numbers.

A Signaling Gateway is used to support the transport of signalling traffic received from one network and passed into another network.

In order to ensure subscriber identity confidentiality VLR and MGW may allocate Temporary Mobile Subscriber Identities (TMSI) to visiting mobile subscribers. VLR and MGW must be capable of correlating an allocated TMSI with IMSI of MS to which it is allocated. A MS may be allocated two TMSI, one for services provided through VLR, and the other known as the Packet TMSI (P-TMSI) services provided through the MGW.

Telephone User Part was an earlier implementation of SS7 that did not allow for data type applications, hence the introduction of ISDN User Part (ISUP).

A 3G mobile communications system which provides an enhanced range of multimedia services. UMTS will speed convergence between telecommunications, IT, media and content industries to deliver new services and create fresh revenue generating opportunities. UMTS will deliver low cost, high capacity mobile communications offering data rates as high as 2Mbps under stationary conditions with global roaming and other advanced capabilities. The specifications defining UMTS are formulated by 3GPP.

The identifier in ATM cell header that identifies to which virtual channel the cell belongs.

A standard designed to allow the content of Internet to be viewed on the screen of a mobile device such as mobile phones,

QoS

Radio Access Network

RANAP

SCCP

SCTP

Signaling Gateway

TMSI

TUP

UMTS

VCI

WAP



personal organisers and pagers. WAP also overcomes the processing limitation of such devices. Information and services available are stripped down to their basic text format.


Figures

Figure 1 19-inch Standard MGW Cabinet ...............................2

Figure 2 Integrated Cabinet without Door .............................3

Figure 3 Partial Cabinet without Door ...................................4

Figure 4 Cabinet Structure ..................................................5

Figure 5 Optical Fiber Shelf .................................................7

Figure 6 Cabinet Rear Cabling .............................................7

Figure 7 Plane View ......................................................... 13

Figure 8 Structural View of Fan Shelf.................................. 15

Figure 9 Front View of the Service Shelf.............................. 16

Figure 10 Back View of the Service Shelf............................. 16

Figure 11 Sectional View of the Service Shelf....................... 17

Figure 12 Configuration Diagram ....................................... 19

Figure 13 Communications Relationship between Shelves...... 20

Figure 14 Layout of DIP Switches on Backplane ................... 20

Figure 15 Control Shelf Configuration ................................. 24

Figure 16 Control Shelf Principle ........................................ 24

Figure 17 BCTC Rear View ................................................ 26

Figure 18 Resource Shelf Configuration 1............................ 29



Figure 21 Resource Shelf Principles .................................... 30

Figure 22 BUSN Rear View................................................ 32

Figure 23 Single-Shelf Office with Pure TDM ........................ 35

Figure 24 Single-Shelf Office with TDM and IP Switching ....... 35

Figure 25 BGSN1............................................................. 36

Figure 26 BGSN2............................................................. 36

Figure 27 GE Switching Resource Shelf Principles ................. 37

Figure 28 BGSN Rear View................................................ 39

Figure 29 Level-1 Switching Shelf Configuration................... 40



Figure 30 Principle of Level-1 Switching Shelf ...................... 41

Figure 31 BPSN Rear View ................................................ 42

Figure 32 Configuration of Circuit Switching Shelf ................ 44

Figure 33 Principle of the Circuit Switching Shelf .................. 45

Figure 34 Rear View Of BCSN............................................ 46

Figure 35 Busbar Structure ............................................... 47

Figure 36 Circuit Board Structure....................................... 53

Figure 37 Panel of the CLKG.............................................. 58

Figure 38 Layout of the CLKG Circuit Board ......................... 59

Figure 39 Panel Diagram of the RCKG1 and RCKG2 .............. 64

Figure 40 Schematic Diagram of CLKG................................ 65

Figure 41 Panel Diagram of MPx86 Board............................ 69

Figure 42 Layout Diagram of MPx86 Circuit Board ................ 70

Figure 43 Schematic Diagram of the MPx86 Board................ 74

Figure 44 Panel Diagram of the RMPB................................. 76

Figure 45 SIPI Outside View.............................................. 78

Figure 46 MNIC Board Panel (1) ........................................ 79

Figure 47 MNIC Board Panel (2) ........................................ 80

Figure 48 Schematic Diagram of MNIC Board....................... 83

Figure 49 RGER Panel Diagram.......................................... 85

Figure 50 Panel Diagram of the RMNIC ............................... 87

Figure 51 Panels of UIM, UIMU, and UIMT ........................... 89

Figure 52 UIM Layout....................................................... 90

Figure 53 UIM Board Working Principle ............................... 92

Figure 54 Panels of RUIM2 and RUIM3................................ 96

Figure 55 Panel of RUIM1 ................................................. 98

Figure 56 Front Panel Diagram of GUIM ............................ 100

Figure 57 Panel Diagram of GUIM1 and GUIM2 .................. 103

Figure 58 GUIM Board Working Principle ........................... 104

Figure 59 Panel Diagram of SPB Circuit Board.................... 106

Figure 60 Layout Diagram of SPB Circuit Board.................. 107

Figure 61 Panel Diagram of RSPB..................................... 110

Figure 62 Schematic Diagram of SPB Circuit Board............. 112

Figure 63 Panel Diagram of the APBE ............................... 114

Figure 64 Layout Diagram of APBE................................... 115

Figure 65 Panel Diagram of RGIM1................................... 118

Figures


Figure 66 Schematic Diagram of APBE .............................. 119

Figure 67 IWFB Panel..................................................... 121

Figure 68 IWFB Layout ................................................... 122

Figure 69 Schematic Diagram of IWFB.............................. 124

Figure 70 MRB Panel ...................................................... 127

Figure 71 MRB Working Principles .................................... 129

Figure 72 VTCD Panel..................................................... 133

Figure 73 VTCD Layout................................................... 134

Figure 74 VTCD Working Principles................................... 136

Figure 75 Panels of the PSN4V/PSN8V .............................. 138

Figure 76 Schematic Diagram of the PSN4V/PSN8V ............ 140

Figure 77 Panel Diagram of GLI Module ............................ 143

Figure 78 Layout Diagram of GLIQV Module ...................... 144

Figure 79 Schematic Diagram of the GLIQV....................... 146

Figure 80 DTB Panel ...................................................... 148

Figure 81 DTB Layout..................................................... 149

Figure 82 RDTB Panel..................................................... 152

Figure 83 DTB Working Principle ...................................... 154

Figure 84 DTEC Panel..................................................... 156

Figure 85 DTEC Layout................................................... 157

Figure 86 RDTB Panel..................................................... 160

Figure 87 DTEC Working Principle .................................... 162

Figure 88 Panel Diagram of CHUB .................................... 164

Figure 89 Layout Diagram of CHUB .................................. 165

Figure 90 Panel Diagram of RCHB1 and RCHB2 .................. 167

Figure 91 Schematic Diagram of CHUB ............................. 168

Figure 92 TSNB Panel..................................................... 170

Figure 93 TSNB Layout................................................... 171

Figure 94 TSNB Working Principles................................... 173

Figure 95 ETSN Panel..................................................... 175

Figure 96 ETSN Layout ................................................... 176

Figure 97 ETSN Working Principles ................................... 178

Figure 98 STSN Panel..................................................... 180

Figure 99 STSN Layout................................................... 181

Figure 100 STSN Working Principles ................................. 183

Figure 101 TFI Panel ...................................................... 185



Figure 102 TFI Board Working Principles ........................... 187

Figure 103 SDTB Panel................................................... 189

Figure 104 SDTB Layout ................................................. 190

Figure 105 RGIM1 Panel ................................................. 193

Figure 106 SDTB Board Working Principles ........................ 194

Figure 107 Layout Diagram of PWRD Board....................... 196

Figure 108 Schematic Diagram of PWRD........................... 198

Figure 109 PWRDB Board Layout ..................................... 200

Figure 110 Integrated Alarm box panel............................. 201

Figure 111 Integrated Alarm Box Principles ....................... 204

Figure 112 Structure Diagram of System Clock Cable ......... 206

Figure 113 Structure Diagram of Line 8 K Clock Cable......... 207

Figure 114 Structure Diagram of Control Plane Tandem Cable................................................................................... 208

Figure 115 Structure Diagram of PD 485........................... 209

Figure 116 Structure Diagram of PD 485........................... 209

Figure 117 Overall Wire Connection of Cabinet Power ......... 211

Figure 118 -48V Power Cable .......................................... 212

Figure 119 Power Cable from Busbar to Shelf Filter (Cable 1)................................................................................... 212

Figure 120 Power Cable from Shelf Filter to Backplane (Cable 2)................................................................................... 213

Figure 121 Structure Diagram of Fan Shelf Power Cable ...... 214

Figure 122 Structure Diagram of Set-Top Fan Shelf Power Cable................................................................................... 214

Figure 123 Overall Wire Connection of Grounding Cable ...... 216

Figure 124 Cabinet-Door Grounding Cable......................... 217

Figure 125 Protective Grounding Transit Cable................... 217

Figure 126 Shelf Grounding Grid Cable ............................. 218

Figure 127 Interconnection Fiber for TDM Switching Network (Full Switching Capacity) ................................................. 219

Figure 128 Interconnect Fiber for Packet Switching Network (UIMT-GLI).................................................................... 220

Figure 129 Interconnect Fiber for Packet Switching Network (GUIM -GLI) .................................................................. 221

Figure 130 Structure of Environment Monitoring Transit Cable................................................................................... 224

Figure 131 Hygrothermal Sensor Cable............................. 226

Figure 132 Smoke Sensor Cable ...................................... 227

Figures


Figure 133 Infrared Sensor Cable..................................... 228

Figure 134 Cable Structure of Access Control Sensor (Equipment Room) ......................................................... 229

Figure 135 Cable Structure of Access Control Sensor (Cabinet Door) ........................................................................... 229

Figure 136 -48 V Power Cable ......................................... 230

Figure 137 Cable between Cabinet Protective Ground and Equipment Room Ground................................................. 230

Figure 138 75 Ω Trunk Cable Structure Diagram ................ 231

Figure 139 Structure Diagram of 120 Ω Trunk Cable (3×16-Core)................................................................................... 234

Figure 140 Structure Diagram of 120 Ω Trunk Cable (11×4-Core)................................................................................... 237

Figure 141 Structure Diagram of 100 Ω Trunk Cable........... 240

Figure 142 Structure Diagram of 100 Ω Trunk Cable........... 242

Figure 143 Structure Diagram of OMC Ethernet Cable ......... 246

Figure 144 Inter-Cabinet RS485 Interconnection Cable ....... 246

Figure 145 PD485 Cable Connection Mode......................... 247


Tables

Table 1 Chapter Summary ...................................................i

Table 2 Typographical Conventions ...................................... ii

Table 3 Mouse Operation Conventions .................................. ii

Table 4 Topics in Chapter 1.................................................1

Table 5 Cabinet Dimensions ................................................2

Table 6 Cabinet Composition ...............................................4

Table 7 Function of Each Part ..............................................6

Table 8 Labels in Cabinet Rear Cabling .................................8

Table 9 Operating Environment ...........................................8

Table 10 Dimensions..........................................................8

Table 11 Operating Requirements ........................................9

Table 12 Power Consumption ..............................................9

Table 13 Topics in Chapter 2 ............................................. 11

Table 14 Dimensions........................................................ 12

Table 15 Function of Each Part of the Power Distribution Shelf13

Table 16 Topics in Service Shelf Section ............................. 15

Table 17 Function of Each Part of the Service Shelf .............. 17

Table 18 Functions of Each Shelf........................................ 18

Table 19 Corresponding Relationship between Shelf & Backplane..................................................................................... 19

Table 20 Office Number DIP Switch Signal Definition ............ 21

Table 21 Cabinet Number DIP Switch Signal Definition.......... 21

Table 22 Shelf Number DIP Switch Signal Definition ............. 21

Table 23 Topics in Control Shelf Section.............................. 22

Table 24 Board Configuration on the Control Shelf................ 22

Table 25 External Interface of the Control Shelf ................... 26

Table 26 Topics in Resource Shelf Section ........................... 26

Table 27 Board Configuration on the Resource Shelf ............. 27

Table 28 External Interfaces of the Resource Shelf ............... 32

Table 29 Topics in GE Switching Resource Shelf Section ........ 32



Table 30 Board Configuration on Resource Shelf .................. 33

Table 31 External Interfaces of the Resource Shelf ............... 39

Table 32 Topics in Level-1 Switching Shelf Section ............... 39

Table 33 Board Configuration of Level-1 Switching Shelf ....... 40

Table 34 External Interface............................................... 42

Table 35 Topics in Circuit Switching Shelf Section ................ 43

Table 36 Board Configuration on Circuit Switching Shelf........ 43

Table 37 External Interfaces Of Circuit Switching Shelf ......... 46

Table 38 Topics in Chapter 3 ............................................. 49

Table 39 Labels in Module Structure................................... 53

Table 40 Circuit Boards with Their Abbreviations .................. 54

Table 41 Board Components ............................................. 54

Table 42 Topics in Clock Generator Board (CLKG) Section ..... 57

Table 43 Indicators of CLKG Board..................................... 59

Table 44 Buttons on CLKG Board ....................................... 62

Table 45 Interfaces on RCKG1 and RCKG2 .......................... 65

Table 46 Topics in Main Processing Board (MPx86) Section .... 67

Table 47 Indicators on the MPx86 Board ............................. 70

Table 48 Panel Buttons on MPx86 Board ............................. 73

Table 49 Topics in Multi-Function Network Interface Board (MNIC) Section ................................................................ 77

Table 50 Indicators on MNIC Panel..................................... 81

Table 51 Buttons on MNIC Module ..................................... 82

Table 52 Topics in Universal Interface Module Board (UIM) Section ........................................................................... 88

Table 53 Indicators of UIM board ....................................... 90

Table 54 Buttons in UIM board .......................................... 92

Table 55 Topics in GE Universal Interface Module Board (GUIM) Section ........................................................................... 99

Table 56 Indicators of GUIM board................................... 100

Table 57 Buttons in GUIM board ...................................... 102

Table 58 Topics in Signaling Processing Board (SPB) Section 105

Table 59 Indicators on SPB Board .................................... 107

Table 60 Buttons on SPB Module...................................... 108

Table 61 Connection Mode of Pins X9~X16........................ 111

Table 62 Topics in ATM Process Board (APBE) Section......... 113

Table 63 APBE Panel Indicators ....................................... 115

Tables


Table 64 Buttons on the APBE Module .............................. 117

Table 65 Topics in Inter-Working Function Board (IWFB) Section................................................................................... 120

Table 66 Indicators on IWFB Board .................................. 122

Table 67 Buttons on IWFB Module.................................... 123

Table 68 Topics in Media Resource Board (MRB) Section ..... 126

Table 69 Indicators on MRB Panel .................................... 128

Table 70 Buttons on MRB Module..................................... 129

Table 71 Topics in Voice Transcoder Card (VTCD) Section.... 132

Table 72 Indicators on MRB Panel .................................... 134

Table 73 Buttons on VTCD Module ................................... 135

Table 74 Topics in IP Packet Switching Network Board (PSN4V/PSN8V) Section .................................................. 137

Table 75 Indicators on the PSN4V/PSN8V Panel ................. 139

Table 76 Buttons on the PSN4V/PSN8V Module .................. 140

Table 77 Topics in 2.5G Line Interface Board (GLIQV) Section................................................................................... 142

Table 78 GLIQV Panel Indicators...................................... 144

Table 79 Buttons on the GLIQV Module............................. 146

Table 80 Topics in Digital Trunk Board (DTB) Section.......... 147

Table 81 Indicators on DTB Panel..................................... 149

Table 82 Button on DTB Module....................................... 151

Table 83 Connection Mode of X9-X16 Jumpers................... 153

Table 84 Topics in Digital Trunk Board with EC Function (DTEC) Section ......................................................................... 155

Table 85 Indicators on DTEC Panel................................... 157

Table 86 Button on DTB Module....................................... 159

Table 87 Connection Mode of X9-X16 Jumpers................... 161

Table 88 Topics in Control Plane Interconnection Board (CHUB) Section ......................................................................... 163

Table 89 Indicators on CHUB Module ................................ 165

Table 90 Buttons on CHUB Module ................................... 166

Table 91 Topics in TDM Switch Network Board (TSNB) Section................................................................................... 169

Table 92 Indicators on TSNB Panel................................... 171

Table 93 Buttons on TSNB Module ................................... 172

Table 94 Topics in Enhanced TDM Switch Network Board (ETSN) Section ......................................................................... 174

Table 95 Indicators on ETSN Panel ................................... 176



Table 96 Buttons on ETSN Module.................................... 177

Table 97 Topics in Advanced TDM Switch Network Board (STSN) Section ......................................................................... 179

Table 98 Indicators on STSN Panel................................... 181

Table 99 Buttons on STSN Module ................................... 182

Table 100 Topics in TDM Fiber Interface (TFI) Section......... 184

Table 101 Indicators on TFI Panel .................................... 185

Table 102 Buttons on TFI Module..................................... 187

Table 103 Topics in SONET Digital Trunk Board (SDTB) Section................................................................................... 188

Table 104 Indicators on SDTB Panel ................................. 190

Table 105 Buttons on SDTB Module.................................. 191

Table 106 Topics in Power Distribution Board (PWRD) Section................................................................................... 196

Table 107 Indicators on the PWRD Board .......................... 197

Table 108 Topics in Chapter 4 .......................................... 201

Table 109 Topics in Chapter 5 ......................................... 205

Table 110 -48V Power Cable ........................................... 212

Table 111 Power Cable from Busbar to Shelf Filter ............. 213

Table 112 Power Cable from Shelf Filter to Backplane ......... 213

Table 113 Fan Shelf Power Cable ..................................... 214



Table 116 Protective Grounding Transit Cable.................... 217

Table 117 Protective Grounding Tandem Cable .................. 218

Table 118 Topics in Chapter 5 ......................................... 223

Table 119 Corresponding Connection Relation.................... 224

Table 120 Technical Indices of Environment Monitoring Transit Cable............................................................................ 225

Table 121 Technical Indices of the Hygrothermal Sensor ..... 226

Table 122 Technical Indices of the Smoke Sensor .............. 227

Table 123 Technical Indices of the Infrared Sensor............. 228

Table 124 Technical Indices of the Access Control Sensor.... 229

Table 125 Technical Indices of -48V Power Cable ............... 230

Table 126 Technical Indices of Cables between Cabinet Protective Ground and Equipment Room Ground ................. 230

Table 127 Corresponding Relationship between Pins of Port A and Core Wires of End B1 ................................................ 232

Tables


Table 128 Corresponding Relation between the Pins at the End A and the Cores at the End B2.......................................... 233

Table 129 Corresponding Relation between the Pins at the End A and the Cores at the End B ........................................... 235




Table 133 X8 Configuration Principle ................................ 247

Table 134 Connection Relation of Both Ends ...................... 248


Index

Active/standby...60, 70, 71, 82, 90, 101, 108, 116, 123, 128, 135, 139, 145, 150, 158, 165, 172, 177, 182, 186, 191

Alarm Alarm box .................... 201 current alarm................ 203

automatic speed adjustment.14 Backplane6, 11, 12, 15, 17, 19,

20, 22, 24, 25, 26, 27, 30, 31, 32, 33, 38, 39, 40, 41, 42, 43, 45, 83, 105, 125, 146, 168, 173, 174, 178, 179, 183, 184, 194, 200, 212, 213, 251, 252

Clock running mode catch .............................60 free .................... 3, 61, 257 trace .............................60

conference call....... 31, 38, 130 Congestion....................... 252 Control plane24, 25, 30, 37, 41,

91, 93, 94, 102, 103, 104, 112, 166, 168, 173, 178, 183, 208

DIP Switch .. 11, 15, 18, 20, 21, 54, 55, 56, 73, 82, 92, 102, 108, 109, 114, 117, 123, 126, 129, 135, 137, 140, 146, 151, 159, 163, 167, 173, 174, 178, 179, 183, 187, 188, 192, 196, 197, 198

Equipment commissioning process Handover ..................... 255

Filtering.............................17 FTP ............208, 209, 248, 255 Grounding..... 46, 63, 205, 215,

216, 217, 218 Instance ...................... 23, 40 jumper ..54, 55, 56, 59, 62, 63,

73, 82, 92, 102, 117, 123, 129, 135, 140, 146, 151, 159, 167, 173, 178, 183, 187, 192, 197, 198, 246

link ....113, 124, 141, 147, 153, 155, 161, 195, 256

Link

signaling link ................ 113 M3UA................................ 86 MAC address .................... 256 MAC configuration... 93, 94, 95,

105 mapping........ 30, 37, 194, 195 matching impedance ... 62, 151,

159 MP......... 73, 74, 119, 130, 187 MTP31, 38, 106, 112, 113, 119,

256 Network cable

Ethernet cable ...........6, 245 Office

Office number...... 18, 20, 21 Office configuration ........28, 29 PCM...111, 130, 131, 153, 161,

173, 178, 183, 237, 239 Phase

Phase-locked .............66, 67 Phase-locking ............... 194

Power consumption...............9 Power failure.................... 199 Power on ......................70, 81 Power supply ................... 199 Probe.............................. 226 RACK-ID.......................20, 21 rear boards 15, 16, 96, 98, 102,

167, 206, 207 Sensor

Access control sensor ... 200, 224, 228, 229

humidity sensor ............ 200 Infrared sensor223, 227, 228 Smoke sensor 200, 223, 224,

226, 227 Server

OMC server .................. 202 Shelf

Cabling shelf ....................6 Control shelf....6, 11, 15, 18,

19, 20, 22, 23, 24, 26, 41, 93, 208

Fan shelf4, 8, 11, 14, 15, 47, 209, 210, 213, 214, 215, 217

Service shelf 4, 6, 11, 15, 16, 17, 18, 20, 47, 212

SHELF-ID .....................20, 21



Signal flow 125, 206, 207, 209, 210

Signaling

No.7 signaling.106, 112, 113 switchover ................... 66, 74

sjzl20080194-zxwn mgw media gateway hardware description

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