smt and its application in software verification (part ii)

93
SMT and Its Application in Software Verification (Part II) Yu-Fang Chen IIS, Academia Sinica Based on the slides of Barrett, Sanjit, Kroening , Rummer, Sinha, Jhala, and Majumdar, McMillan

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SMT and Its Application in Software Verification (Part II). Yu-Fang Chen IIS, Academia Sinica Based on the slides of Barrett, Sanjit , Kroening , Rummer , Sinha , Jhala , and Majumdar , McMillan. L=0. [L!=0]. do{ lock(); old = new; if(*){ unlock(); new++; } - PowerPoint PPT Presentation

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Page 1: SMT and Its Application in  Software Verification (Part II)

SMT and Its Application in Software Verification (Part II)

Yu-Fang ChenIIS, Academia Sinica

Based on the slides of Barrett, Sanjit, Kroening , Rummer, Sinha, Jhala, and Majumdar, McMillan

Page 2: SMT and Its Application in  Software Verification (Part II)

Lazy abstraction -- an example

do{ lock(); old = new; if(*){ unlock(); new++; }} while (new != old);

program fragment

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

Page 3: SMT and Its Application in  Software Verification (Part II)

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0T

Page 4: SMT and Its Application in  Software Verification (Part II)

1

L=0

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0T

Compute Post (T, L=0)= T[L/L’] ÆL=0[L/L’] = (L=0)Make Abstraction (L=0) T Pass

Replace all free occurrences of L in the formula with L’

Page 5: SMT and Its Application in  Software Verification (Part II)

1

L=0

T2

[L!=0]

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0T

Compute Post (T, [L!=0])= T Æ(L!=0) = (L!=0)ERROR state reached!

Page 6: SMT and Its Application in  Software Verification (Part II)

1

L=0

T2

[L!=0]

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0T

Compute Post (T, [L!=0])= T Æ(L!=0) = (L!=0)ERROR state reached!

T

T L=0L=0 L!=0[L!=0]

Page 7: SMT and Its Application in  Software Verification (Part II)

1

L=0

T2

[L!=0]

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0T

Compute Post (T, [L!=0])= T Æ(L!=0) = (L!=0)ERROR state reached!

T

T L=0L=0 L!=0[L!=0]

L!=0 WPre(L!=0, [L!=0]) = (L!=0)

Page 8: SMT and Its Application in  Software Verification (Part II)

1

L=0

T2

[L!=0]

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0T

Compute Post (T, [L!=0])= T Æ(L!=0) = (L!=0)ERROR state reached!

L=0

T L=0L=0 L!=0[L!=0]

L!=0 WPre(L!=0, [L!=0]) = (L!=0)

Compute Craig Interpolant: (L=0)1. (L=0) (L=0)2. (L=0) Æ (L=0) is UNSAT3. Use only share var. of (L=0) and (L!=0)

Page 9: SMT and Its Application in  Software Verification (Part II)

1

L=0

L=02

[L!=0]

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0T

Compute Post (T, [L!=0])= T Æ(L!=0) = (L!=0)ERROR state reached!

L=0

T L=0L=0 L!=0[L!=0]

L!=0 WPre(L!=0, [L!=0]) = (L!=0)

Compute Craig Interpolant: (L=0)1. (L=0) (L=0)2. (L=0) Æ (L=0) is UNSAT3. Use only share var. of (L=0) and (L!=0)

F

Page 10: SMT and Its Application in  Software Verification (Part II)

3

L=1;old=new

L!=0

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Compute Post (L=0, L=1)= (L=0)[L/L’] ÆL=1[L/L’]= (L’=0 ÆL=1)Compute Post (L’=0 ÆL=1, old=new) = (L’=0 ÆL=1)[old/old’] Æ old=new[old/old’]= L’=0 ÆL=1Æold=newMake Abstraction (L’=0 ÆL=1Æold=new) (L!=0) Pass(L’=0 ÆL=1Æold=new) (L=0) Not Passed

Page 11: SMT and Its Application in  Software Verification (Part II)

4

L=0; new++

L=0

3

L=1;old=new

L!=0

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Compute Post (L!=0, L=0)= (L!=0)[L/L’] ÆL=0[L/L’]= (L’!=0 ÆL=0)Compute Post (L’!=0 Æ(L=0), new=new+1) = (L’!=0 ÆL=0)[new/new’] Æ new=(new+1)[new/new’]= (L’!=0 ÆL=0 Æ new=new’+1)Make Abstraction (L’!=0 ÆL=0 Æ new=new’+1) (L!=0) Not Passed(L’!=0 ÆL=0 Æ new=new’+1) (L=0) Pass

Page 12: SMT and Its Application in  Software Verification (Part II)

5

[new!=old]

L=0

4

L=0; new++

L=0

3

L=1;old=new

L!=0

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Compute Post (L=0, [new!=old])= (L=0 Æ new!=old)Make Abstraction (L=0 Æ new!=old) (L!=0) Not Passed(L=0 Æ new!=old) (L=0) Pass

Page 13: SMT and Its Application in  Software Verification (Part II)

5

[new!=old]

L=0

4

L=0; new++

L=0

3

L=1;old=new

L!=0

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Covering: state 5 is subsumed bystate 1.L=1 L=1 Pass

Page 14: SMT and Its Application in  Software Verification (Part II)

L!=0

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0

L=0

7

[new==old]

L=0

T

Compute Post (L=0, [new==old])= (L=0 Æ new==old)Make Abstraction (L=0 Æ new!=old) (L!=0) Not Passed(L=0 Æ new!=old) (L=0) Pass

Page 15: SMT and Its Application in  Software Verification (Part II)

L!=0

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0

L=0

7

[new==old]

L=0

T

No Actions

8

L!=0

Page 16: SMT and Its Application in  Software Verification (Part II)

L!=0

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0

L=0

7

[new==old]

L=0

T

8

L!=0

9L!=0

[new==old]

Compute Post (L!=0, [new==old])= (L!=0 Æ new==old)Make Abstraction (L!=0 Æ new==old) (L!=0) Pass(L!=0 Æ new==old) (L=0) Not Passed

Page 17: SMT and Its Application in  Software Verification (Part II)

L!=0

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0

L=0

7

[new==old]

L=0

T

8

L!=0

9L!=0

[new==old]

Compute Post (L!=0, [new!=old])= (L!=0 Æ new!=old)Make Abstraction (L!=0 Æ new!=old) (L!=0) Pass(L!=0 Æ new!=old) (L=0) Not Passed

10

[new!=old]

L!=0

Page 18: SMT and Its Application in  Software Verification (Part II)

L!=0

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0

L=0

7

[new==old]

L=0

T

8

L!=0

9L!=0

[new==old]

Compute Post (L!=0, [L!=0])= (L!=0 Æ L!0)

ERROR state reached!

10

[new!=old]

L!=011

[L!=0]

Page 19: SMT and Its Application in  Software Verification (Part II)

L!=0

Unwinding the CFGL=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0

L=0

7

[new==old]

L=0

T

8

L!=0

9L!=0

[new==old]10

[new!=old]

L!=011

[L!=0]

L’=0 Æ L=1Æ

old=new

L=0

T L=0L=0

L=1old=new

L!=0

L!=0

L!=0

[new!=old] L!=0 Æ old!=new

L!=0

L!=0[L!=0]

Page 20: SMT and Its Application in  Software Verification (Part II)

L!=0

Unwinding the CFGL=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0

L=0

7

[new==old]

L=0

T

8

L!=0

9L!=0

[new==old]10

[new!=old]

L!=011

[L!=0]

L’=0 Æ L=1Æ

old=new

L=0

T L=0L=0

L=1old=new

L!=0

L!=0

L!=0

[new!=old] L!=0 Æ old!=new

L!=0

L!=0[L!=0]

L!=0L!=0 Æ

old!=new

Page 21: SMT and Its Application in  Software Verification (Part II)

L!=0

Unwinding the CFGL=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0

L=0

7

[new==old]

L=0

T

8

L!=0

9L!=0

[new==old]10

[new!=old]

L!=011

[L!=0]

L’=0 Æ L=1Æ

old=new

L=0

T L=0L=0

L=1old=new

L!=0

L!=0

L!=0

[new!=old] L!=0 Æ old!=new

L!=0

L!=0[L!=0]

L!=0L!=0 Æ

old!=newL!=0 Æ old!=new

L!=0 Æ old!=new

Page 22: SMT and Its Application in  Software Verification (Part II)

L!=0

Unwinding the CFGL=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0

L=0

7

[new==old]

L=0

T

8

L!=0

9L!=0

[new==old]10

[new!=old]

L!=011

[L!=0]

L’=0 Æ L=1Æ

old=new

L=0

T L=0L=0

L=1old=new

L!=0

L!=0

L!=0

[new!=old] L!=0 Æ old!=new

L!=0

L!=0[L!=0]

L!=0L!=0 Æ old!=new

L!=0 Æ old!=new

L!=0 Æ old!=new

Page 23: SMT and Its Application in  Software Verification (Part II)

L!=0 Æ old =new

Unwinding the CFGL=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0

L=0

7

[new==old]

L=0

T

8

L!=0

9L!=0

[new==old]10

[new!=old]

L!=011

[L!=0]

L’=0 Æ L=1Æ

old=new

L=0

T L=0L=0

L=1old=new

L!=0 Æ old=new

L!=0

L!=0

[new!=old] L!=0 Æ old!=new

L!=0

L!=0[L!=0]

L!=0L!=0 Æ old!=new

L!=0 Æ old!=new

L!=0 Æ old!=new

Page 24: SMT and Its Application in  Software Verification (Part II)

L!=0 Æ old =new

Unwinding the CFGL=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0

L=0

7

[new==old]

L=0

T

8

L!=0

9L!=0

[new==old]10

[new!=old]

L!=011

[L!=0]

L’=0 Æ L=1Æ

old=new

L=0

T L=0L=0

L=1old=new

L!=0 Æ old=new

L!=0

L!=0

[new!=old] L!=0 Æ old!=new

L!=0

L!=0[L!=0]

L!=0L!=0 Æ old!=new

L!=0 Æ old!=new

L!=0 Æ old!=new

Remove all of its children

Page 25: SMT and Its Application in  Software Verification (Part II)

3

L=1;old=new

L!=0 Æ old =new

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Page 26: SMT and Its Application in  Software Verification (Part II)

4

L=0; new++

L=0 Æ old !=new

3

L=1;old=new

L!=0 Æ old =new

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Compute Post (L!=0 Æ old =new, L=0)= (L!=0 Æ old=new)[L/L’] ÆL=0[L/L’]= (L’!=0 Æ old=new ÆL=0)Compute Post (L’!=0 Æ old=new Æ(L=0), new=new+1) = (L’!=0 Æ old=new ÆL=0)[new/new’] Æ new=(new+1)[new/new’]= (L’!=0 Æ old=new’ ÆL=0 Æ new=new’+1)Make Abstraction (L’!=0 Æ old=new’ ÆL=0 Æ new=new’+1) (L!=0) Not Passed(L’!=0 Æ old=new’ ÆL=0 Æ new=new’+1) (L=0) Pass(L’!=0 Æ old=new’ ÆL=0 Æ new=new’+1) (old=new) Not Passed(L’!=0 Æ old=new’ ÆL=0 Æ new=new’+1) (old!=new) Pass

Page 27: SMT and Its Application in  Software Verification (Part II)

5

[new!=old]

L=0 Æ old!=new

4

L=0; new++

L=0 Æ old =new

3

L=1;old=new

L!=0 Æ old=new

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Compute Post (L=0 Æ old!=new, [new!=old])= (L=0 Æ new!=old)Make Abstraction (L=0 Æ new!=old) (L!=0) Not Passed(L=0 Æ new!=old) (L=0) Pass(L=0 Æ new!=old) (old=new) Not Passed(L=0 Æ new!=old) (old!=new) Pass

Page 28: SMT and Its Application in  Software Verification (Part II)

5

[new!=old]

L=0 Æ old!=new

4

L=0; new++

L=0 Æ old =new

3

L=1;old=new

L!=0 Æ old=new

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Covering: state 5 is subsumed bystate 1.L=1 Æ old!=new L=1 Pass

Page 29: SMT and Its Application in  Software Verification (Part II)

L!=0 Æ old=new

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0 Æ old!=new

L=0 Æ old =new

7

[new==old]

L=0 Æold=new

T

Compute Post (L=0, [new==old])= (L=0 Æ new=old)Make Abstraction (L=0 Æ new=old) (L!=0) Not Passed(L=0 Æ new=old) (L=0) Pass(L=0 Æ new=old) (new!=old) Not Passed(L=0 Æ new=old) (new=old) Pass

Page 30: SMT and Its Application in  Software Verification (Part II)

L!=0 Æ old=new

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0 Æ old!=new

L=0 Æ old =new

7

[new==old]

L=0 Æ old=new

T

No Actions

8

L!=0 Æ old=new

Page 31: SMT and Its Application in  Software Verification (Part II)

L!=0 Æ old=new

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0 Æ old!=new

L=0 Æ old =new

7

[new==old]

L=0 Æ old=new

T

8

L!=0 Æ old=new

9 L!=0 Æ old=new

[new==old]

Compute Post (L!=0Ænew=old, [new==old])= (L!=0 Æ new=old)Make Abstraction (L!=0 Æ new=old) (L!=0) Pass(L!=0 Æ new=old) (L=0) Not Passed(L!=0 Æ new=old) (old=new) Pass(L!=0 Æ new=old) (old!=new) Not Passed

Page 32: SMT and Its Application in  Software Verification (Part II)

L!=0 Æ old=new

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

L=0 Æ old!=new

L=0 Æ old =new

7

[new==old]

L=0 Æ old=new

T

8

L!=0 Æ old=new

9 L!=0 Æ old=new

[new==old]

Compute Post (L!=0Ænew=old, [new!=old])= (L!=0 Æ new=old Æ new!=old )= false

10

[new!=old]

F

Page 33: SMT and Its Application in  Software Verification (Part II)

33

Another Approach: The IMPACT method

Kenneth L. McMillan: Lazy Abstraction with Interpolants. CAV 2006: 123-136

Page 34: SMT and Its Application in  Software Verification (Part II)

Interpolation Lemma 

 

   

   

 

(Craig,57)

Page 35: SMT and Its Application in  Software Verification (Part II)

Interpolation Lemma• Notation: L() is the set of FO formulas over the symbols of  

   

   

 

(Craig,57)

Page 36: SMT and Its Application in  Software Verification (Part II)

Interpolation Lemma• Notation: L() is the set of FO formulas over the symbols of • If A Ù B = false, there exists an interpolant A' for (A,B) such that:

A Þ A'A' Ù B = false

A' 2 L(A) Å L(B) 

 

   

 

(Craig,57)

Page 37: SMT and Its Application in  Software Verification (Part II)

Interpolation Lemma• Notation: L() is the set of FO formulas over the symbols of • If A Ù B = false, there exists an interpolant A' for (A,B) such that:

A Þ A'A' Ù B = false

A' 2 L(A) Å L(B)• Example:

– A = p Ù q, B = Øq Ù r, A' = q

   

 

(Craig,57)

Page 38: SMT and Its Application in  Software Verification (Part II)

Interpolation Lemma• Notation: L() is the set of FO formulas over the symbols of • If A Ù B = false, there exists an interpolant A' for (A,B) such that:

A Þ A'A' Ù B = false

A' 2 L(A) Å L(B)• Example:

– A = p Ù q, B = Øq Ù r, A' = q

• Interpolants from proofs– in certain quantifier-free theories, we can obtain an interpolant for a pair A,B from a refutation in

linear time. [McMillan 05]– in particular, we can have linear arithmetic,uninterpreted functions, and restricted use of arrays

(Craig,57)

Page 39: SMT and Its Application in  Software Verification (Part II)

Interpolants for sequences   

       

Page 40: SMT and Its Application in  Software Verification (Part II)

Interpolants for sequences• Let A1...An be a sequence of formulas 

       

Page 41: SMT and Its Application in  Software Verification (Part II)

Interpolants for sequences• Let A1...An be a sequence of formulas• A sequence A’0...A’n is an interpolant for A1...An when

       

Page 42: SMT and Its Application in  Software Verification (Part II)

Interpolants for sequences• Let A1...An be a sequence of formulas• A sequence A’0...A’n is an interpolant for A1...An when

– A’0 = True     

Page 43: SMT and Its Application in  Software Verification (Part II)

Interpolants for sequences• Let A1...An be a sequence of formulas• A sequence A’0...A’n is an interpolant for A1...An when

– A’0 = True– A’i-1 Æ Ai ) A’i, for i = 1..n   

Page 44: SMT and Its Application in  Software Verification (Part II)

Interpolants for sequences• Let A1...An be a sequence of formulas• A sequence A’0...A’n is an interpolant for A1...An when

– A’0 = True– A’i-1 Æ Ai ) A’i, for i = 1..n– An = False 

Page 45: SMT and Its Application in  Software Verification (Part II)

Interpolants for sequences• Let A1...An be a sequence of formulas• A sequence A’0...A’n is an interpolant for A1...An when

– A’0 = True– A’i-1 Æ Ai ) A’i, for i = 1..n– An = False– and finally, A’i 2 L (A1...Ai) Å L(Ai+1...An)

Page 46: SMT and Its Application in  Software Verification (Part II)

Interpolants for sequences• Let A1...An be a sequence of formulas• A sequence A’0...A’n is an interpolant for A1...An when

– A’0 = True– A’i-1 Æ Ai ) A’i, for i = 1..n– An = False– and finally, A’i 2 L (A1...Ai) Å L(Ai+1...An)

A1 A2 A3 Ak...

Page 47: SMT and Its Application in  Software Verification (Part II)

Interpolants for sequences• Let A1...An be a sequence of formulas• A sequence A’0...A’n is an interpolant for A1...An when

– A’0 = True– A’i-1 Æ Ai ) A’i, for i = 1..n– An = False– and finally, A’i 2 L (A1...Ai) Å L(Ai+1...An)

A1 A2 A3 Ak...

A'1 A'2 A'3 A'k-1...True False) ) ) )

Page 48: SMT and Its Application in  Software Verification (Part II)

Interpolants for sequences• Let A1...An be a sequence of formulas• A sequence A’0...A’n is an interpolant for A1...An when

– A’0 = True– A’i-1 Æ Ai ) A’i, for i = 1..n– An = False– and finally, A’i 2 L (A1...Ai) Å L(Ai+1...An)

A1 A2 A3 Ak...

A'1 A'2 A'3 A'k-1...True False) ) ) )

In other words, the interpolant is a structuredrefutation of A1...An

Page 49: SMT and Its Application in  Software Verification (Part II)

Interpolants as Floyd-Hoare proofs

Page 50: SMT and Its Application in  Software Verification (Part II)

Interpolants as Floyd-Hoare proofsx=y;

y++;

[x=y]

Page 51: SMT and Its Application in  Software Verification (Part II)

Interpolants as Floyd-Hoare proofsx=y;

y++;

[x=y]

x1= y0

y1=y0+1

x1=y1

Page 52: SMT and Its Application in  Software Verification (Part II)

Interpolants as Floyd-Hoare proofs

False

x1=y0

True

y1>x1

x=y;

y++;

[x=y]

x1= y0

y1=y0+1

x1=y1

Page 53: SMT and Its Application in  Software Verification (Part II)

Interpolants as Floyd-Hoare proofs

False

x1=y0

True

y1>x1

))

)

1. Each formula implies the nextx=y;

y++;

[x=y]

x1= y0

y1=y0+1

x1=y1

Page 54: SMT and Its Application in  Software Verification (Part II)

Interpolants as Floyd-Hoare proofs

False

x1=y0

True

y1>x1

))

)

1. Each formula implies the next

2. Each is over common symbols of prefix and suffix

x=y;

y++;

[x=y]

x1= y0

y1=y0+1

x1=y1

Page 55: SMT and Its Application in  Software Verification (Part II)

Interpolants as Floyd-Hoare proofs

False

x1=y0

True

y1>x1

))

)

1. Each formula implies the next

2. Each is over common symbols of prefix and suffix

3. Begins with true, ends with false

x=y;

y++;

[x=y]

x1= y0

y1=y0+1

x1=y1

Page 56: SMT and Its Application in  Software Verification (Part II)

Interpolants as Floyd-Hoare proofs

False

x1=y0

True

y1>x1

))

)

1. Each formula implies the next

2. Each is over common symbols of prefix and suffix

3. Begins with true, ends with false

Path refinement procedure

SSAsequence Prover

Interpolation

PathRefinement

proof structuredproof

x=y;

y++;

[x=y]

x1= y0

y1=y0+1

x1=y1

Page 57: SMT and Its Application in  Software Verification (Part II)

Lazy abstraction -- an example

do{ lock(); old = new; if(*){ unlock; new++; }} while (new != old);

program fragment

Page 58: SMT and Its Application in  Software Verification (Part II)

Lazy abstraction -- an example

do{ lock(); old = new; if(*){ unlock; new++; }} while (new != old);

program fragment

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

Page 59: SMT and Its Application in  Software Verification (Part II)

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

Page 60: SMT and Its Application in  Software Verification (Part II)

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0T

Page 61: SMT and Its Application in  Software Verification (Part II)

1

L=0

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0T

Page 62: SMT and Its Application in  Software Verification (Part II)

1

L=0

T2

[L!=0]T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0T

Interpolant for (L0 =0) Æ(L0!=0) =?

Page 63: SMT and Its Application in  Software Verification (Part II)

1

L=0

T2

[L!=0]T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0T

F L=0

Label error state with false, by refining labels on path

T L0=0 FInterpolant for (L0 =0) Æ(L0!=0) =?

Page 64: SMT and Its Application in  Software Verification (Part II)

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Page 65: SMT and Its Application in  Software Verification (Part II)

3

L=1;old=new

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Page 66: SMT and Its Application in  Software Verification (Part II)

4

L=0; new++

T

3

L=1;old=new

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Page 67: SMT and Its Application in  Software Verification (Part II)

5

[new!=old]

T

4

L=0; new++

T

3

L=1;old=new

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Page 68: SMT and Its Application in  Software Verification (Part II)

6[L!=0]T

5

[new!=old]

T

4

L=0; new++

T

3

L=1;old=new

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Interpolant for (L0 =0) Æ(L1=1Æold0=new0) Æ(L2=0Ænew1=new0+1) Æ(new1!=old0) Æ(L2!=0) =?

Page 69: SMT and Its Application in  Software Verification (Part II)

6[L!=0]T

5

[new!=old]

T

4

L=0; new++

T

3

L=1;old=new

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

T

Interpolant for (L0 =0) Æ(L1=1Æold0=new0) Æ(L2=0Ænew1=new0+1) Æ(new1!=old0) Æ(L2!=0) =?T L2 =0T T L2 =0 F

Page 70: SMT and Its Application in  Software Verification (Part II)

6[L!=0]T

5

[new!=old]

T

4

L=0; new++

T

3

L=1;old=new

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

F L=0

L=0

T

Interpolant for (L0 =0) Æ(L1=1Æold0=new0) Æ(L2=0Ænew1=new0+1) Æ(new1!=old0) Æ(L2!=0) =?T L2 =0T T L2 =0 F

Comes from L=0 Æ T

Page 71: SMT and Its Application in  Software Verification (Part II)

6[L!=0]T

5

[new!=old]

T

4

L=0; new++

T

3

L=1;old=new

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

L=0[L!=0]F L=0

F L=0

L=0

T

Covering: state 5 is subsumed bystate 1.

Page 72: SMT and Its Application in  Software Verification (Part II)

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

6[L!=0]F L=0

L=0

T

Page 73: SMT and Its Application in  Software Verification (Part II)

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

6[L!=0]F L=0

L=0

7

[new==old]

T

T

Page 74: SMT and Its Application in  Software Verification (Part II)

T

8

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

6[L!=0]F L=0

L=0

7

[new==old]

T

T

Page 75: SMT and Its Application in  Software Verification (Part II)

T

8

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

6[L!=0]F L=0

L=0

7

[new==old]

T

T

9T

Page 76: SMT and Its Application in  Software Verification (Part II)

T

10

[new!=old]

T

8

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

6[L!=0]F L=0

L=0

7

[new==old]

T

T

9T

Page 77: SMT and Its Application in  Software Verification (Part II)

T

11[L!=0]

T

10

[new!=old]

T

8

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

6[L!=0]F L=0

L=0

7

[new==old]

T

T

9T

Page 78: SMT and Its Application in  Software Verification (Part II)

T

11[L!=0]

T

10

[new!=old]

T

8

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

6[L!=0]F L=0

L=0

7

[new==old]

T

old=new

F

old=new

F

T

9T

Page 79: SMT and Its Application in  Software Verification (Part II)

T

11[L!=0]

T

10

[new!=old]

T

8

T

Unwinding the CFG

L=0

L=1; old=new

[L!=0]

L=0; new++

[new==old]

[new!=old]

control-flow graph

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

6[L!=0]F L=0

L=0

7

[new==old]

T

old=new

F

old=new

F

T

Another cover. Unwinding is now complete.

9T

Page 80: SMT and Its Application in  Software Verification (Part II)

Covering step• If y(x) ) y(y)...

– add covering arc x B y– remove all z B w for w descendant of y

Page 81: SMT and Its Application in  Software Verification (Part II)

Covering step• If y(x) ) y(y)...

– add covering arc x B y– remove all z B w for w descendant of y

x· y x=y

Page 82: SMT and Its Application in  Software Verification (Part II)

Covering step• If y(y) ) y(x)...

– add covering arc x B y– remove all w B z for w descendant of y

x· y x=y

X

Page 83: SMT and Its Application in  Software Verification (Part II)

Covering step

x· y x=y

X

We restrict covers to be descending in a suitable total order on vertices.This prevents covering from diverging.

• If y(y) ) y(x)...– add covering arc x B y– remove all w B z for w descendant of y

Page 84: SMT and Its Application in  Software Verification (Part II)

Refinement step• Label an error vertex False by refining the path to that vertex with

an interpolant for that path.• By refining with interpolants, we avoid predicate image

computation.T

T

TT

T

T

T

x = 0

[x=y] [x¹y]

y++

[y=0]

y=2

Page 85: SMT and Its Application in  Software Verification (Part II)

Refinement step• Label an error vertex False by refining the path to that vertex with

an interpolant for that path.• By refining with interpolants, we avoid predicate image

computation.T

T

TT

T

T

T

x = 0

[x=y] [x¹y]

y++

[y=0]

y=2

x=0

y=0

y¹0

F

X

Page 86: SMT and Its Application in  Software Verification (Part II)

Refinement step• Label an error vertex False by refining the path to that vertex with

an interpolant for that path.• By refining with interpolants, we avoid predicate image

computation.T

T

TT

T

T

T

x = 0

[x=y] [x¹y]

y++

[y=0]

y=2

x=0

y=0

y¹0

F

X

Refinement may remove covers

Page 87: SMT and Its Application in  Software Verification (Part II)

Forced cover• Try to refine a sub-path to force a cover

– show that path from nearest common ancestor of x,y proves y(x) at y

T

T

TT

T

T

T

x = 0

[x=y] [x¹y]

y++

[y=0]

y=2

x=0

y=0

y¹0

F

Forced cover allow us to efficiently handle nested control structure

Page 88: SMT and Its Application in  Software Verification (Part II)

Forced cover• Try to refine a sub-path to force a cover

– show that path from nearest common ancestor of x,y proves y(x) at y

T

T

TT

T

T

T

x = 0

[x=y] [x¹y]

y++

[y=0]

y=2

x=0

y=0

y¹0

F

refine this path

y¹0

Forced cover allow us to efficiently handle nested control structure

Page 89: SMT and Its Application in  Software Verification (Part II)

Safe and complete• An unwinding is

– safe if every error vertex is labeled False– complete if every nonterminal leaf is covered

T

10[L!=0]

T

9

[new!=old]

T

8

T

0

12

3

4

5

L=0

L=1;old=new

[L!=0]

L=0; new++

[new!=old]

F L=0

6[L!=0]F L=0

L=0

7

[new==old]

T

old=new

F

old=new

F

T

... ...

Theorem: A CFG with a safe complete unwinding is safe.

9T

Page 90: SMT and Its Application in  Software Verification (Part II)

Unwinding steps

• Three basic operations:– Expand a nonterminal leaf– Cover: add a covering arc– Refine: strengthen labels along a path so error

vertex labeled False

Page 91: SMT and Its Application in  Software Verification (Part II)

Overall algorithm

1. Do as much covering as possible2. If a leaf can't be covered, try forced covering3. If the leaf still can't be covered, expand it4. Label all error states False by refining with an

interpolant5. Continue until unwinding is safe and complete

Page 92: SMT and Its Application in  Software Verification (Part II)

92

Interpolant Seqeunce in PrincessInterpolant for (L0 =0) Æ(L1=1Æold0=new0) Æ(L2=0Ænew1=new0+1) Æ(new1!=old0) Æ(L2!=0)

\functions { int L0, L1, old0, new0, L2, new1;}\problem { \part[p1] (L0 =0) & \part[p2] (L1 =1 & old0=new0) & \part[p3] (L2=0 & new1 =new0+1) & \part[p4] (new1 != old0) & \part[p5] (L2!=0) -> false}

\interpolant {p1; p2, p3, p4, p5}\interpolant {p1, p2; p3, p4, p5}\interpolant {p1, p2, p3; p4, p5}\interpolant {p1, p2, p3, p4; p5}

Page 93: SMT and Its Application in  Software Verification (Part II)

93

Homework

• Run the two versions of verification algorithms on the following control flow graph, using Princess for computing interpolants

L=0;Cnt=0

L=1;old=new

[L=0]

[new==old]

[new!=old]

control-flow graph

[Cnt>3]

[Cnt·3]

L=0;new++