speedes synchronous parallel environment for emulation and discrete-event simulation simulation...

SPEEDESSynchronous Parallel Environment for Emulation and Discrete-Event Simulation

Simulation Sciences Division

High Performance Computing

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Overview of SPEEDES

• METRON Simulation Sciences product since 1996

• Powerful optimistic-processing parallel processing engine◊ Simulation events are distributed over multiple processors

◊ Events assigned to a processor proceed optimistically (i.e. assuming that processing on other nodes won’t invalidate)

◊ When messages from one node invalidate processing on other nodes, incorrect processing is rolled back, invalid messages recalled, and are corrected

◊ Result – as long as enough processors are available, speed and complexity of simulation is not limited

– Processing overhead (typically 15%) associated with rollback/callback/reprocessing is generally not affected by number of processors

• Parallel-processing simulations mimic real-life, where most events happen independently in parallel

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SPEEDES Development and Use

• Developed, maintained, and distributed by METRON◊ Development funded by Joint National Integration Center (JNIC) and Air

Force Research Laboratory (AFRL)

◊ Metron supplies source code to qualified (U.S. only) users at no charge

◊ On-line documentation and change request system

• Primary users: ◊ JNIC: Missile Defense Wargaming and Analysis Resource (MDWAR)

◊ Air Force Research Lab: Joint Battlespace Infosphere Simulation (JBISim)

• Current Development Projects◊ JNIC: Multiple-simulation clusters (to add THAADS, Patriot, Airborne Laser,

Aegis, etc.)

◊ AFRL: Multiple parallel course-of-action simulation capability (Phase II SBIR)

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Key SPEEDES Developers

Ron Van IwaardenPhD, Applied Mathematics, University of ColoradoMS, Applied Mathematics, University of ColoradoBS, Mathematics, University of Colorado

SPEEDES developer for 8 yearsLead, SPEEDES development and documentationMDWAR wargame support at the JNIC

Gary BlankMS, Comp. Science, University of VirginiaBS, Applied Mathematics, Brown University

SPEEDES developer for 8 yearsLead, SPEEDES Multi-COA Enhancement projectSPEEDES enhancements for MDWARSPEEDES support of AFRL (DIEMS, GIEsim)SPEEDES FAAsim prototypeHLA RTI developerHLA Federations

Jacob BurckhardtBS, Computer Science, UC Berkeley

SPEEDES developer for 8 yearsLead, JSIMS sim engine IV&VSPEEDES enhancements for MDWARSPEEDES testing

SPEEDES Configuration Management

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SPEEDES Funding

-

500

1,000

1,500

2,000

2,500

1997-99

2000 2001 2002 2003 2004 2005

Northrop Grumman

AFRL

MDA (JNIC)

DMSO/ HPCMO

(thousands of dollars)

1.0 2.0 2.1 2.2Version

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Competition

• SPEEDES maturity and performance puts it at the head of the

pack

– Only optimistic parallel-processing engine receiving significant DoD

funding

• RAM Labs has “WARP IV” derivative, with no known users

– Two MDA Phase II SBIRs starting

• Georgia Tech Time Warp

– Used in simulation of communication networks

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The Future

• SPEEDES growth at the JNIC

– The Missile Defense program was severely chastised by the for it’s lack

of quality simulations by Defense Science Board

– MDWAR was held up as the sole example of success

• The future for MDA is Ballistic Missile Defense System (BMDS) sim

– Decision isn’t final, but it appears that MDWAR will be enhanced to

become the BMDS sim

– Expectation is that METRON will receive at least a moderate amount of

additional development work

• For AFRL, Phase II SBIR will lead to dramatic new simulation capability

– Northrop Grumman and Lockheed Martin are candidates for Phase III

sponsorship

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Conclusion

• SPEEDES is excellent choice for all parallel simulations

• Development on SPEEDES continues although at a slower pace

• Future is bright for BMDS simulation

– Should bring additional funding such as clustering or HLA capability

• Multiple course-of-action capability should make SPEEDES of interest

to more clients

• The JNIC and AFRL continue to provide stable and consistent funding

speedes synchronous parallel environment for emulation and discrete-event simulation simulation...

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