spiiplus pci-ddm4 hardware and setup guide 4.00

SPiiPlus PCI-DDM4 Multi-Axes Motion Controllers with

Digital Drive Interface

Hardware and Setup Guide

Document part no. TM-0DDM4-PCI Document revision no. 1.20

Document revision no. 1.20 (March 2002) Document part no. TM-0DDM4-PCI

COPYRIGHT Copyright © 2001 - 2002 ACS-Tech80 Ltd. Changes are periodically made to the information contained in this guide. The changes are published in release notes and will be incorporated into future revisions of this guide. No part of this guide may be reproduced in any form, without permission in writing from ACS-Tech80.

TRADEMARKS ACS-Tech80, PEG, SPii, and SPiiPlus are trademarks of ACS-Tech80 Ltd. JST is a trademark of JST Corp. Visual Basic and Windows are registered trademarks of Microsoft Corp. 3M is a registered trademark of 3M Corp. The names of actual companies and products mentioned herein may be the trademarks of their respective owners.

Website: http://www.acs-tech80.com/ E-mail: [email protected] [email protected]

ACS-Tech80 Inc. 7351 Kirkwood Lane North, Suite 130 Maple Grove, MN 55369 USA Tel: (1) (763) 493-4080 (800-545-2980 in USA) Fax: (1) (763) 493-4089

ACS-Tech80 BV Antonie van Leeuwenhoekstraat 18 3261 LT Oud-Beijerland THE NETHERLANDS Tel: (31) (186) 623518 Fax: (31) (186) 624462

ACS-Tech80 Ltd. Ramat Gabriel Industrial Park POB 5668 Migdal Ha'Emek, 10500 ISRAEL Tel: (972) (4) 6546440 Fax: (972) (4) 6546443

NOTICE Information deemed to be correct at time of publishing. ACS-Tech80 reserves the right to change specifications without notice. ACS-Tech80 is not responsible for incidental, consequential, or special damages of any kind in connection with this document.

Refer connection, installation, maintenance, adjustment, servicing, and

operation to qualified personnel.

http://www.acs-tech80.com/

mailto:[email protected]

mailto:[email protected]

RECENT CHANGES TO THIS GUIDE I

SPi iPlus PCI-DDM4 Hardware and Setup Guide - Document revision no. 1.20

RECENT CHANGES TO THIS GUIDE

Rev. Date Section Change ECR

1.10 Oct/01 Remove interrupts section which is fully contained in SPiiPlus ACSPL+ Programmer’s Guide

1.10 Oct/01 All Apply new template

1.10 Oct/01 5.1 5.2 Update drawing labels

1.10 Oct/01 4.1 Update main drawing

1.20 Jan/02 3.2 Update Specifications and add to a table 1382 1419

1.20 Jan/02 4.2 Update J11 External Power Supply Connector section 1382

1.20 Jan/02 4.3 Update J2 Encoder, Digital, and Analog I/O Connector section

1382

1.20 Jan/01 1 Integrate preface into Introduction chapter per new temp 1410

1.20 Jan/02 TABLE 4-4 Update table per product revisions 1382



1.20 Feb/02 4.2 Change connector # on PCB from J8 to J11

1.20 Feb/02 4.6 Change connector # on PCB from J6 to J8

1.20 Feb/02 4.7 New J6 Z-Axis P/D Drive or HSSI Connector on PCB

1.20 Feb/02 4.14 New Test Points section

1.20 Feb/02 4 Expand, revise, and edit user interface sections 1413

1.20 Feb/02 4.1 Update main drawing

1.20 Feb/02 6.3 Add MPU drawing for RS-232 connection 1413

1.20 Mar/02 7 Update and improve Control Loops chapter

CONTENTS I I I


CONTENTS

FIGURES VII

TABLES IX

1. INTRODUCTION 1-1

1.1. ORGANIZATION OF THIS GUIDE 1-2

1.2. RELATED SPIIPLUS DOCUMENTATION 1-2

1.3. RELATED SPIIPLUS TOOLS 1-3

1.4. CONVENTIONS USED IN THIS GUIDE 1-3

2. SAFETY AND EMC GUIDELINES 2-1

2.1. GENERAL SAFETY GUIDELINES 2-1

2.2. GENERAL WIRING AND ELECTROMAGNETIC COMPATIBILITY (EMC) GUIDELINES 2-2

3. FEATURES AND SPECIFICATIONS 3-1

3.1. FEATURES 3-1

3.2. SPECIFICATIONS 3-3

IV CONTENTS

SPiiPlus PCI-DDM4 Hardware and Setup Guide - Document revision no. 1.20

4. USER INTERFACE 4-1

4.1. MECHANICAL STRUCTURE 4-1

4.2. J11 EXTERNAL POWER SUPPLY CONNECTOR 4-3

4.3. J2 ENCODER, DIGITAL, AND ANALOG I/O CONNECTOR 4-4

4.4. J3 DRIVE INTERFACE CONNECTOR 4-7

4.5. J5 DIGITAL AND SPECIAL I/O CONNECTOR 4-10

4.6. J8 X, A, Y, AND B RAW SIGNAL LIMIT INPUTS OR A-AXIS ENCODER OUTPUT 4-11

4.7. J6 Z-AXIS P/D DRIVE OR HSSI CONNECTOR 4-12

4.8. J7 ADDITIONAL FUNCTIONS OUTPUT CONNECTOR (SPIIPLUS PCI-DDM4A ONLY) 4-13

4.9. J1 HSSI (HIGH-SPEED SYNCHRONOUS SERIAL INTERFACE) CONNECTORS 4-14

4.10. J4 HSSI AND DEDICATED OUTPUT CONNECTORS 4-16

4.11. J9 JTAG CONNECTOR 4-19

4.12. JP1 JUMPER 4-19

4.13. JP2 JUMPER 4-20

4.14. TEST POINTS 4-20

4.15. LED INDICATOR 4-20

5. DDM4-DR AND DDM4-PS INTERFACE 5-1

5.1. BRUSHLESS MOTOR CONNECTION 5-1

5.2. BRUSH MOTOR CONNECTION 5-2

6. COMMUNICATIONS 6-1

6.1. SIMULATOR 6-2

6.2. PCI BUS CONNECTION 6-3

6.3. SERIAL RS-232 COMMUNICATION 6-5

6.4. ETHERNET NETWORK COMMUNICATION 6-9

6.5. ETHERNET POINT-TO-POINT COMMUNICATION 6-12

CONTENTS V


7. CONTROL LOOPS 7-1

7.1. CONTROL LOOPS BLOCK DIAGRAMS 7-1

7.2. POSITION LOOP 7-6

7.3. VELOCITY LOOP 7-7

7.4. VELOCITY LOW PASS FILTER 7-7

7.5. VELOCITY LOOP PROPORTIONAL-INTEGRAL (PI) FILTER 7-9

7.6. VELOCITY LOOP NOTCH-FILTER 7-11

7.7. CURRENT COMMAND AND COMMUTATION 7-14

7.8. CURRENT LOOP 7-14

8. WARRANTY 8-1

INDEX 1

FIGURES VII


FIGURES

FIGURE 2-1 Cable Spacing......................................................................................................... 2-2 FIGURE 2-2 Shielded Cable........................................................................................................ 2-2 FIGURE 2-3 Improved Shielding ................................................................................................ 2-3 FIGURE 4-1 Mechanical Dimensions and Connector Placement ............................................... 4-2 FIGURE 4-2 Encoder Interface ................................................................................................... 4-6 FIGURE 4-3 Emergency Stop (ES) Input.................................................................................... 4-6 FIGURE 4-4 RS-422 Output Port Interface................................................................................. 4-7 FIGURE 4-5 RS-422 Input Interface ........................................................................................... 4-7 FIGURE 4-6 Drive Enable Output............................................................................................... 4-9 FIGURE 4-7 Drive Fault Input .................................................................................................... 4-9 FIGURE 4-8 FSTATUS Fault Input ............................................................................................ 4-9 FIGURE 4-9 Analog Inputs for Current Feedback ...................................................................... 4-9 FIGURE 4-10 Isolated Outputs 5 and 6..................................................................................... 4-11 FIGURE 4-11 HSSI Connection Diagram................................................................................. 4-17 FIGURE 4-12 Timing Sequence of HSSI Control Signal.......................................................... 4-18 FIGURE 4-13 Data Read/Write Operation ................................................................................ 4-18 FIGURE 4-14 HSSI Control Signal........................................................................................... 4-19 FIGURE 5-1 Brushless Motor Connection .................................................................................. 5-1 FIGURE 5-2 Brush Motor Connection ........................................................................................ 5-2 FIGURE 6-1 Communication Window for Simulator Connection............................................... 6-3 FIGURE 6-2 Communication Window for PCI Bus Connection ................................................. 6-4

VIII F IGURES


FIGURE 6-3 PC104+ with 133MHz Processor (SPiiPlus PCI-DDM4A default MPU)..............6-5 FIGURE 6-4 RS-232 RX/TX Connection....................................................................................6-6 FIGURE 6-5 Communication Window for Serial Connection .....................................................6-7 FIGURE 6-6 Communication Parameters.....................................................................................6-8 FIGURE 6-7 Configuration Parameters Changed, Save to Flash Warning .................................6-8 FIGURE 6-8 Network Settings Window for Windows 95, 98, NT, and 2000...........................6-10 FIGURE 6-9 Communication Window for Ethernet Network....................................................6-11 FIGURE 6-10 SPiiPlus MMI Communication Parameters Dialog Box ....................................6-12 FIGURE 6-11 Network Settings Window for Windows 95,98, NT, and 2000..........................6-14 FIGURE 6-12 TCP/IP Properties Window for Ethernet Point-to-Point ....................................6-15 FIGURE 6-13 Communication Window for Ethernet Point-to-Point .........................................6-16 FIGURE 7-1 SPiiPlus PCI-DDM4 Control Algorithm Block Diagram (Single Loop) ...............7-2 FIGURE 7-2 SPiiPlus PCI-DDM4 Control Algorithm Block Diagram (Dual Loop)..................7-3 FIGURE 7-3 Position Loop Block Diagram ................................................................................7-4 FIGURE 7-4 Velocity Low Pass Filter Block Diagram...............................................................7-4 FIGURE 7-5 Velocity PI Filter Block Diagram...........................................................................7-5 FIGURE 7-6 Velocity Notch Filter Block Diagram ....................................................................7-5 FIGURE 7-7 Current PI Filter Block Diagram ............................................................................7-5 FIGURE 7-8 Bode Plot of Velocity PI Filter ...............................................................................7-9

TABLES IX


TABLES

TABLE 1-1 Related SPiiPlus Documentation ............................................................................. 1-2 TABLE 1-2 Related SPiiPlus Tools............................................................................................. 1-3 TABLE 1-3 Conventions Used in this Guide .............................................................................. 1-3 TABLE 2-1 Topics Covered in Chapter 2 ................................................................................... 2-1 TABLE 3-1 Controller Specifications ......................................................................................... 3-3 TABLE 4-1 Topics Covered in Chapter 4 ................................................................................... 4-1 TABLE 4-2 Connector Signal Abbreviations .............................................................................. 4-3 TABLE 4-3 J11 External Power Supply Connector .................................................................... 4-4 TABLE 4-4 J2 Encoder, Digital, and Analog I/O Connector ...................................................... 4-5 TABLE 4-5 J3 Drive Interface Connector ................................................................................... 4-7 TABLE 4-6 J5 Digital and Special I/O Connector .................................................................... 4-10 TABLE 4-7 J8 X, A, Y, and B Raw Signal Limit Inputs or A-Axis Encoder Output ............... 4-11 TABLE 4-8 J6 Z-Axis P/D Drive or HSSI Output Connector................................................... 4-12 TABLE 4-9 J7 Additional Functions Output Connector ........................................................... 4-13 TABLE 4-10 HSSI Signal Description ...................................................................................... 4-14 TABLE 4-11 J1 (Top) HSSI Interface Connector (SPiiPlus PCI-DDM4A).............................. 4-14 TABLE 4-12 J1 (Bottom) HSSI Interface Connector (SPiiPlus PCI-DDM4A) ........................ 4-15 TABLE 4-13 J1 (Bottom) HSSI Interface Connector (SPiiPlus PCI-DDM4)........................... 4-15 TABLE 4-14 J4 Connector for HSSI and Dedicated Digital Outputs ....................................... 4-16 TABLE 4-15 HSSI Timing Information .................................................................................... 4-18 TABLE 4-16 Test Points............................................................................................................ 4-20

X TABLES


TABLE 6-1 Topics Covered in Chapter 6....................................................................................6-1 TABLE 6-2 Communication Options ..........................................................................................6-1 TABLE 6-3 Pin-out of RS-232 COM Ports Located on the MPU...............................................6-5 TABLE 7-1 Position Loop Parameters ........................................................................................7-6 TABLE 7-2 Velocity Second-Order Low-Pass Filter Parameters ...............................................7-9 TABLE 7-3 Velocity Loop PI Filter Parameters........................................................................7-10 TABLE 7-4 Velocity Notch Filter Parameters...........................................................................7-13 TABLE 7-5 Velocity Notch Filter Parameters...........................................................................7-15

INTRODUCTION 1-1


1. INTRODUCTION

The SPiiPlus™ PCI-DDM4 are powerful multi-axes motion controllers designed to work with the SPiiPlus DDM4-DR digital drives board and the SPiiPlus DDM4-PS power supply board. The drives and power supply are described separately in the DDM4 Multi-Axes Digital Drive Module Hardware Guide.

ACS-Tech80™ motion controllers meet stringent safety and EMC standards and are CE compliant. SPiiPlus PCI-DDM4 motion controllers are manufactured according to ISO 9001 certified quality management system.

SPiiPlus PCI-DDM4 controllers feature the following characteristics:

• Cutting edge technology developed by ACS-Tech80

• The world’s newest and most advanced generation of motion control technology available

• Based on the best and most cost-effective hardware and software platforms available

• Advanced, unprecedented features and capabilities in motion generation, servo-control flexibility, and programming

• The SPiiPlus PCI-DDM4 is Windows® 95/98/NT/2000 compatible

1-2 INTRODUCTION


1.1. Organization of this Guide The SPiiPlus PCI-DDM4 Hardware and Setup Guide describes how to mount, connect, tune, and operate SPiiPlus PCI-DDM4 motion controllers. Regarding operation, only an introduction to the ACS-Tech80 programming language, ACSPL+, is provided. For a detailed description of ACSPL+, refer to the SPiiPlus ACSPL+ Programmer’s Guide.

The information in this guide is organized sequentially according to the steps involved in installing and setting up the control module.

Chapter 2 Safety and EMC Guidelines: General Safety, EMC recommendations, and customer installed protective devices.

Chapter 3 Features and Specifications: Outline of features and specification of the controller.

Chapter 4 User Interface: Mounting dimensions, connector descriptions, tables of pin characteristics, and schematics.

Chapter 5 DDM4-DR and DDM4-PS Interface: Physical connections to different types of motors.

Chapter 6 Communications: Guide to setting up Ethernet or serial port connection with the controller.

Chapter 7 Control Loops: Description of control algorithm and control loop theory.

1.2. Related SPiiPlus Documentation

TABLE 1-1 Related SPiiPlus Documentation

Document Description

DDM4 Multi-Axes Digital Drive Module Hardware Guide

Electrical interface between the SPiiPlus PCI-DR (Driver) and the SPiiPlus PCI-PS (Power Supply).

SPiiPlus ACSPL+ Programmer's Guide

Command set, programming language, and advanced functions of SPiiPlus controllers.

SPiiPlus MMI User’s Guide Multipurpose visual interface for configuring and adjusting the controller, managing ACSPL+ programs, and analyzing controller performance.

SPiiPlus MultiDebugger User’s Guide

Multiprogramming and Debugging environment for ACSPL+ programs.

SPiiPlus C Library Reference Guide

C++ and Visual Basic® libraries for host driven applications.

HSSI Expansion Modules Guide

High-Speed Synchronous Serial Interface (HSSI) expansion modules description, installation, and operational procedures.

SPiiPlus Utilities User’s Guide Firmware upgrading and recovery procedures.

INTRODUCTION 1-3


1.3. Related SPiiPlus Tools

TABLE 1-2 Related SPiiPlus Tools

Tool Description

SPiiPlus MMI A multipurpose user interface with the controller including: Program management, Motion management, Communication terminal, Four channel digital oscilloscope, Safety and I/O signals monitor, Signal tuning and adjustment, and a fully interactive simulator.

SPiiPlus MultiDebugger An interactive tool for SPiiPlus ACSPL+ multiprogramming that includes: Progress window for monitoring the status and simultaneous debugging of up to 10 programs, normal and step-by-step execution, programmable breakpoints, and a fully interactive simulator.

SPiiPlus C Library A DLL (Dynamic Link Library) that supports host application programming in a variety of languages including C/C++ and Visual Basic plus a fully interactive simulator.

SPiiPlus SPiiDebugger A developing and debugging environment for real-time motion control algorithms inside of SPii processor.

SPiiPlus Utilities The SPiiPlus Upgrader allows upgrading or downgrading of the controller firmware. The SPiiPlus Emergency Wizard allows firmware recovery in case of damage or loss of communication to the controller.

1.4. Conventions Used in this Guide Several text formats and fonts are used in the text to convey information about the text.

TABLE 1-3 Conventions Used in this Guide

Text Description

Bold ACSPL+ command names. Software tool menus, menu items, dialog box names, and dialog box elements.

Italic Emphasis or an introduction to a key concept. In a command syntax, specifies a variable name or other information that the user provides.

Monospace Code examples.

Italic monospace

Information in code examples that the user provides.

ALL CAPS Names of keys on the keyboard. For example, SHIFT.

blue italic Names of other documents.

1-4 INTRODUCTION


Text Description

blue underlined Cross references, web pages, and e-mail addresses.

| Symbol used in nested menu items and dialog box options leading to a final action. For example, the sequence

Debug | New Watch | Real-time |

Directs the user to open the Debug menu, choose the New Watch command, and select the Real-time option.

1.4.1. Statement Text and Icons Used in this Guide WARNING

Highlights an essential operating or maintenance procedure, practice, or condition, which, if not strictly observed, could result in INJURY to, or DEATH of, personnel.

NOTE

Highlights an essential operating or maintenance procedure, condition, or statement.

MODEL DEPENDENT

Highlights a specification, procedure, condition, or statement that depends on the product model.

SAFETY AND EMC GUIDELINES 2-1


2. SAFETY AND EMC GUIDELINES

TABLE 2-1 Topics Covered in Chapter 2

Topic Description

General electrical safety guidelines

End-user installed protective devices and safety precautions

General wiring and electromagnetic compatibility (EMC) guidelines

Suggestions for proper wiring and shielding

2.1. General Safety Guidelines Under emergency situations the unit should be completely disconnected from any power supply. The E-Stop Inputs and Left/Right Limits on ACS-Tech80 products are designed for use in conjunction with customer-installed devices to protect driver load. The end user is responsible for complying with all Electrical Codes.

2.1.1. Emergency Stop Device An emergency stop device shall be located at each operator control station and other operating stations where an emergency stop may be required. The emergency stop device shall disconnect any electrical equipment connected to the unit from the power supply. It will not be possible to restore the circuit until the operator manually resets the emergency stop. In situations with multiple emergency stop devices, the circuit shall not be restored until all emergency stops devices are manually reset.

2-2 SAFETY AND EMC GUIDELINES


2.1.2. Electrical Separation Electrical separation is required between the control and power supply cables to prevent electrical shock or damage to the equipment.

2.1.3. Over-Travel Protection Over-travel limit protection shall be provided where over-travel is hazardous. The over-travel limiting device shall be installed to interrupt the power circuit.

2.2. General Wiring and Electromagnetic Compatibility (EMC) Guidelines

2.2.1. Routing Signal and Power Cables Power cables (to the motor, mains outlet, etc.) and signal cables (to I/O, encoder, RS-232, etc.) must be kept as far apart as possible. Keep at least an inch (∼2.5 cm) for each 3 feet (∼1 m) of parallel run.

For example, if the motor and encoder cables run parallel for 6 feet (∼2 m), maintain a 2 inch (∼5 cm) separation between them.

Separation of 1 inch for every 3 feetMotor Cable

Encoder / RS232 Cable

FIGURE 2-1 Cable Spacing It is recommended to use cables that are completely shielded.

COVER SHIELD

FIGURE 2-2 Shielded Cable

SAFETY AND EMC GUIDELINES 2-3


2.2.2. Cable Length Use short cables as much as possible and route them as far from other EMI sources as possible.

2.2.3. Shielding To reduce EMI radiation, do the following:

• Use shielded cables

• Install a ferrite core around the cable as close to the unit as possible

FIGURE 2-3 Improved Shielding

FEATURES AND SPECIFICATIONS 3-1


3. FEATURES AND SPECIFICATIONS

3.1. Features

3.1.1. PCI Based • Universal 3.3V and 5V operation

• Operates on 32-bit, 33MHz PCI Bus

• Standard long-sized PCI card

3.1.2. Stand-Alone • RS-232 high-speed serial communications interface with up to 115,200-baud rate

• Optional Ethernet communication with TCP/IP and UDP protocol

3.1.3. Fully Programmable Operation • Easy to program using SPiiPlus ACSPL+, a powerful high-level language

• Multitasking of up to 10, concurrently executed ACSPL+ programs

• 1 MB user programmable controller RAM

• General-purpose I/Os: 8 inputs and 8 outputs

• Extendable general purpose digital I/Os via the HSSI-IO16 Expansion Module: 16 additional opto-isolated Inputs and 16 opto-isolated Outputs.

3-2 FEATURES AND SPECIFICATIONS


• High-Speed Synchronous Serial Interface (HSSI) for expanding system capabilities such as I/Os, absolute encoder, AD, DA, and other devices

• Eight, 14-bit analog inputs that can be used for feedback, force, and position control, or for the joystick interface

• Powerful I/O handling with advanced PLC capabilities

• Simultaneous communication via all channels

3.1.4. Special Features for Demanding Applications • Master/slave, electronic gearing, and electronic cam operation

• PEG™ (Position Event Generator) for real-time position compare

• MARK (High-speed registration) inputs with absolute accuracy and position capture

• Multi-programming and multi tasking ability

3.1.5. Outstanding Performance and Capabilities • State-of-the-art proprietary Servo Processor (SPii™) technology

• Fully digital position and velocity control at 20kHz sampling rate, for excellent dynamic and tracking performance

• The ability of the advanced user to modify the control algorithm

3.1.6. Comprehensive Safety, Diagnostics, and Protection • Flexible, powerful, and fully programmable automatic routines for each fault, error, and

exception

• Real-time data collection and programmable sampling rate



3.2. Specifications

TABLE 3-1 Controller Specifications

Specification SPiiPlus PCI-DDM4 SPiiPlus PCI-DDM4A

Axes

Number of Axes 4 with full support plus 4 with limited support

X, Y, A, and B-axes. A and B have reduced set of features with no MARK, PEG, or 1/T support

T, C, and D-axes have no drive interface, independent encoders, and no other I/O interface. Extension support available via fully functional HSSI interface

Axes Notation

Z-axis has only P/D drive interface

Motor Types Brush, Brushless, AC Induction, and P/D Stepper Position Control

Sampling Rate 20kHz

Control Algorithms Pgain, acceleration feed-forward, automatic velocity feed-forward

Trajectory Calculation Rate Programmable to: 0.5, 1kHz, and 2kHZ. Some settings might require the more powerful MPU option

Position Accuracy ±1 encoder count

Position Feedback Sources Incremental encoder, analog inputs, external data via HSSI Velocity Control

Sampling Rate 20kHz

Control Algorithms PI + second order low pass filter; notch filter from 50 to 2000Hz and anti-reset windup

Range Up to 1,000,000,000 counts/second

Resolution 1 count/second

Incremental Encoder Count Rate Up to 32,000,000 counts/second

Long term 0.005% Velocity Accuracy

Short term 0.01%-0.5% (system-dependent)

Acceleration Range Up to 1,000,000,000,000 counts/second2




Position Feedback

Types Digital encoder, analog inputs, user defined devices via HSSI

Number 4

Format Incremental, A, B, & I, Up/Down & I, Pulse/Direction & I

Interface type Differential, RS-422

Digital Encoder

Counting speed < 32*106 counts/sec

Number 0 to 8 User defined devices via HSSI Resolution 16, 32, 48, 64-bit

Drive Interface

12 (3 PWM commands per axis) Number

P/D for Z-axis

Axes X, Y, A, and B X, Y, A, B, and Z

Output type Differential, RS-422 Differential, RS-422, and CMOS for Z-axis

Drive Commands

DAC resolution 11.5-bit

Number 4 5

Axes X, Y, A, and B X, Y, A, B and Z

Drive Enable Output

Output type Open emitter 5V for X, Y, A, B-axes and CMOS for Z-axis

Number 4 5

Axes X, Y, A, and B X, Y, A, B, and Z

Drive Fault Input

Input type CMOS Logic with 2k pull-down resistor

Number 4

Axes X, Y, A, and B

Motor Break Output

Output type Open emitter 5V

Number 1 per card Dedicated Constant Current Output

Output type Open emitter 5V

Number 4 per card Dedicated Fault Status Input Input type CMOS Logic with 2k pull-up resistor




Output type LVCMOS 5V tolerant

Maximum frequency

4,000,000 pulse/sec

Pulse Direction Output

Number 1 on the Z-axis

Input type ±2.5V differential, second order (10kHz) low-pass input filter

Analog Inputs for Current Feedback Resolution 14-bit

I/O

Dedicated Emergency Stop Input Opto-isolated, two terminal, 24V

Dedicated Safety Input X, Y, A, B and Z-axis Left and Right limits

Number 8

Input type 7 Differential RS-422 inputs and 1 Opto-isolated, two terminal, 24V

Usable for MARK (position capture input)

Support for X and Y incremental encoder only

Digital Input

MARK registration delay

< 100nsec

Number 8

Output type 6 Differential RS-422 outputs and 2 Opto-isolated, two terminal, 24V

Usable for PEG 4 for X and 2 for Y-axis. Support for incremental encoder only

Digital Output

Position compare accuracy

±1 count at up to 5,000,000 counts/second

Random mode 5 events/0.001second

Incremental mode up to 3MHz

Repetition Rate

Delay < 100nsec

Number 1 (It of A-axis routed to J2 connector)

Input type Differential, ±10V Differential, ±2.5V

ADC resolution 14-bit

Uncommitted Analog Input

Low pass filter 10kHz




High-Speed Synchronous Serial Interface (HSSI)

Input 256 (4x16x4)

Output 256 (4x16x4)

Transmit/Receive Type Differential, RS-422

Sampling and Update Rate 20kHz

Delay <50µsec

Maximum Cable Length When using Twisted Pair

8 meters

PCI Bus Communication

Type PCI, 3.3V/5V, 33MHz

Communication FIFO

Bi-directional (2 x 512 x 8)

DPRAM 512x16

Bus Communication

Flexible and programmable interrupts generator

Auxiliary Communication

Type RS-232 RS-232, Ethernet (optional) Controller

Type PC104+

CPU type 586, 133MHz 586, 133MHz, or 233MHz (optional)

RAM memory 8Mb

Non-Volatile memory

4Mb

User memory 1Mb

Real time tasks Servo Processor (SPii), 120MHz. One per two axes

Motion Processor Unit (MPU)

Power consumption

+5V/2.5A, ±12V/200mA via PCI or via external power supply connector




Mechanical Dimensions

Long-sized PCI Card W 106mm x L 312mm (W 4.2 inches x L 12.3 inches) Physical Environment and Operating Conditions

Ambient temperature +0°C up to +50°C

Humidity 30% to 95% (non-condensing)

MTBF > 150,000 hours (calculated per Bellcore 3.0 at +25°C)

USER INTERFACE 4-1


4. USER INTERFACE


Topic Description

Mechanical structure Connector abbreviations, dimensions, and connector placement

User interface connections

Wiring details for external connections: RS-232, Encoder, HSSI, PEG, digital I/Os, and Emergency Stop

Pin-outs, Connectors (J#), and Jumpers (JP#)

Outline of connector pin-outs and jumper settings

Indicators Functional description of the indicators

4.1. Mechanical Structure

4-2 USER INTERFACE


FIGURE 4-1 Mechanical Dimensions and Connector Placement

USER INTERFACE 4-3


TABLE 4-2 outlines the signal abbreviations and describes the specific axis, function, and signal polarity used on the interface connector.

TABLE 4-2 Connector Signal Abbreviations

Symbol Description

# Place holder for axes-X, Y, Z, T, A, B, C, D

$ Place holder for signal polarity (non-inverted “+”or inverted “-”)

#FLT$ Drive Fault Input

#ENA$ Drive Enable Output

#RL and #LL Right and Left Limit (safety inputs)

VIN+, VIN-, COMM Pins used for connecting external power supple for safety inputs

ES$ Emergency Stop

#DIR$, #PULSE$ Pulse direction commands (for step motor control)

OUTx$ PEG or digital output

#MARKx$ MARK and digital inputs

#CHA$ Channel A of incremental encoder

#CHB$ Channel B of incremental encoder

#CHI$ Channel Index of incremental encoder

#DACx$ Analog drive command or analog output

NC Not Connected

4.2. J11 External Power Supply Connector Receptacle: JST™ B4B-EH-A Plug: JST EHR-4 with contacts SEH-001T-P0.6

Use 22-AWG# wire

When installed into a PC host, the controller is powered via the PCI Bus. When the SPiiPlus PCI-DDM4 is used as a stand-alone controller via serial communications, the external power supply must be connected to the J11 connector.

http://www.jst.com/

http://www.jst.com/

4-4 USER INTERFACE


TABLE 4-3 J11 External Power Supply Connector

Pin Signal (consumption)

1 +5V (2.5A)

2 +12V (200mA)

3 -12V (200mA)

4 GND

4.3. J2 Encoder, Digital, and Analog I/O Connector Receptacle: MDR 50-pin 3M® Part number: 10250-55H3VC Plug: MDR 50-pin 3M® Part number: 10150-6000EC

The J2 connector includes the following:

• +5VUF supply for encoders

♦ Max current: 800mA

♦ Protected by resettable fuse

• Three channel encoder interface for X, Y, A, and B-axes and connected in parallel to C, D, Z, and T-axes

♦ X encoder connected in parallel to C-axis

♦ Y encoder connected in parallel to D-axis

♦ A encoder connected in parallel to Z-axis

♦ B encoder connected in parallel to T-axis

• Four, RS-422 general-purpose digital inputs

• Five, RS-422 general-purpose digital outputs

• One analog input: differential ±10V. Connected in parallel to B_IT, where B_IT or AIN cannot be used simultaneously

• Emergency Stop input, connected in parallel to ES input on J3

• All signals on the J2 connector contain EMC filters

http://www.3m.com/

http://www.3m.com/

USER INTERFACE 4-5


TABLE 4-4 J2 Encoder, Digital, and Analog I/O Connector

Pin Signal Pin Signal Note

1 AIN+ 26 AIN-

2 AGND 27 AGND

3 +5VUF 28 GND

4 X_CHA+/C_CHA+ 29 X_CHA-/C_CHA-

5 X_CHB+/C_CHB+ 30 X_CHB-/C_CHB-

6 X_CHI+/C_CHI+ 31 X_CHI-/C_CHI-

7 Y_CHA+/D_CHA+ 32 Y_CHA-/D_CHA-

8 Y_CHB+/D_CHB+ 33 Y_CHB-/D_CHB-

9 Y_CHI+/D_CHI+ 34 Y_CHI-/D_CHI-

10 A_CHA+/Z_CHA+ 35 A_CHA-/Z_CHA-

11 A_CHB+/Z_CHB+ 36 A_CHB-/Z_CHB-

12 A_CHI+/Z_CHI+ 37 A_CHI-/Z_CHI-

13 B_CHA+/T_CHA+ 38 B_CHA-/T_CHA-

14 B_CHB+/T_CHB+ 39 B_CHB-/T_CHB-

15 B_CHI+/T_CHI+ 30 B_CHI-/T_CHI-

RS-422, Receiver 26C32 or compatible

16 IN0.1+/X_M2ARK+ 41 IN0.1-/X_M2ARK-

17 IN0.3+/Y_M2ARK+ 42 IN0.3-/Y_M2ARK-

18 IN0.4+/Z_MARK1+ 43 IN0.4-/Z_MARK1-

19 IN0.5+/Z_M2ARK+ 44 IN0.5-/Z_M2ARK-

RS-422, Receiver 26C32 or compatible

20 OUT0.7+/Y_PEG_pulse+ 45 OUT0.7-/Y_PEG_pulse-

21 OUT0.3+/X_PEG_pulse+ 46 OUT0.3-/X_PEG_pulse-

22 OUT0.1+/X_PEG_state1+ 47 OUT0.1-/X_PEG_state1-

23 OUT0.2+/X_PEG_state2+ 48 OUT0.2-/X_PEG_state2-

24 OUT0.4+/Y_PEG_state0+ 49 OUT0.4-/Y_PEG_state0-

RS-422, Transmitter 26C31 or compatible

25 ES+ 50 ES-

4-6 USER INTERFACE


4.3.1. Incremental Encoder Feedback The encoder can be powered via pin-3 (+5VUF) or an external +5V power supply. Pin-3 is protected by 2A polymer resettable fuse. Use external power supply when the total current consumption is more than 400mA. The return of the supply must be connected to any GND pin. Each encoder input port accepts three channel differential, RS-422 compatible, optical encoder, or laser interferometer signals of various programmable formats.

The factory defaults are listed below:

• Two-phase quadrature plus index E_TYPE = 3

• UP-DOWN plus index E_TYPE = 1

• CLOCK-DIR plus index E_TYPE = 0

The input buffer is built around 26C32 line receiver with 220Ω termination resistor.

The use of encoders with built-in line drivers, such as AM26C31 or similar, is recommended.

2 2 0 R

I N +

I N -

2 6 C 3 2T o S P

FIGURE 4-2 Encoder Interface

4.3.2. Emergency Stop Input The Emergency Stop input is two-terminal and can be operated with either a 5V or a 24V supply. See also section 2.1.1.

WARNING

The motion controller SHOULD NOT be used as the Emergency Stop handler of the entire system. The ES input only indicates to the controller that an emergency situation exists.

R

ES- DGND

ES+ +5V

To MPU

FIGURE 4-3 Emergency Stop (ES) Input

USER INTERFACE 4-7


4.3.3. RS-422 I/O Interface

26C31

#OUT +

#OUT -

From SP

FIGURE 4-4 RS-422 Output Port Interface

2 2 0 R

I N +

I N -

2 6 C 3 2 T o S P

FIGURE 4-5 RS-422 Input Interface

4.4. J3 Drive Interface Connector Receptacle: 64-pin, male, 2.54mm (.100”), dual row pin header Plug: 64-pin, female, 2.54mm (.100”)

• Three PWM commands for X, Y, A, and B-axes

• Enable, brake, drive fault for X, Y, A, and B-axes

• Special fault status inputs (see DDM4 Hardware and Setup Guide section 5.4 Fault Status)

• Eight analog inputs for current measurement

• Emergency stop input

TABLE 4-5 J3 Drive Interface Connector


1 X_PWM_0+ 2 X_PWM_0-

3 X_PWM_1+ 4 X_PWM_1-

5 X_PWM_2+ 6 X_PWM_2-

7 Y_PWM_0+ 8 Y_PWM_0-

9 Y_PWM_1+ 10 Y_PWM_1-

RS-422

Transmitter 26C31 or compatible

4-8 USER INTERFACE



11 Y_PWM_2+ 12 Y_PWM_2-

13 GND 14 A_PWM_0-

15 A_PWM_0+ 16 A_PWM_1-

17 A_PWM_1+ 18 A_PWM_2-

19 A_PWM_2+ 20 B_PWM_0-

21 B_PWM_0+ 22 B_PWM_1-

23 B_PWM_1+ 24 B_PWM_2-

25 B_PWM_2+ 26 GND

27 X_ENA 28 A_ENA

29 Y_ENA 30 B_ENA

5V open emitter output

31 X_BRAKE 32 A_BRAKE

33 Y_BRAKE 34 B_BRAKE

35 CONST_CURR 36 A_FLT

37 X_FLT 38 B_FLT

39 Y_FLT 40 Reserved

41 FSTATUS0 42 FSTATUS1

43 FSTATUS2 44 FSTATUS3

CMOS logic with 2k pull-down resistor

45 ES+ 46 ES-

47 X_IS+ 48 X_IS-

49 X_IT+ 50 X_IT-

51 Y_IS+ 52 Y_IS-

53 Y_IT+ 54 Y_IT-

55 AGND 56 A_IS-

57 A_IS+ 58 A_IT-

59 A_IT+ 60 B_IS-

61 B_IS+ 62 B_IT-

63 B_IT+ 64 AGND

Differential analog inputs ±2.5V

Input impedance 10k

USER INTERFACE 4-9


GND

SP +5V

ENA

FIGURE 4-6 Drive Enable Output

2k

Fault To SP

FIGURE 4-7 Drive Fault Input

+5V

2k

FSTATUS To SP

FIGURE 4-8 FSTATUS Fault Input

I+

I-

5k

5k

5k

5k

C

20k

20k

To A to D converter

A GN D

FIGURE 4-9 Analog Inputs for Current Feedback

4-10 USER INTERFACE


4.5. J5 Digital and Special I/O Connector Receptacle: 16-pin, male, 2.54mm (.100”), dual row pin header Plug: 16-pin, female, 2.54mm (.100”)

• Three general-purpose digital inputs, RS-422

• One general-purpose digital outputs, RS-422

• Industrial signal level (24V) isolated input, two-terminal

• Two industrial signal level (24V) isolated outputs, two-terminal, maximum current 50mA


TABLE 4-6 J5 Digital and Special I/O Connector

Pin Signal name Note

1 IN0+/X_MARK1+/Z_MARK1+

2 IN0-/X_MARK1-/Z_MARK1-

3 IN2+/Y_MARK1+/T_MARK1+

4 IN2-/Y_MARK1-/T_MARK1-

5 +IN6/T_MARK1+

6 -IN6/T_MARK1-

RS-422

Receiver 26C32

7 OUT0+/X_PEG_state0+

8 OUT0-/ X_PEG_state0-

RS-422

Transmitter 26C31

9 GND

10 GND

11 IN7+/T_M2ARK+

12 IN7-/T_M2ARK-

Industrial signal level (24V)

Isolated Input

13 OUT5+

14 OUT5-


Isolated output 50mA

15 OUT6+

16 OUT6-


Isolated output 300mA

USER INTERFACE 4-11


GND

SP OUT-

OUT+

FIGURE 4-10 Isolated Outputs 5 and 6

4.6. J8 X, A, Y, and B Raw Signal Limit Inputs or A-Axis Encoder Output

Receptacle: 10-pin, male, 2.54mm (.100”), dual row pin header Plug: 10-pin, female, 2.54mm (.100”)

The J8 connector may be ordered for X, A, Y, and B Raw Signal Limit Inputs or for A-axis Encoder Outputs (TABLE 4-7).

TABLE 4-7 J8 X, A, Y, and B Raw Signal Limit Inputs or A-Axis Encoder Output

Pin PCI-DDM4A Signal PCI-DDM4 Signal

1 X_LL A_CHA+

2 X_RL A_CHA-

3 A_LL A_CHB+

4 A_RL A_CHB-

5 Y_LL A_CHI-

6 Y_RL A_CHI+

7 +5VUF +5VUF

8 B_LL NC

9 0V(GND) 0V(GND)

10 B_RL NC

4-12 USER INTERFACE


4.6.1. J8 X, A, Y, and B Raw Signal Limit Inputs The J8 connector is factory configured for X, A, Y, and B Raw Signal Limit Inputs (TABLE 4-7).

• X, A, Y, and B-Left and Right limits

• LVCMOS compatible

• 5V tolerant

4.6.2. J8 A-Axis Encoder Output The J8 connector may be ordered with A-axis Encoder Output (TABLE 4-7). The A-axis encoder signals (RS-422) are directly coupled to this connector. The J8 connector is connected in parallel with connector J2 (Encoder, Digital, and Analog I/O Connector section 4.3).

4.7. J6 Z-Axis P/D Drive or HSSI Connector Receptacle: 10-pin, male, 2.54mm (.100”), dual row pin header Plug: 10-pin, female, 2.54mm (.100”)

The J6 connector may be ordered as Z-axis P/D drive interface or as HSSI (TABLE 4-8).

• LVCMOS signal

• 5V tolerant

TABLE 4-8 J6 Z-Axis P/D Drive or HSSI Output Connector

Pin PCI-DDM4A Signal PCI-DDM4 Signal Description

1 Z_PULSE X_CLKCVT

2 Z_DIR X_DATAIN

3 Z_ENA X_DATAOUT

LVCMOS compatible 5V tolerant

4 GND GND

5 Z_FLT Y_CLKCVT

6 Z_LL Y_DATAIN

7 Z_RL Y_DATAOUT

LVCMOS compatible 5V tolerant

8 GND GND

9 NC NC

10 NC NC

USER INTERFACE 4-13


4.7.1. J6 Z-Axis P/D Drive Interface The J6 connector is factory configured for Z-axis P/D Drive Interface (TABLE 4-8). See also 4.9.

• Z-axis P/D drive interface

• Z-axis Left and Right Limits

4.7.2. J6 HSSI The J6 connector may be ordered with HSSI (TABLE 4-8).

• LVCMOS signal

• HSSI connection to X-SPii and Y-SPii

4.8. J7 Additional Functions Output Connector (SPiiPlus PCI-DDM4A Only)

MODEL DEPENDENT

The J7 Additional Functions Output Connector applies to the SPiiPlus PCI-DDM4A only.

Receptacle: 16-pin, male, 2.54mm (.100”), single row pin header Plug: 16-pin, female, 2.54mm (.100”)

TABLE 4-9 J7 Additional Functions Output Connector

Pin SPiiPlus PCI-DDM4A Note

1 X_PWM_MON

2 Y_PWM_MON

3 Z_PWM_MON

4 T_PWM_MON

5 X_SP_OUT0

6 X_SP_OUT1

7 Y_SP_OUT0

8 Y_SP_OUT1

9 Z_SP_OUT0

10 Z_SP_OUT1

CMOS compatible

4-14 USER INTERFACE



11 T_SP_OUT0

12 T_SP_OUT1

13 Z_PEG_pulse

14 T_PEG_pulse

15 NC

16 DGND

4.9. J1 HSSI (High-Speed Synchronous Serial Interface) Connectors

For HSSI Description and Timing information, see section 4.10.1. For J6 HSSI information, see section 4.7.2.

• Differential RS-422 signal

• HSSI connection to X-SPii and Y-SPii

TABLE 4-10 HSSI Signal Description

Symbol Description

SER_DI HSSI serial data input

SER_DO HSSI serial data output

CONTROL Composite signal that includes start and data synchronization signals

SP (SPii) Servo Processor

4.9.1. J1 Top HSSI Interface Connector The J1 Top uses an RJ-45 connector

• J1 Top connector provides connection to X_SPii

• All signals on the J1 Top connector contain EMC filters

TABLE 4-11 J1 (Top) HSSI Interface Connector (SPiiPlus PCI-DDM4A)


1 CLKCVT+

2 CLKCVT-

Composite synchronized signal, RS-422, transmitter 26C31 or compatible

3 X_DATAIN+ Data input, RS-422,

USER INTERFACE 4-15



4 X_DATAIN- receiver

5 X_DATAOUT+

6 X_DATAOUT-

Data output, RS-422, transmitter 26C31 or compatible

7 GND

8 GND

4.9.2. J1 Bottom HSSI Interface Connector The J1 Bottom uses an RJ-45 connector

• J1 Bottom connector provides connection to Y_SPii

• All signals on the J1 Bottom connector contain EMC filters

TABLE 4-12 J1 (Bottom) HSSI Interface Connector (SPiiPlus PCI-DDM4A)


1 CLKCVT+

2 CLKCVT-

Composite synchronized signal, RS-422, transmitter 26C31 or compatible

3 Y_DATAIN+

4 Y_DATAIN-

Data input,

RS-422, receiver

5 Y_DATAOUT+

6 Y_DATAOUT-

Data output, RS-422, transmitter 26C31 or compatible

7 GND

8 GND

TABLE 4-13 J1 (Bottom) HSSI Interface Connector (SPiiPlus PCI-DDM4)

Pin SPiiPlus PCI-DDM4 Note

1 RESERVED

2 RESERVED

3 RESERVED

4 IN7+

5 IN7-

Industrial signal level (24V), isolated input

6 RESERVED

4-16 USER INTERFACE


Pin SPiiPlus PCI-DDM4 Note

7 OUT5+

8 OUT5-

Industrial signal level (24V), isolated output 50mA

4.10. J4 HSSI and Dedicated Output Connectors Receptacle: 30-pin, male, 2.54 mm (.100”), double row pin header, with keying Plug: 30-pin, female, 2.54 mm (.100”)

• Differential RS-422 signal

• HSSI connection to Z_SPii and T_SPii


• The dedicated digital outputs operated via pin-22 through pin-30 on the J4 connector

TABLE 4-14 J4 Connector for HSSI and Dedicated Digital Outputs

Pin Signal Pin Signal Description

1 XSER_DI+ 2 XSER_DI-

3 YSER_DI+ 4 YSER_DI-

5 ZSER_DI+ 6 ZSER_DI-

7 TSER_DI+ 8 TSER_DI-

9 GND 10 XSER_DO-

11 XSER_DO+ 12 YSER_DO-

13 YSER_DO+ 14 ZSER_DO-

15 ZSER_DO+ 16 TSER_DO-

17 TSER_DO+ 18 CONTROL1-

19 CONTROL1+ 20 CONTROL2-

21 CONTROL2+ 22 GND

HSSI

Differential RS-422

SPiiPlus PCI-DDM4 only has X and Y SER_DI/DO channels

Ground (pin-22) is common to both HSSI and the dedicated digital outputs

23 X_PEG_state_3+/XSP_O+ 24 X_PEG_state_3-/XSP_O-

25 Y_PEG_state_3+/YSP_O+ 26 Y_PEG_state_3-/YSP_O-

27 Z_PEG_Pulse+/ZSP_O+ 28 Z_PEG_Pulse-/ZSP_O-

29 T_PEG_Pulse+/TSP_O+ 30 T_PEG_Pulse-/TSP_O-

Additional PEG and SP (SPii) controlled outputs (dedicated digital outputs). PEG is the default. These signals are not related to HSSI

USER INTERFACE 4-17


4.10.1. HSSI Description and Timing The HSSI operates via pin-1 through pin-22 on the J4 and via the J1 connectors.

There are four general-purpose, high-speed synchronous serial input and output channels. They can be used for high-speed laser interferometers, incremental/absolute encoder position reading, A to D interface, I/O extension, or any other function as required by the user. All signals are differential, RS-422 type.

The connection between the SPiiPlus PCI-DDM4 and the remote interface unit is shown in FIGURE 4-11 HSSI Connection Diagram. The timing and control sequence required for the serial interface is show in FIGURE 4-12 Timing Sequence of HSSI and in FIGURE 4-13 Data Read/Write Operation. The reading sequence repeats itself once per servo update cycle, 50µsec at 20kHz.

In the sequence shown, the data transfer is as follows:

• The sequence is initiated by START pulse. The START pulse is used to latch and transfer data to parallel shift register.

• The read/write operation consists of 64-serial clock pulses. These pulses are further divided into four groups, each with sixteen pulses. During read operation the serial data is latched into the SPii from the SER_DI line on the falling edge of SER_CLK. During write operation the data is shifted out on the rising edge of the SER_CLK. The data must be latched into destination shift register on falling edge of the SER_CLK. The first data bit of each group is MSB (DB16). The last data bit of each group to be latched in on the final falling edge is the LSB (D0).

SPiiPlus PC I

R em ote Interface

U nit J1 J4 or J6

U ser C onnectors

H SSI

C O N T R O L

D A TA O U T

D A T A IN

FIGURE 4-11 HSSI Connection Diagram

4-18 USER INTERFACE


T1

T2

16 pulses

2 1 3 4

T3 T4

T5 T6

START pulse SER_CLK

FIGURE 4-12 Timing Sequence of HSSI Control Signal

SER_CLK

SER_DI

T5 T6

SER_DO

FIGURE 4-13 Data Read/Write Operation

TABLE 4-15 HSSI Timing Information

Parameter Time Comments

T1 50µs HSSI cycle

T2 800ns START Pulse Width

T3 400ns Time between START falling edge to first SER_CLK rising edge

T4 1.4µs Time between groups of SER_CLK

T5 200ns SER_CLK High Pulse Width

T6 200ns SER_CLK Low Pulse Width

USER INTERFACE 4-19


FIGURE 4-14 HSSI Control Signal

4.11. J9 JTAG Connector WARNING

The J9 JTAG connector is used for manufacturing and testing purposes only. DO NOT connect anything to this connector.

4.12. JP1 Jumper WARNING

Jumper JP1 is used for manufacturing and testing purposes only. DO NOT change the default jumper setting. The JP1 Jumper is not installed by default.

10µs

10µs

4-20 USER INTERFACE


4.13. JP2 Jumper WARNING

Jumper JP2 is used for manufacturing and testing purposes only. DO NOT change the default jumper setting. The JP2 Jumper is by default connected to pin-1 and pin-2.

4.14. Test Points There are 8 test points, one for every analog input and 1for the analog ground (TABLE 4-16). Test points may be connected after the analog input buffer amplifier’s output.

• Output range ±5V represents full range nominal input voltage (±2.5)

• Test point is connected to analog input buffer amplifier’s output via 51kΩ

TABLE 4-16 Test Points

Test Point # Signal

TP1 X_IS

TP2 Y_IS

TP3 X_IT

TP4 Y_IT

TP5 A_IS

TP6 B_IS

TP7 A_IT

TP8 B_IT

TP9 AGND

4.15. LED Indicator LED Indicator Description

MP_ON Green LED.

After power is turned on, the MP_ON LED flickers and then remains green indicating that the controller is functioning properly.

During normal operation when the control unit receives a command, the LED turns off for a fraction of a second.

DDM4-DR AND DDM4-PS INTERFACE 5-1


5. DDM4-DR AND DDM4-PS INTERFACE

5.1. Brushless Motor Connection

DDM4 X, Y, & A

Amplifiers

SPiiPlus PCI-DDM4 Controller

#Brushless

Motor

ENCODER

#R#S #T

#_PWM_1

#_PWM_2

CONST_

#_ENABLE

#_BRAKE

#_FLT

#_IS #_IT

DGND/AGND

#_PWM_0

FIGURE 5-1 Brushless Motor Connection

For drivers with differential inputs both + and – wires are connected as above. For drivers with single ended input only the + wires are connected.

5-2 DDM4-DR AND DDM4-PS INTERFACE


5.2. Brush Motor Connection

SPiiPlus PCI-DDM4 Controller

DDM4 B Amplifier

Brush Motor

ENCODER

BRBS

B_PWM_1 B_PWM_2

CONST_

B_ENABLE

B_BRAKE

B_FL

B_IS B_IT

DGND/AGND

B_PWM_0

FIGURE 5-2 Brush Motor Connection

For drivers with differential inputs both + and – wires are connected as above. For drivers with single ended input only the + wires are connected.

COMMUNICATIONS 6-1


6. COMMUNICATIONS


Topic Description

Simulator Communication with the SPiiPlus Simulator.

Communications Communication with the controller via the PCI Bus, RS-232, or Ethernet.

The following steps are basic procedures for establishing communication between the SPiiPlus controller and the PC host. The connection types will very depending on the specific controller ordered.

In the Main Panel click Communication

TABLE 6-2 Communication Options

Connection Type Cable Required SPiiPlus PCI

Simulator None Standard

PCI Bus None Standard

Serial (RS-232) Null-Modem cable Standard

Ethernet Network 10/100BASE-T Path-Through cable Optional at time of order

Ethernet Point-to-Point 10/100BASE-T Crossover cable Optional at time of order

6-2 COMMUNICATIONS


6.1. Simulator The SPiiPlus Installation CD comes with a Simulator that allows the user to work with the SPiiPlus MMI, SPiiPlus MultiDebugger, or SPiiPlus C Library without being physically connected to a controller and/or drives/motors. It is recommended to begin here, before installing the controller or making any electrical connections. After becoming familiar with the Simulator proceed to install the controller and make the necessary electrical connections.

Whereas the SPii program is intended for execution inside the controller and cannot be activated on the PC, the Simulator is a PC program and operates in the Windows 95/98/NT/2000 environment. The Simulator provides a powerful tool for use during application development and debugging. The MMI Scope displays motions of the Simulator identical to the real motion, except the Simulator’s motion is free of errors and noise.

The SPiiPlus Basic Package includes a demo version of the Simulator. The SPiiPlus ADK (Application Development Kit) includes the full version of Simulator that works without any time limitations.

The simulator emulates all functions of the firmware, except for the following:

• Control of a physical motor.

• Real feedback from the motors, instead the simulator sets the feedback values equal to the reference values, which is equivalent to ideal motors with zero following error.

• Analog and digital inputs. The simulator allows assignment to the corresponding variables, so that the change of actual signals can be emulated. This provides the ability to emulate the I/O (digital and analog) part of a machine using ACSPL+ programs.

• Emulation SP (SPii) programs. Emulation of all feedback signals specified above provides an ideal with respect to following the reference position. Feedback position and Reference position are equal (FPOS=RPOS).

• The simulator is not a real-time program. The simulator emulates the controller time and supplies the TIME variable, but 1 millisecond of TIME is not equal to 1 millisecond of real-time.

• All hardware related features such as; Index, MARK, PEG, and Analog Inputs/Outputs.

• Immediate commands; #HWRES, #RESET, #PROTECT, #UNPROTECT, #U, #IR.

• Saving and Loading Array data by WRITE/READ commands.

• Saving or Loading an application via the Application Saver or Application Loader.

The user can prepare and debug an application using the Simulator. When the logical correctness of the application is proved, and all motions are checked with the MMI Scope, the switch to the actual controller is supported by the SPiiPlus C Library. Switching to a real controller requires no additional changes in the application.

Follow these steps to activate the Simulator: 1. Open Communication | Simulator.

2. Click. Connect. Once communication is established the Communication indicator turns green.

COMMUNICATIONS 6-3


FIGURE 6-1 Communication Window for Simulator Connection 3. Close the Communication window. The Communication indicator on the Main Panel

remains green and the Stop Programs and Motors button is displayed.

6.2. PCI Bus Connection

6.2.1. Physical Connection Install the SPiiPlus PCI card to the PCI slot of the PC host.

6.2.2. Configuring the Host You must have one or more of the SPiiPlus tools installed on your PC host. Any SPiiPlus tool (SPiiPlus MMI, SPiiPlus MultiDebugger, or SPiiPlus C Library) installs a driver that provides communication through the PCI Bus. If the driver is not properly installed, you will not be able to establish communication.

6.2.3. Establishing PCI Bus Communication 1. Open Communication | PCI Bus. The MMI scans the PCI bus for installed controller cards.

If at least one card is found, the Slot field becomes enabled.

6-4 COMMUNICATIONS


FIGURE 6-2 Communication Window for PCI Bus Connection 2. If multiple controller cards are installed, choose the required card in the Slot field.

3. Click. Connect. Once communication is established the Communication indicator turns green, the Firmware box on the Main Panel displays the controller version and the communication channel being used, and the Stop Programs and Motors button appears.

4. Click Close.

6.2.4. Configuring the Controller The SPiiPlus PCI is factory configured for PCI Bus communication. No additional controller configuration is required.

6.2.5. Troubleshooting PCI Bus Connection 1. Check that at least one SPiiPlus tool is installed on your PC host and that the driver is active.

2. Check that the controller card is properly installed in your PC host.

COMMUNICATIONS 6-5


6.3. Serial RS-232 Communication • The system may be equipped with one or more COM ports (COM1, COM2, etc.)

• The exact placement depends on the type of PC104+ used in the controller

FIGURE 6-3 PC104+ with 133MHz Processor (SPiiPlus PCI-DDM4A default MPU)

6.3.1. Physical Connection Receptacle: 10-pin, male, 2.54mm (.100”), dual row header Plug: 10-pin, female, 2.54mm (.100”)

TABLE 6-3 Pin-out of RS-232 COM Ports Located on the MPU

Pin Name Description

1 DCD Data Carrier Detect

2 DSR Data Set Ready

3 RX232 RS-232 receive signal

4 RTS Request To Send

5 TX232 RS-232 transmit signal

6 CTS Clear To Send

7 DTR Data Terminal Ready

8 RI Ring Indicator

9 & 10 GND RS-232 ground

6-6 COMMUNICATIONS


When making a serial connection verify that:

1. The PC receive (RX) is wired to the controller’s transmit (TX), pin-5

2. The PC transmit (TX) is wired to the controller’s receive (RX), pin-3

3. The ground (GND) is properly connected, pin-9 and pin-10

NOTE

The user must connect RX232 (pin-3), TX232 (pin-5), and GND (pin-9 and 10) ONLY! See FIGURE 6-4 RS-232 RX/TX Connection. Pin-1, 2, 4, 6, 7, and 8 are not used.

FIGURE 6-4 RS-232 RX/TX Connection

6.3.2. Configuring the Host A typical PC computer has one or more RS-232 ports factory configured. Any of these ports can be connected to the controller.

6.3.3. Establishing Serial Communication 1. Open Communication | Serial. The MMI scans the PCI bus for the installed controller

cards. If at least one card is found, the Slot field becomes enabled.

Rx

Tx

GND

Rx

Tx

GND

PC SPiiPlus PCI

RS-232

COMMUNICATIONS 6-7


FIGURE 6-5 Communication Window for Serial Connection 2. Specify the communication port (COM1, COM2, etc) in the host computer that the cable is

connected to.

3. Set the Rate. The value must be the same as the BAUD parameter specified in the controller. Use the factory default value of 115200 for the first time. If you already configured another rate as described in 6.3.3, then use that configured value. You do not need to change the Timeout setting because the MMI automatically adjusts the timeout to the appropriate value.

4. Click. Connect. Once communication is established the Communication indicator turns green, the Firmware box on the Main Panel displays the controller version and the communication channel being used, and the Stop Programs and Motors button appears.

5. Click Close.

6.3.4. Configuring the Controller The controller is manufactured with a default serial communication rate of 115200 baud.

Use the default communication rate for establishing the first connection.

The following instructions are relevant only when communication is established and you need to change the communication rate.

1. Open Tools | Configurator | Communication Parameters.

6-8 COMMUNICATIONS


FIGURE 6-6 Communication Parameters 2. Select desired Serial Baud Rate (BAUD). The Baud Rate in the MMI must be the same as

the Baud Rate in the controller.

3. Close both the Communication Parameters and Configurator. The following confirmation warning will appear.

FIGURE 6-7 Configuration Parameters Changed, Save to Flash Warning 4. Click Yes. The SPiiPlus MMI saves the new communication rate in the controller non-

volatile (flash) memory after a Restart. The flash memory then retains these parameters after complete power-off.

5. The new value is not active immediately. To make the new value active, you must restart the controller by clicking Tools | Restart (#HWRES) on the MMI Main Panel.

6. When the controller restarts, the SPiiPlus MMI will not be able to communicate with the controller because the controller uses a new communication rate. To reestablish communication use the procedure described in 6.3.3 Establishing Serial Communication.

6.3.5. Troubleshooting Serial Connection • Inspect the cable and connectors.

• Check that the COM port on the PC host is not being used by another application.

• Check that the communication port specified in the Port field corresponds to the COM port on the PC host that the cable is connected to.

• Check that the communication rate specified in the Rate field corresponds to the value configured in the controller. Check that the BAUD rate is correctly specified in the Communication Parameters. The factory default is 115200.

COMMUNICATIONS 6-9


6.4. Ethernet Network Communication If your PC host is NOT connected to a local network, establish the Ethernet Point-to-Point Communication first (section 6.5).

The system may be equipped with a 10M or 100M Ethernet adapter for a 10/100BASE-T network interface. The Ethernet interface includes one RJ-45 type connector.

If your PC host is already connected to a local Ethernet Network, you only need to configure the controller and to connect it to the same network.

6.4.1. Physical Connection Receptacle: RJ-45 Ethernet connector Plug: RJ-45 Ethernet connector

• Use a 10/100BASE-T Path-Through cable.

• Connect the Ethernet connector on the controller to any Ethernet Network connector on the PC host.

6.4.2. Configuring the Host Check that the TCP/IP protocol is installed on your PC:

1. From the Start button in the Windows Task Bar choose Settings | Control | Network.

2. Select the TCP/IP Protocol and click OK.

3. If the TCP/IP protocol is not installed, ask your network administrator to properly install it.

6-10 COMMUNICATIONS


In Windows 95/98 the following dialog box appears:

In Windows NT and 2000 the dialog looks like this:

FIGURE 6-8 Network Settings Window for Windows 95, 98, NT, and 2000

COMMUNICATIONS 6-11


6.4.3. Establishing Ethernet Network Communication 1. Open Communication | Ethernet. The MMI scans the PCI bus for the installed controller


FIGURE 6-9 Communication Window for Ethernet Network 2. Enter the Remote Address. You must enter the TCP/IP address configured in the controller

(factory default is 10.0.0.100). The address must be reserved by the network administrator.

3. In the Connection Parameters field select Network.

4. Press Connect. Once communication is established the Communication indicator turns green, the Firmware box on the Main Panel displays the controller version and the communication channel being used, and the Stop Programs and Motors button appears.

5. Click Close.

6.4.4. Configuring the Controller The controller cannot automatically obtain a TCP/IP address from the network server. The TCP/IP address must be configured in the controller. Ask your network administrator to reserve a fixed address on the network in order to avoid address overlapping.

You must first establish communication with the controller through any available communication channel before you can configure the controller. Use the serial communication for initial configuration of the controller.

1. Ask the network administrator to reserve a fixed TCP/IP address in the network. Write down the reserved address.

2. Follow the same instruction in 6.3.3, Establishing Serial Communication between the SPiiPlus MMI and the controller.

3. Open Tools | Configurator | Communication Parameters.

Select Network connection

Enter the TCP/IP address provided by the system

6-12 COMMUNICATIONS


FIGURE 6-10 SPiiPlus MMI Communication Parameters Dialog Box

4. In the TCP/IP Address field, enter the address that you received from the network administrator (factory default is 10.0.0.100).

5. Click Close on both dialog boxes. The SPiiPlus MMI writes the new TCP/IP address to controller variable TCPIP.

6. Click Yes. The SPiiPlus MMI saves the new communication rate in the controller non-volatile (flash) memory. The flash memory retains these parameters after power-off.

7. The new value is not active immediately. To make the new value active, you must restart the controller by clicking Tools | Restart (#HWRES) on the MMI Main Panel.

6.4.5. Troubleshooting Ethernet Network Connection • Check that you are using the Path-Through 10/100BASE-T cable.

• Inspect the cable and the connectors.

• Check that the network hardware/software (adapter, driver, TCP/IP protocol) is properly installed and configured to the PC host.

• Check that the TCP/IP address reserved for the controller is unique in the network.

• Check that the right TCP/IP address is configured in the controller.

• Check that the right TCP/IP address is selected in the SPiiPlus MMI Communication dialog.

• If you can communicate with the controller, but an occasional error occurs, check that Network Connection is selected (not Point-to-Point) from the Communication window.

6.5. Ethernet Point-to-Point Communication If your PC host is already included in an Ethernet local network, use the Ethernet Network Communication procedures as described in section 6.4.

If you are making a point-to-point connection, make sure that you have an Ethernet card that is dedicated for the point-to-point connection. You CAN NOT use the same Ethernet card that connects to a local network. If you have a connection to a local network, you must install an additional card for point-to-point connections.

COMMUNICATIONS 6-13


6.5.1. Physical Connection Receptacle: RJ-45 Ethernet connector Plug: RJ-45 Ethernet connector

• Use a 10/100BASE-T Crossover cable

• Connect the Ethernet connector on the controller to the connector of the Ethernet card dedicated to communication with the controller.

6.5.2. Configuring the Host 1. From the Start button in the Windows Task Bar choose Settings | Control | Network.

2. Select the TCP/IP Protocol and click OK.

3. If the TCP/IP protocol is not installed, ask your network administrator to properly install the TCP/IP protocol. If it appears several times, select the instance related to the Ethernet adaptor card that will be used for connection with the controller.

6-14 COMMUNICATIONS


In Windows 95/98 you will see the following dialog box:

In Windows NT and 2000 the dialog box looks like this:

FIGURE 6-11 Network Settings Window for Windows 95,98, NT, and 2000

COMMUNICATIONS 6-15


4. Click Properties. The TCP/IP Properties dialog box opens (Windows NT looks a little different):

FIGURE 6-12 TCP/IP Properties Window for Ethernet Point-to-Point 5. In the IP Address tab Select Specify an IP Address.

6. Enter the number 10.0.0.101 in the IP Address field, and 255.255.255.0 in the Subnet Mask field.

NOTE

The controller is manufactured with a default TCP/IP 10.0.0.100. The address entered in this dialog differs from the controller address in the last digit.

7. Set the other tabs as follows (recommended):

♦ WINS Configuration: Disable WINS Resolution

♦ Gateway: Clear all Installed Gateways

♦ DNS Configuration: Disable DNS

8. If the following dialog box appears, click Yes.

9. Restart the PC host to make the settings active.

6-16 COMMUNICATIONS


6.5.3. Establishing Ethernet Point-to-Point Communication 1. Open Communication | Ethernet. The MMI scans the PCI bus for the installed controller


FIGURE 6-13 Communication Window for Ethernet Point-to-Point 2. Enter the Remote Address. You must enter the TCP/IP address configured in the controller

(factory default is 10.0.0.100). The address must be reserved by the network administrator.

3. In the Connection Parameters field select Point-to-Point.

4. Press Connect. Once communication is established the Communication indicator turns green, the Firmware box on the Main Panel displays the controller version and the communication channel being used, and the Stop Programs and Motors button appears.

5. Click Close.

6.5.4. Configuring the Controller The controller is manufactured with a default TCP/IP address 10.0.0.100. You do not need to change this address in order to establish Ethernet point-to-point connection.

6.5.5. Troubleshooting Ethernet Point-to-Point Connection • Check that you are using a Crossover 10/100BASE-T cable.

• Inspect the cable and the connectors.

• Check that the network hardware/software (adapter, driver, TCP/IP protocol) is properly installed and configured on the PC host.

• Check that the default TCP/IP address was not changed in the controller and that the proper TCP/IP address 10.0.0.100 is selected in the MMI.

Select Point-to-Point connection

Enter the TCP/IP address provided by the system

CONTROL LOOPS 7-1


7. CONTROL LOOPS

7.1. Control Loops Block Diagrams NOTE

These diagrams are for general description only.

The following chapter describes the block diagrams of the SPiiPlus PCI-DDM4 Control Loops.

Servo parameters can be divided to high-level parameters and low-level parameters. High-level servo parameters begin with the letters “SP,” and are set by the user in the Adjuster. Low-level parameters are the internal servo parameters in the DSP program, to which the user has no direct access.

FIGURE 7-1 and FIGURE 7-2 describe the general control loops diagrams in case of single loop and dual loop respectively. FIGURE 7-3, FIGURE 7-4, FIGURE 7-5, and FIGURE 7-7 describe each of the control filters, with their low-level parameters.

7-2 CONTROL LOOPS


PWM

B

Not

chFi

lter

2nd O

rder

Low

-Pas

sFi

lter

Velo

city

PIFi

lter

Des

ired

Velo

city

Des

ired

Posi

tion

S Velo

city

Feed

Forw

ard

Acc

eler

atio

nFe

edFo

rwar

d

DA

CC

omm

and

Cur

rent

/Tor

que

Lim

it

Vect

orC

ontr

olSi

nuso

idal

Com

mut

atio

n

Velo

city

Scal

e Fa

ctor

S++

++

-

VEL_

FV

++

Clo

se L

oop/

Ope

n Lo

op

SW

i* A

i* B

Der

ivat

ive

Der

ivat

ive

Bru

shle

ssM

otor

VEL_

FP

-+

Posi

tion

Gai

n

AC

C_F

F

Phas

eA

dvan

ce

Posi

tion

Sens

or

Posi

tion

Feed

back

Velo

city

Fee

dbac

k

Prof

ileG

ener

ator

Phae

AC

urre

ntPI

Filt

er32

768

5242

Scal

ing

I peak

=524

2

3276

852

42Ph

ase

BC

urre

ntPI

Filt

erD

DM

4

Not

act

ive

in c

ase

ofD

C m

otor

(B a

xis)

PWM

A

PWM

C

-+-

+

i A i BC

urre

nt F

eedb

acks

- -N

ot a

ctiv

e in

cas

e of

DC

mot

or (B

axi

s)

VEL_

FP=V

EL_F

V

FIGURE 7-1 SPiiPlus PCI-DDM4 Control Algorithm Block Diagram (Single Loop)

CONTROL LOOPS 7-3


PWM

B

Not

chFi

lter

2nd O

rder

Low

-Pas

sFi

lter

Velo

city

PIFi

lter

Des

ired

Velo

city

Des

ired

Posi

tion

S Velo

city

Feed

Forw

ard

Acc

eler

atio

nFe

edFo

rwar

d

DA

CC

omm

and

Cur

rent

/Tor

que

Lim

it

Vect

orC

ontr

olSi

nuso

idal

Com

mut

atio

n

Velo

city

Scal

e Fa

ctor

S++

++

-

VEL_

FV

++

Clo

se L

oop/

Ope

n Lo

op

SW

i* A

i* B

Der

ivat

ive

Der

ivat

ive

Bru

shle

ssM

otor

VEL_

FP

-+

Posi

tion

Gai

n

AC

C_F

F

Phas

eA

dvan

ce

Prim

ary

Posi

tion

Sens

or

Seco

ndar

yPo

sitio

nSe

nsor

Posi

tion

Feed

back

Velo

city

Fee

dbac

k

Prof

ileG

ener

ator

Gea

r

Phae

AC

urre

ntPI

Filt

er32

768

5242

Scal

ing

I peak

=524

2

3276

852

42Ph

ase

BC

urre

ntPI

Filt

erD

DM

4

Not

act

ive

in c

ase

ofD

C m

otor

(B a

xis)

PWM

A

PWM

C

-+-

+

i A i BC

urre

nt F

eedb

acks

- -N

ot a

ctiv

e in

cas

e of

DC

mot

or (B

axi

s)

VEL_

FV=

Gea

r Rat

io x

VEL

_FP

Pos

ition

Fee

dbac

kVe

loci

ty F

eedb

ack

Gea

r Rat

io =

FIGURE 7-2 SPiiPlus PCI-DDM4 Control Algorithm Block Diagram (Dual Loop)

7-4 CONTROL LOOPS


Desired Velocity

Position Error

Velocity Feed Forward

++

Position Gain

VEL_FP

Velocity CommandPOS_GA ×××× 2-GF

FIGURE 7-3 Position Loop Block Diagram

INPUTSOF_A

Z1

Z1

SOF_C

2××××SOF_B+ +-

OUTPUT

Delay

Delay

FIGURE 7-4 Velocity Low Pass Filter Block Diagram

CONTROL LOOPS 7-5


VEL_GA×××× 2-10

INPUT

Z1

IntegratorGain

ProportionalGain

Anti-Windup

++

INT_GA ×××× 28

+ +

OUTPUT

Delay

FRICTIONInitial value

FIGURE 7-5 Velocity PI Filter Block Diagram

INPUT

+-

+

Z1

Z1

NOTCH_B0

2××××NOTCH_B1

NOTCH_B2

Z1

Z1

NOTCH_A2

2××××NOTCH_B1+ +-

OUTPUT

Delay

DelayDelay

Delay

FIGURE 7-6 Velocity Notch Filter Block Diagram

I_KPINPUT

Z1

IntegratorGain

ProportionalGain

Anti-Windup

++ + +

OUTPUT

Delay

I_KI

Bus Limit

FIGURE 7-7 Current PI Filter Block Diagram

7-6 CONTROL LOOPS


7.2. Position Loop The position filter consists of a pure proportional gain (FIGURE 7-3), which is set by the high-level parameter SLPKP. The corresponding low-level parameters are the proportional gain POS_GA and the gain factor GF, which is set to 12.

The parameter SLPKP is normalized to be approximately equal to the crossover frequency [rad/sec] of the position loop. This is under the assumption that the crossover frequency of the velocity loop is at least twice.

NOTE

If all the servo-loops are well tuned, the bandwidth of the position loop is approximately equal to SLPKP/2π.

The relations between high-level and low-level parameters are:

20000VEL_FP 2 SLPKP POS_GA

2POS_GA2POS_GA gainFilter 12

-12-GF

××=

×=×=

The filter output is added to the velocity feed forward term, which is the desired velocity multiplied by the velocity feed forward gain, VEL_FP. The latter is a low-level parameter that is indirectly set by the maximum velocity parameter XVEL:

If XVEL <= 2000000 [counts/sec] VEL_FP = 20000 else:

XVEL

200002 VEL_FP 21 ×

=

TABLE 7-1 Position Loop Parameters

Servo parameter

Low level (DSP)

parameter

High level servo

parameter

DSP address Primary Axes

(X,Y,Z,T)

DSP address Secondary Axes

(A,B,C,D)

Position gain POS_GA SLPKP 0x0 0xa

Gain factor GF 0x1 0xb

Velocity feed forward

VEL_FP Depends on XVEL

0x8 0x12

CONTROL LOOPS 7-7


7.3. Velocity Loop The velocity control algorithm consists of the following:

• Velocity low pass filter (FIGURE 7-4)

• Velocity Proportional-integral (PI) filter with friction compensation (FIGURE 7-5)

• Notch filter (FIGURE 7-6)

Feedback velocity is multiplied by the velocity scale factor, indicated by the low-level parameter VEL_FV (address 0x18 for primary axes and 0x2b for secondary axes).

In case of single loop, this parameter equals the velocity feed forward gain VEL_FP.

FPVELSLVRATFVVEL __ ×=

In case of dual loop, it should be further multiplied by the gear ratio SLVRAT:

FPVELSLVRATFVVEL __ ×=

FeedbackVelocityFeedbackPostionSLVRAT =

7.4. Velocity Low Pass Filter The low pass filter is a second order filter with damping factor of 707.0=ξ and a bandwidth

nω [rad/sec]. The high level parameter SLVSOF equals the bandwidth in [Hz]:

][2

HzF nn π

ω=

For many systems, the bandwidth value should be set around 500 - 1000[Hz].

The filter continuous transfer function:

2nn

2

2n

s2s)s(H

ω+ξω+ω

=

7-8 CONTROL LOOPS


The filter discrete transfer function is based on the backward transformation (“Digital Control of Dynamic Systems”, G.F. Franklin, J.D. Powell and M.L. Workman, Addison-Wesley, 1990):

s

1

Tz1s−−

← :

( )( ) ( )212

2

2112)(

snnsn

sn

TTzTzT

zHωξωξω

ω++++−

=−−

Where sT is the sampling time (50 µS).

The filter is implemented using the following parameters: SOF_A, SOF_B and SOF_C, as shown in FIGURE 7-4. These are calculated according to the following formulas:

A

AT

ATTTA

. T

sn

sn

snsn

s

24

24

242

2

2SOF_C

2)707.01(SOF_B

)/2()(SOF_A

)(41.11

sec000050

=

×+=

×=

++=

=

ω

ω

ωω

Example:

12688708SOF_C14483963SOF_B508155SOF_A

:637

==== Hz Fn For

NOTE

The second order low-pass filter can be bypassed by setting bit-15 of the variable MFLAGS.

CONTROL LOOPS 7-9


TABLE 7-2 Velocity Second-Order Low-Pass Filter Parameters

Servo parameter

Low level (DSP)

parameter

High level servo

parameter


(X,Y,Z,T)


(A,B,C,D)

Low pass filter bandwidth

SLVSOF

Filter parameter SOF_A 0x5 0xf

Filter parameter SOF_B 0x6 0x10

Filter parameter SOF_C 0x7 0x11

7.5. Velocity Loop Proportional-Integral (PI) Filter The continuous transfer function of the velocity loop proportional-integral (PI) filter is given by:

+=

sKKsH I

v 1)(

Where vK and IK are the proportional and integral gains respectively. These are represented by the high level parameters SLVKP and SLVKI, or the low-level parameters VEL_GA and INT_GA respectively. ( )SLVKIGAINTSLVKPGAVEL == _,_

The bode plot of the filter is shown in FIGURE 7-8. It can be seen that its zero is determined by IK , while its high-frequency gain by vK .

210SLVKP

H(s)

SLIKI20

[Hz]

FIGURE 7-8 Bode Plot of Velocity PI Filter

7-10 CONTROL LOOPS


The filter discrete transfer function is based on the backward transformation:

s

1

Tz1s−−

←

−+= −11

1)(zTKKzH sI

v

Filter implementation is shown in FIGURE 7-5. An anti-windup mechanism limits the output of the integrator. Integrator limit is given in percentage by the high-level parameter SLVLI. The corresponding low-level parameter is INT_L. The relation between the two parameters is:

1002SLVLIINT_L

15

=

Where 152 corresponds to full command at the output of the velocity filter.

Output of the filer is multiplied by a scaling factor of 102− .

The high-level parameter SLFRC, given in percentage, sets the initial value of the integrator, when the motion-profile starts (range is 0 to 50%).

Generally, SLFRC should be set to zero. For high friction load, increasing SLFRC shortens the start motion delay by compensating for the friction torque or force. The corresponding low-level parameter is FRICTION. The relation between the two parameters is:

1002SLFRCFRICTION

15

=

TABLE 7-3 Velocity Loop PI Filter Parameters

Servo parameter

Low level (DSP)

parameter

High level servo

parameter


(X,Y,Z,T)


(A,B,C,D)

Velocity Proportional Gain

VEL_GA SLVKP 0x2 0xc

Velocity Integral Gain

INT_GA SLVKI 0x3 0xd

Velocity Integrator Limit

INT_L SLVLI 0x4 0xe

Friction Number

FRICTION SLFRC 0x18d 0x18e

CONTROL LOOPS 7-11


NOTE

It is recommended that the bandwidth of the velocity loop be approximately equal to SLVKI/20.

7.6. Velocity Loop Notch-Filter The notch-filter can be added to the velocity loop before the second-order filter by setting bit-14 of the variable MFLAGS.

The continuous transfer function of the notch filter is given by:

22

20

2

22

)(nnp

nn

sssssH

ωωξωωξ

++++

=

Where:

nω - the notch frequency [rad/sec], given by the high-level parameter SLVNFRQ in [Hz].

0ξ - the zero damping factor

pξ - the pole damping factor

Define:

0ξξ pA = - Attenuation of the notch frequency, given by the high-level parameter SLVNATT.

021ξ

=Q - Quality factor

Thus, the transfer function can be expressed as:

22

22

)(n

n

nn

sQ

As

sQ

ssH

ωω

ωω

++

++=

The width (W) of the notch can be calculated using the formula:

Qf

W n= , given by the high-level parameter SLVNWID in [Hz].

The DC gain of the notch is equal to 1.

7-12 CONTROL LOOPS


The filter discrete transfer function is based on the bilinear transformation:

1

1

s z1z1

T2s −

−

+−

×← :

22

11

22

110

212

)( −−

−−

++++

=zazazbzbbzH

CONTROL LOOPS 7-13


Where the discrete coefficients 1210 ,,, abbb and 2a are fractions, given by the following formulas:

4T2T

4T2Ta

4T2T

4T2Tb

4T2T

4Tb

4T2T

4T2Tb

sn2s

2

sn2s

2

2

11

sn2s

2

sn2s

2

2

sn2s

2

2s

2

1

sn2s

2

sn2s

2

0

+⋅⋅

+⋅

+⋅⋅

−⋅=

=

+⋅⋅

+⋅

+⋅

−⋅=

+⋅⋅

+⋅

−⋅=

+⋅⋅

+⋅

+⋅

+⋅=

QA

QA

baQ

AQ

QA

QA

Q

n

n

n

n

n

n

n

n

ωω

ωω

ωω

ωω

ωω

ω

ωω

ωω

The discrete filter is implemented by the low-level parameters NOTCH_B0, NOTCH_B1, NOTCH B2 and NOTCH A2, as shown in FIGURE 7-7. These are given by:

242

242

241

240

2NOTCH_A22NOTCH_B22NOTCH_B1

2NOTCH_B0

⋅=

⋅=

⋅−=

⋅=

abb

b

TABLE 7-4 Velocity Notch Filter Parameters

Servo parameter

Low level (DSP)

parameter

High level servo

parameter


(X,Y,Z,T)


(A,B,C,D)

Notch Frequency SLVNFRQ

Notch Width SLVNWID

Notch Attenuation SLVNATT

7-14 CONTROL LOOPS


Servo parameter

Low level (DSP)

parameter

High level servo

parameter


(X,Y,Z,T)


(A,B,C,D)

NOTCH_B0 0x14 0x19

NOTCH_B1 0x15 0x1a

NOTCH_B2 0x16 0x1b

NOTCH_A2 0x17 0x1c

7.7. Current Command and Commutation The total current (torque) command is a sum of the following terms:

• Output of velocity loop

• Acceleration feed forward term, which is the derivative of the desired velocity multiplied by the acceleration feed forward gain. The latter is given by the high-level parameter SLAFF or the corresponding low-level parameter ACC_FF (address 0x9 for primary axes or 0x13 for secondary axes).

• A constant command, given by the high level parameter DCOM, may be added as well.

Total command is limited by the current-limits as defined by the user for motion and idle conditions.

In case of Brushless motors, a vector (field oriented) control algorithm is used to generate two sinusoidal commands that ensure perpendicularity between the field and current vectors.

A phase advance feature improves the torque-velocity characteristics at high speed. At high speed, the actual current lags behind the command. As a result, the motor either needs more current to produce the required torque, or cannot produce the torque at all. Phase advance is proportional to speed. Its gain is defined by the high-level parameter SLCPA, which specifies the required phase advance in degrees at maximum velocity XVEL.

7.8. Current Loop A single current filter is used in case of a DC motor, while two current filters are used in case of DC brushless motor.

The current filter is a proportional-integral (PI) filter. Transfer function and implementation is very similar to the velocity PI filter (FIGURE 7-7).

Inputs of the filter are scaled, so the number 5242 refers to full command or peak current.

The proportional and integral gains are represented by the high level parameters SLIKP and SLIKI, or the low-level parameters I_KP and I_KI respectively.

CONTROL LOOPS 7-15


( )SLIKIKI_I,SLIKPKP_I ==

An anti-windup mechanism limits the output of the integrator by the low-level parameter BUS_LIMIT. The total filter output is limited as well by the same value. The default value of BUS_LIMIT is 1320, as the maximum PWM command is 1500.

TABLE 7-5 Velocity Notch Filter Parameters

Servo parameter

Low level (DSP)

parameter

High level servo

parameter


(X,Y,Z,T)


(A,B,C,D)

Current Proportional Gain

I_KP SLIKP 0x27 0x29

Current Integral Gain

I_KP SLIKI 0x28 0x2a

Current Filter Limit

BUS_LIMIT SLVNATT 0x13b 0x13b

WARRANTY 8-1


8. WARRANTY

ACS-Tech80 warrants that its products are free from defects in materials and workmanship under normal use during the warranty period. The warranty period is one (1) year from receipt by the end user. This warranty does not apply to any product from which the serial number has been removed or destroyed, or damage as a result of accident, fire, misuse, abuse, negligence, operation outside the usage parameters, unauthorized modifications, or acts of G-d.

ACS-Tech80 is not liable for any damages (material, financial, or physical) caused by the products or the failure of the products to perform. These limits of liability shall including, but not limited to: any lost profits, lost savings, lost earnings, loss of programs or other data, business interruption, incidental damages, consequential damages or personal injury.

These limitations apply whether damages are sought, or a claim made, under this warranty or as a tort claim (including negligence and strict product liability), or any other claim. These limitations of liability will be effective even if you have advised ACS-Tech80 of the possibility of any such damages.

ACS-Tech80 makes no other warranties, expressed or implied, including any implied warranties of merchantability or fitness of any product for a particular purpose. ACS-Tech80 expressly disclaims all warranties not stated in this warranty. ACS-Tech80 reserves the right to make change to this warranty without notice.

INDEX I -1


INDEX

A

A-axis encoder output, 4-12

additional dedicated outputs, 4-14, 4-16

additional functions output connector, 4-13

amplifier interface connector, 4-7

analog I/O connector, 4-4

auxiliary communication specification, 3-6

axes specification, 3-3

B

brush motor, 5-2

brushless motor, 5-1

C

cable length, 2-3

COM ports, 6-5

communications, 1-2, 6-1

control loops, 7-1

controller specification, 3-6

current command & commutation, 7-14

current loop, 7-14

D

digital I/O connector, 4-4

digital outputs connector, 4-10

drive interface connector, 4-7

drive interface specification, 3-4

E

electrical separation, 2-2

electromagnetic compatibility, 2-2

EMC, 2-2

emergency stop, 2-1

emergency stop input, 4-6

emergency stop specification, 3-5

encoder connector, 4-4

ethernet network communication, 6-9

ethernet point-to-point connection, 6-12

external power supply connector, 4-3

F

features, 3-1

G

general wiring, 2-2

H

high-speed synchronous serial interface, 3-6

HSSI description and timing, 4-17

I -2 INDEX


HSSI output connector, 4-13, 4-14, 4-16

HSSI specification, 3-6

I

I/O specification, 3-5

incremental encoder feedback, 4-6

indicator, 4-20

J

J1 HSSI output connector, 4-14

J11 external power supply connector, 4-3

J2 encoder, digital, and analog I/O connector, 4-4

J3 drive interface connector, 4-7


J5 digital and special I/O connector, 4-10


J6 Z-axis P/D drive interface connector, 4-13

J6 Z-axis P/D drive interface or HSSI output, 4-12

J7 additional functions output connector, 4-13

J8 A-axis encoder output, 4-12

J8 X, A, Y, and B raw signal limit inputs, 4-12

J8 X, A, Y, and B raw signal limit inputs or A-axis encoder output connector, 4-11

J9 JTAG connector, 4-19

JP1 Jumper, 4-19

JP2 Jumper, 4-20

L

LED, 4-20

limits, 2-1, 4-11, 4-12

limits specification, 3-5

M

mechanical dimensions specification, 3-7

mechanical structure, 4-1

motor connections, 5-1

O

over-travel protection, 2-2

P

PCI Bus connection, 6-3

PCI Bus specification, 3-6

PEG outputs connector, 4-10

physical environment specification, 3-7

position control specification, 3-3

position feedback specification, 3-4

position loop, 7-6

power cables, 2-2

power supply connector, 4-3

R

routing signal, 2-2

RS-232, 6-5

RS-422 I/O interface, 4-7

S

safety and emc guidelines, 2-1

safety specification, 3-5

serial RS-232 communication, 6-5

shielding, 2-3

simulator, 6-2

size specification, 3-7

specifications, 3-3

T

test points, 4-20

V

velocity control specification, 3-3

velocity loop, 7-7

velocity loop notch-filter, 7-11

velocity loop PI filter, 7-9

velocity low pass filter, 7-7

X

X, A, Y, and B raw signal limit inputs, 4-12

Z

Z-axis P/D drive interface connector, 4-13

spiiplus pci-ddm4 hardware and setup guide 4.00

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