INVESTIGATION AND ATTENUATION OF HARMONICS

INVESTIGATION AND ATTENUATION OF HARMONICS

ABSTRACT

INDEX

SR NO TITLEPAGE NO

1Introduction 1.1 background & introduction 1.2 objectives1.3 Need of project 2 3 3

2Harmonics & harmonic indices2.1 Basic concept2.2 Harmonic indices2.3 Sources of harmonics2.4 Effects of harmonics 4 7 8 11

3Mitigation Techniques3.1 Working of filter3.2 Mitigation methods 16 17

4System design4.1 system block diagram4.2 description 24 25

5Control strategies5.1 Reference signal estimation technique5.2 extraction & control techniques5.3 Inverter topology 28 30 35

6Circuit simulation design6.1 Non-linear load6.2 Reference signal estimator6.3 Hysteresis current controller6.4 universal bridge6.5 Final circuit simulation 37 38 39 39 40

7Output of simulation7.1 Output of generated harmonics7.2 Output of reference signal estimator7.3 Output of pulse7.4 Final output 42 43 44 44

8Advantages & Disadvantages9.1 Advantages9.2 Disadvantages9.3 Application 47 47 47

9Conclusion 49

10Reference 51

LIST OF FIGURES:

Numbers PagesFig. 2.1 Sinusoidal 60-Hz waveform and some harmonics.5Fig.2.2 Sinusoidal waveform distorted by third, fifth, and seventh harmonics.6Fig.2.3 current and voltage waveforms of linear loads..9Fig. 2.4 Non linear loads11Fig. 3.1 Using a Filter to Reduce the Effect of an Undesired Signal.16Fig.3.2 Low pass filters..17Fig.3.3 High pass filters.18Fig.3.4 Band pass filters18Fig.3.5 Band stop filters19Fig.3.6 shunt active filter alone.20Fig.3.7 Series active filter alone21Fig.3.8 Combination of shunt active and shunt passive filters...21Fig.3.9 Combination of series active and shunt passive filter22Fig.3.10 Active filter connected in series with shunt passive filter22Fig.4.1 System Block Diagram...24Fig.5.1 subdivision of reference signal estimation techniques...28Fig.5.2 Block diagram of a single feedback loop..31Fig.5.3 Block diagram of a typical control system with multiple feedback loops32

CHAPTER 1

INTRODUCTION

1.1 BACKGROUND AND INTRODUCTION1.2 NECESSITY1.3 OBJECTIVE 1.4 THEME1.5 ORGANISATION

1 INTRODUCTION

1.1 BACKGROUND AND INTRODUCTION1. 1 Introduction Inpowerdistributionnetworks,reactivepoweristhemaincauseofincreasing distribution systemlossesandvariouspower qualityproblems.Conventionally,Static VarCompensators (SVCs) have been used in conjunction with passive filters at the distribution level for reactive power compensation and mitigation of power quality problems. Though SVCs are very effectivesystem controllersused to provide reactivepowercompensationatthe transmission level, their limited bandwidth, higher passive element count that increases size and losses, and slower response make them inapt for the modern day distribution requirement. Another compensating system has been proposed by, employing a combination of SVC and active power filter, which can compensate three phase loads in a minimum of two cycles. Thus, a controller which continuously monitors the load voltages and currents to determine the right amount of compensation required by the system and the less response time should be a viable alternative. Distribution Static Compensator (DSTATCOM) has the capacity to overcome the above mentioned drawbacks by providing precise control and fast response during transient and steady state, with reduced foot print and weight. A DSTATCOM is basically a converterbased distribution flexible AC transmission controller, sharing many similar concepts with that of a Static Compensator (STATCOM) used at the transmission level. At the transmission level, STATCOM handles only fundamental reactive power and provides voltage support, while a DSTATCOM is employed at the distribution level or at the load end for dynamic compensation. The latter, DSTATCOM, can be one of the viable alternatives to SVC in a distribution network. Additionally,aDSTATCOM can alsobehaveasashuntactivefilter, toeliminate unbalance or distortions in the source current or the supply voltage, as per the IEEE-519 standard limits. Since a DSTATCOM is such a multifunctional device, the main objective of any control algorithm should be to make it flexible and easy to implement, in addition to exploiting its multi functionality to the maximum. Prior to the type of control algorithm incorporated, the choice ofconverter configurationis animportant criterion.Thetwo converter configurations arevoltage source converter or current source converter, in addition to passive storage elements, either a capacitor oraninductorrespectively. Normally,voltagesourceconverters arepreferred dueto their smaller size, less heat dissipation and less cost of the capacitor, as compared to an inductorfor the same rating. Comparative study of the control techniques or voltagesource converter based DSTATCOM, broadly classifiedintovoltagecontrol DSTATCOM and current control DSTATCOM. Under the former, phase shift control is compared with the latter, considering indirect decoupled current control and regulation ofAC bus and DC link voltage with hysteresis current control. The first two schemes havebeen successfully implemented for STATCOM control at the transmission level, for reactivepower compensation,and voltage supportand rerecentlybeingincorporatedtocontrola DSTATCOM employed at the distribution end. The following indices are considered forcomparisonmeasurementandsignalconditioning requirement, performance with varying linear/nonlinear load, total harmonic distortion (THD), DC link voltage variation and switching frequency. Thechoice ofcurrentcontrol technique, asit significantly affects the performance of a DSTATCOM. A dynamic simulation model of the DSTATCOM hasbeen developed for various control algorithms in Matlab / SimPower System environment.

1.2 NecessityThe distribution systems are faced with number of problems such as low voltage, sag, swell, Voltage Transients, unbalance low power factor and harmonics. Of these problems, particularly in respect of bulk consumers power factor maintenance and reduction in THD levels are paramount importance, hence the proposed work deals with these two aspects, which are vital for satisfactory operation.1.2.1 Demerits of existing system: The existing system uses the normal inverter that is VSI (but without the multilevel part) so the power injection is done but the harmonics remain the same, Due to the formation of harmonics the regulation of the system is low, The overall efficiency of the circuit is less compared to the proposed system.1.2.2 Merits of proposed system: The multilevel inverter is implemented so the power injected is done without harmonics, The reactive power injected is done with reduced harmonics so the efficiency of the load (motor)is good, The voltage and current regulation is good and the efficiency of the process is good.

1.3 ObjectivePower quality issues are gaining significant attention due to the increase in the number of sensitive loads. Many of these loads use equipment that is sensitive to distortions or dips in supply voltages. Almost all power quality problems originate from disturbances in the distribution networks. Regulations apply in many places, which limit the distortion and unbalance that a customer can inject to a distribution system. These regulations may require the installation of compensators (filters) on customer premises. It is also expected that a utility will supply a low distortion balanced voltage to its customers, especially those with sensitive loads. When a DSTATCOM is associated with a particular load, it can inject compensating current so that the total demand meets the specifications for utility connection. Alternatively, it can also clean up the voltage of a utility bus from any unbalance and harmonic distortion. The aim of this paper is to investigate a DSTATCOM that can perform both these tasks.

1.4 ThemeA DSTATCOM is a controlled reactive source which includes a Voltage Source Converter (VSC) and a DC link capacitor connected in shunt, capable of generating and /or absorbing reactive power. It is analogous to an ideal synchronous machine, which generates a balanced set of three sinusoidal voltages at the fundamental frequency with controllable amplitude and phase angle. This ideal machine has no inertia, gives an instantaneous response, does not alter the system impedances, and can internally generate reactive (both capacitive and inductive reactive power).

Fig.1.1. Basic structure of DSTATCOMFig.1.1 shows the basic structure of a DSTATCOM. If the output voltage of the VSC is equal to the AC terminal voltage; no reactive power is delivered to the system. If the output voltage is greater than the AC terminal voltage, the DSTATCOM is in the capacitive mode of operation and vice versa. The quantity of reactive power flow is proportional to the difference in the two voltages.It is to be noted that voltage regulation at Point of Common Coupling (PCC) and power factor correction cannot be achieved simultaneously. For a DSTATCOM used for voltage regulation at PCC the compensation should be such that the supply currents should lead the supply voltages and for power factor correction the supply current should be in phase with the supply voltages. The control algorithms studied in this paper are applied with a view to study the performance of a DSTATCOM for reactive power compensation and power factor correction.In Fig.1.1 the shunt injected current Ish corrects the voltage sag by adjusting the voltage drop across the system impedance Zth. The value of Ish can be controlled by adjusting the output voltage of the converter. The shunt injected current Ish can be written as,

(I)

(II)The complex power injection of the D-STATCOM can be expressed as,

(III)1.5 Organization

Report is organized in following manner.

Chapter 1 contains an introduction of Performance evaluation of Cascaded H-Bridge Multilevel Inverter Based DSTATCOM for Compensation of Reactive Power and Harmonics.

Chapter 2 presents literature review along with techniques of model based enhancement, optimization and process control are reviewed.

Chapter 3 presents the system development which contains the method adopted, control technique, parameter estimation and validation used in this dissertation.

Chapter 4 contains cascaded CHB multi level inverter based DSTATCOM performance analysis, MATLAB SIMULATION model result without and with DSTATCOM. Analysis of the Harmonic (THD) contains in system and by implementing DSTATCOM in system up to which level it (THD) can be suppressed.

Chapter 5 presents the concluding remarks based on present research.

CHAPTER 2

LITERATURE REVIEW

CHAPTER: 2. LITERATURE REVIEW

In the paper Design and Simulation of Cascaded H-Bridge Multilevel Inverter Based DSTATCOM for Compensation of Reactive Power and Harmonics by J. Ganesh Prasad Reddy, K. Ramesh Reddy , an investigation of five-Level Cascaded H - bridge (CHB) Inverter as Distribution Static Compensator (DSTATCOM) in Power System (PS) for compensation of reactive power and harmonics. The D-Q reference frame theory is used to generate the reference compensating currents for DSTATCOM while Proportional and Integral (PI) control is used for capacitor dc voltage regulation. A CHB Inverter is considered for shunt compensation of a 11 kV distribution system. Finally a level shifted PWM (LSPWM) and phase shifted PWM (PSPWM) techniques are adopted to investigate the performance of CHB Inverter. The results are obtained through Matlab/Simulink software package is presented. [1]

In the paper Multilevel Converters - A New breed of Power Converters by Jih-Sheng Lai, Fang Zheng Peng three recently developed multilevel voltage source converters: (1) diode-clamp, (2) flying-capacitors, and (3) cascaded inverters with separate dc sources are discussed. The operating principle, features, constraints, and potential applications of these converters will be discussed.[2]

In the paper Multilevel Inverters: A Survey of Topologies, Controls and Applications by Jose Rodriguez, Jih-Sheng Lai, the most important topologies like diode-clamped inverter (neutral-point clamped), capacitor-clamped (flying capacitor), and cascaded multi cell with separate dc sources are discussed. Emerging topologies like asymmetric hybrid cells and soft-switched multilevel inverters are also discussed. This paper also presents the most relevant control and modulation methods developed for this family of converters: multilevel sinusoidal pulse width modulation, multilevel selective harmonic elimination, and space-vector modulation. Special attention is dedicated to the latest and more relevant applications of these converters such as laminators, conveyor belts, and unified power-flow controllers. The need of an active front end at the input side for those inverters supplying regenerative loads is also discussed, and the circuit topology options are also presented. Finally, the peripherally developing areas such as high-voltage high-power devices and optical sensors and other opportunities for future development are addressed.[3]

In the paper Phase-Shifted Carrier PWM Technique for General Cascaded Inverters by Roozbeh Naderi and Abdolreza Rahmati ,a modified PSC technique based on partly shifted carriers for all disposition types including phase disposition (PD) which is suitable for three-phase cascaded inverters are propoesd. Simulation results are also included for PSCPD using carrier-based space-vector PWM (SVPWM).[4]

In the paper Generalized Structure of a Multilevel PWM Inverter by Pradeep M. Bhagwat and V. R. Stefanovic, A generalized structure of a multilevel voltage source thyristor inverter is proposed. The multilevel concept is used to decrease the harmonic distortion in the output waveform without decreasing the inverter power output. A simple uniform PWM control of the output voltage is seen to be sufficient to practically remove all remaining harmonics. Harmonic analysis of n-step waveform is given, and the experimental results obtained on a three-step inverter are presented.[5]

In the paper New Cascaded H-Bridge Multilevel Inverter with Improved Efficiency by Gobinath.K, Mahendran.S, Gnanambal.I focuses on improving the efficiency of the multilevel inverter and quality of output voltage waveform. Seven level reduced switches topology has been implemented with only seven switches. Fundamental Switching scheme and Selective Harmonics Elimination were implemented to reduce the Total Harmonics Distortion (THD) value. Selective Harmonics Elimination Stepped Waveform (SHESW) method is implemented to eliminate the lower order harmonics. Fundamental switching scheme is used to control the power electronics switches in the inverter. The proposed topology is suitable for any number of levels. The harmonic reduction is achieved by selecting appropriate switching angles. It shows hope to reduce initial cost and complexity hence it is apt for industrial applications. In this paper third and fifth level harmonics have been eliminated. Simulation work is done using the MATLAB software and experimental results have been presented to validate the theory. [6]

In the paper Level shifted PWM for Cascaded Multilevel inverters with Even Power Distribution by Mauricio Angulo, Pablo Lezana, Samir Kouro, Jose Rodrguez and Bin Wu ,the modified PD-PWM technique, that combines the benefits of both modulation methods, achieving good output voltage and input current quality are presented.[7]

In the paper Simulation and Analysis of Controllers of DSTATCOM for Power Quality Improvement by Gunjan Varshney the power quality improvement in the form of Power Factor Correction, Harmonic reduction and reactive power compensation using DSTATCOM and simultaneously Simulink models is presented. The DSTATCOM injects a current into the system to mitigate the problems associated with power quality specially in the case of load unbalancing. Also the reference signals generation technique Instantaneous reactive power method and synchronous reference frame theory is discussed.[8]

In the paper Five-Level Cascaded Shunt Active Power Filter for Power Quality Improvement by N. Mesbahi, A. Ouari , a three-phase, five-level cascaded shunt active power filter (APF) based on a five-level voltage inverter is presented. This filter is proposed to improve the power quality by eliminate harmonic currents generated by nonlinear load. For sending pulses to the APF gates, we employed the carrier-based PWM strategy and the algorithm of the instantaneous powers real and imaginary is used to determine the current reference signals. Complete simulation of the system validates efficiency of the control law.[9]

In the paper DSTATCOM based five level cascade H-Bridge multilevel inverter for power quality improvement by A. Boudaghi B. Tousi, the design of a DSTATCOM employing a Cascade H-Bridge Multilevel Inverter (CHBMLI) in a medium voltage distribution power system is presented. The phase shifted PWM technique is used to generate firing angles to CHB inverter switches. In this study, the proposed controller in DSTATCOM structure in order to power quality improvement based proportional integral (PI) controllers and p-q coordinates. Simulation result prepared by the help of Matlab/Simulink software. The Simulink results will be presented to verify the performance of the proposed multilevel DSTATCOM.[10]

CHAPTER 3

MITIGATION TECHNIQUES

1.1 WORKING OF FILTER 3.2 MITIGATION METHODS

CHAPTER: 3. SYSTEM DEVELOPMENT3.1 Multilevel Power Converters3.1.1. Introduction Numerous industrial applications have begun to require higher power apparatus in recent years. Some medium voltage motor drives and utility applications require medium voltage and megawatt power level. For a medium voltage grid, it is troublesome to connect only one power semiconductor switch directly. As a result, a multilevel power converter structure has been introduced as an alternative in high power and medium voltage situations. A multilevel converter not only achieves high power ratings, but also enables the use of renewable energy sources. Renewable energy sources such as photovoltaic, wind, and fuel cells can be easily interfaced to a multilevel converter system for a high power application. The concept of multilevel converters has been introduced since 1975. The term multilevel began with the three-level converter. Subsequently, several multilevel converter topologies have been developed. However, the elementary concept of a multilevel converter to achieve higher power is to use a series of power semiconductor switches with several lower voltage dc sources to perform the power conversion by synthesizing a staircase Voltage waveform. Capacitors, batteries, and renewable energy voltage sources can be used as the multiple dc voltage sources. The commutation of the power switches aggregate these multiple dc sources in order to achieve high voltage at the output; however, the rated voltage of the power semiconductor switches depends only upon the rating of the dc voltage sources to which they are connected. A multilevel converter has several advantages over a conventional two-level converter that uses high switching frequency pulse width modulation (PWM). The attractive features of a multilevel converter can be briefly summarized as follows. Staircase waveform quality: Multilevel converters not only can generate the output voltages with very low distortion, but also can reduce the dv/dt stresses; therefore electromagnetic compatibility (EMC) problems can be reduced. Common-mode (CM) voltage: Multilevel converters produce smaller CM voltage; therefore, the stress in the bearings of a motor connected to a multilevel motor drive can be reduced. Furthermore, CM voltage can be eliminated by using advanced modulation strategies such as that proposed. Input current: Multilevel converters can draw input current with low distortion. Switching frequency: Multilevel converters can operate at both fundamental switching frequency and high switching frequency PWM. It should be noted that lower switching frequency usually means lower switching loss and higher efficiency.Unfortunately, multilevel converters do have some disadvantages. One particular disadvantage is the greater number of power semiconductor switches needed. Although lower voltage rated switches can be utilized in a multilevel converter, each switch requires a related gate drive circuit. This may cause the overall system to be more expensive and complex. Plentiful multilevel converter topologies have been proposed during the last two decades. Contemporary research has engaged novel converter topologies and unique modulation schemes. Moreover, three different major multilevel converter structures have been reported in the literature: cascaded H-bridges converter with separate dc sources, diode clamped (neutral clamped), and flying capacitors (capacitor clamped). Moreover, abundant modulation techniques and control paradigms have been developed for multilevel converters such as sinusoidal pulse width modulation (SPWM), selective harmonic elimination (SHE-PWM), space vector modulation (SVM), and others. In addition, many multilevel converter applications focus on industrial medium-voltage motor drives, utility interface for renewable energy systems, flexible AC transmission system (FACTS), and traction drive systems. This chapter reviews state of the art of multilevel power converter technology. Fundamental multilevel converter structures and modulation paradigms are discussed including the pros and cons of each technique. Particular concentration is addressed in modern and more practical industrial applications of multilevel converters. A procedure for calculating the required ratings for the active switches, clamping diodes, and dc link capacitors including a design example are described. Finally, the possible future developments of multilevel converter technology are noted.

3.2 Multilevel power converter structures As previously mentioned, three different major multilevel converter structures have been applied in industrial applications: cascaded H-bridges converter with separate dc sources, diode clamped, and flying capacitors. Before continuing discussion in this topic, it should be noted that the term multilevel converter is utilized to refer to a power electronic circuit that could operate in an inverter or rectifier mode. The multilevel inverter structures are the focus of in this chapter; however, the illustrated structures can be implemented for rectifying operation as well.

3.2.1 Cascaded H-Bridges A single-phase structure of an m-level cascaded inverter is illustrated in Figure 3.1. Each separate dc source (SDCS) is connected to a single-phase full-bridge, or H-bridge, inverter. Each inverter level can generate three different voltage outputs, +Vdc, 0, and Vdc by connecting the dc source to the ac output by different combinations of the four switches, S1, S2, S3, and S4. To obtain +Vdc, switches S1 and S4 are turned on, whereas Vdc can be obtained by turning on switches S2 and S3. By turning on S1 and S2 or S3 and S4, the output voltage is 0. The ac outputs of each of the different full-bridge inverter levels are connected in series such that the synthesized voltage waveform is the sum of the inverter outputs. The number of output phase voltage levels m in a cascade inverter is defined by m = 2s+1, where s is the number of separate dc sources. An example phase voltage waveform for an 11-level cascaded H-bridge inverter with 5 SDCSs and 5 full bridges. The phase voltage van = va1 + va2 + va3 + va4 + va5. For a stepped waveform such as the one depicted in Figure 31.2 with s steps, the Fourier Transform for this waveform:

Fig.3.1. Multi-Level Inverter3.3. Design of CHB Multilevel Based DSTATCOM3.3.1 Principle of DSTATCOMA DSTATCOM is a controlled reactive source which includes a Voltage Source Converter (VSC) and a DC link capacitor connected in shunt, capable of generating and /or absorbing reactive power. It is analogous to an ideal synchronous machine, which generates a balanced set of three sinusoidal voltages at the fundamental frequency with controllable amplitude and phase angle. This ideal machine has no inertia, gives an instantaneous response, does not alter the system impedances, and can internally generate reactive (both capacitive and inductive reactive power) [4].

Fig.3.2. Basic structure of DSTATCOMFig.3.2 shows the basic structure of a DSTATCOM. If the output voltage of the VSC is equal to the AC terminal voltage; no reactive power is delivered to the system. If the output voltage is greater than the AC terminal voltage, the DSTATCOM is in the capacitive mode of operation and vice versa. The quantity of reactive power flow is proportional to the difference in the two voltages.It is to be noted that voltage regulation at Point of Common Coupling (PCC) and power factor correction cannot be achieved simultaneously [5]. For a DSTATCOM used for voltage regulation at PCC the compensation should be such that the supply currents should lead the supply voltages and for power factor correction the supply current should be in phase with the supply voltages. The control algorithms studied in this paper are applied with a view to study the performance of a DSTATCOM for reactive power compensation and power factor correction.In Fig.3.2 the shunt injected current Ish corrects the voltage sag by adjusting the voltage drop across the system impedance Zth. The value of Ish can be controlled by adjusting the output voltage of the converter. The shunt injected current Ish can be written as,

(I)

(II)The complex power injection of the D-STATCOM can be expressed as,

(III)

3.3.2 Control for reactive power compensation

A static compensator (STATCOM) is a device that can provide reactive support to a bus. It consists of voltage sourced converters connected to an energy storage device on one side and to the power system on the other. In this paper the conventional method of PI control is compared and contrasted with various feedback control strategy.

Fig.3.3 PI control for reactive power compensationIn this type of inverters, the fundamental component of the inverter output voltage is proportional to the DC bus voltage. So, the control objective is to regulate Vdc as per requirement. Also, the phase angle should be maintained so that the AC generated voltage is in phase with the bus voltage. The schematic diagram of the control circuit is shown in Fig.3.3.

Fig.3.4 Digital controller of the single-phase H-bridge inverter

The controller of the stand-alone inverter is a cascaded linear controller composed of an internal current control loop and an external voltage control loop with duty-ratio feed forward (kff = 1), as is shown in Fig.3.4. The ideally sampled output voltage and inductor current are represented by and, respectively. A proportional feedback controller is used in the internal loop with the gain of kc, while a proportional plus resonant controller is applied to the external voltage loop. The compensator of the voltage control loop is, where Hk (z) is the digitalized band-pass filter resonating at kth odd harmonic frequency. The ideally calculated (without delay) digital duty-ratio is x*, which is updated into the PWM controller with a DSP delay period (analog-to-digital conversion delay and computation delay).

3.3.3 Control for Harmonics Mitigation

The speed of reference frame is varies due to harmonics present in system and for mitigation of harmonics this technique is used. In this scheme synchronous reference frame (SRF) is used which convert three component (a,b,c) into two component(d,q). The voltages V(a,b,c) and the load currents iL (a,b,c) in terms of - components is calculated as per equation by (IV), where K is Clarke Transformation Matrix.

(IV)

(V)Where -is the instantaneous voltage vector angle (V) which is calculated with help of system voltages.

Fig.3.5 Block diagram of SRF methodThe SRF based conversion is shown in Fig3.5, where unbalanced load current IL(a,b,c) is converted into Idq component it converted back into balanced current component ic(a,b,c) shown in equation (VIII).

(VI)

(VII)

(VIII)

3.3.4 Cascaded H-Bridge Multilevel Inverter

Here in Fig.3.6 Cascaded H-Bridge Inverter is shown which consists of two H-Bridge is connected together in series. This configuration provides five level voltage (named as +2V, V, 0V, -V, -2V).

Fig.3.6 one phase single diagram of 5-level CHB inverter

Fig.3.7 SIMULINK model of one phase single diagram of 5-level CHB inverterOperation of Cascaded H-Bridge Multilevel Inverter is based on the switching of different combination of IGBT switches. Here we get the five level of voltage shown in Fig.3.7 and switching scheme is given in table 1.

Table-3.1:- Switching table for 5-level CHB InverterSwitches Turn On(Upper Bridge)Switches Turn On(Lower Bridge)Voltage Level

S1, S4--Vdc

S1,S4S1,S42Vdc

S2, S4S2, S40

S3,S2---Vdc

S3,S2S3,S2-2Vdc

Fig.3.8 Output voltage waveform of 5 level CHB Inverter

3.3.5 PWM Techniques for CHB Inverter

Frequently used PWM techniques for CHB inverter area. Level Shifted Carrier PWM (LSCPWM)b. Phase Shifted Carrier PWM (PSCPWM)

3.3.5.1 Level Shifted Carrier PWM (LSCPWM)

Fig. 3.9 Level shifted carrier PWMFig.3.9. Multilevel carrier-based PWM showing carrier bands, modulation waveform, and inverter output waveform (m = 6, mf = 21, ma = 0.8). multilevel inverters by making the use of several triangular carrier signals and one reference signal per phase. For an m-level inverter, m-1 carriers with the same frequency fc and same peak-to-peak amplitude Ac are disposed such that the bands they occupy are contiguous. The reference, or modulation, waveform has peak-to-peak amplitude Am and frequency fm, and it is centered in the middle of the carrier set. The reference is continuously compared with each of the carrier signals. If the reference is greater than a carrier signal, then the active device corresponding to that carrier is switched on; and if the reference is less than a carrier signal, then the active device corresponding to that carrier is switched off. In multilevel inverters, the amplitude modulation index, ma, and the frequency ratio, mf, are defined as

IX

XCarrara also considered different methods of disposing the many carrier bands required in multilevel PWM. The three cases he considered for an inverter with an odd number of levels were as follows:1. Alternative phase opposition disposition where each carrier band is shifted by 180 degrees from the adjacent bands.2. Phase opposition disposition where the carriers above the zero reference are in phase but shifted by 180 degrees from those carriers below the zero reference. 3. In phase disposition where all the carriers are in phase.Fig. 8 shows a set of carriers (mf = 21) with all of the carriers in phase for a 5-level diode-clamped inverter and a sinusoidal reference voltage with a modulation index of 0.8.

CHAPTER 4

SYSTEM DESIGN

4.1 SYSTEM BLOCK DIAGRAM4.2 DESCRIPTION

CHAPTER 6

CIRCUIT SIMULATION

6.1 NON-LINEAR LOAD6.2 REFERANCE SIGNAL ESTIMATOR6.3 HYSERESIS CURRENT CONTROLLER6.4 UNIVERSAL BRIDGE6.5 FINAL CURCUIT SIMULATION

6. CIRCUIT SIMULATION

SIMULINK model of DSTATCOM is shown in Fig.4.1 It having the blocks is source block, control block, APF block, non linear load block and measurements block. The system parameters for simulation study are source voltage of 11kv, 50 Hz AC supply, Source resistance of 0.1 ohm and inductance of 0.9 mH, Inverter series inductance 1642e-6 H, DC bus capacitance 10e-6 F, Load resistance and inductance are chosen as 60 ohms and 30mH respectively.

6.1 POWER SYSTAM UNDER STUDY WITH NONLINER LOAD(HARMONICS GENERATION) AND WITHOUT DSTATCOM-

6.2 REFERANCE SIGNAL ESTIMATOR

CHAPTER 7

OUTPUT OF SIMULATION

7.1 0/P OF GENERATED HARMONICS7.2 O/P OF REFERANCE SIGNAL ESTIMATOR7.3 O/P OF PULSE7.4 FINAL O/P

1SIMULINK Results

(A)Results Obtained Without DSTATCOM

Figure 5: Basic uncompensated power system under study with a nonlinear load

Fig 6. Shows Source voltage, current and load current without DSTATCOM. It seems that load current and source current both are same and nonsinusoidal without DSTATCOM.

Figure 6: Source voltage, current and load current without DSTATCOM

Fig7. Shows Harmonic spectrum of Phase-A Source current without DSTATCOM. The THD of source current without DSTATCOM is 28.25%.

Figure 7: Harmonic spectrum of Phase-A Source current without DSTATCOM

(B) Results Obtained with DSTATCOM

Figure 8: Simulink model of power system under study compensated with multilevel CHB based inverter with LSPWM using SRF based method.

1) Results of Three Level CHB inverter based DSTATCOM.Fig9.shows Phase A voltage of Three level output of LSPWM inverter.

Figure 9:Three level output of inverterFig10. Shows Source voltage, current and load current with three level CHB inverter with LSPWM based DSTATCOM using SRF.With the help of DSTATCOM source current becomes sinusoidal although load current is nonsinusoidal.

Figure 10: Source voltage, current and load current with three level CHB inverter with LSPWM based DSTATCOM using SRF

Fig11.shows Harmonic spectrum analysis of Phase-A Source current with three level CHB inverter with PSPWM based DSTATCOM using SRF.The THD of source current with DSTATCOM is 4.73%.

1cell Figure 11: Harmonic spectrum analysis of Phase-A Source current with three level CHB inverter with PSPWM based DSTATCOM using SRF

2) Results of Five Level CHB inverter based DSTATCOMFig12.shows Phase A voltage of Five level output of LSPWM inverter

Figure 12:Five level output of inverter.

Fig10. Shows Source voltage, current and load current with three level CHB inverter with LSPWM based DSTATCOM using SRF.With the help of DSTATCOM source current becomes more sinusoidal as compare to DSTATCOM with three level inverter.

Figure 13: Source voltage, current and load current with five level CHB inverter with LSPWM based DSTATCOM using SRF

Fig 14 shows Harmonic spectrum analysis of Phase-A Source current with five level CHB inverter with PSPWM based DSTATCOM using SRF.The THD of source current with five level inverter is 4.68%.

Figure 14: Harmonic spectrum analysis of Phase-A Source current with five level CHB inverter with PSPWM based DSTATCOM using SRFFig15.shows that source current and voltage both are in phase so power factor is unity.

Figure 15: Phase A source voltage and currentFig16.shows DC voltage is regulated to 11KV

Figure 16: DC bus voltage.

CHAPTER 9 CONCLUSION

Conclusion

CHAPTER: 5. CONCLUSION

5.1. Conclusion

An approach to built and evaluate its performance DSTATCOM with five level CHB inverter is presented in this paper. Multilevel CHB based converter has been completely analyzed and simulated. Hardware models have been built and tested to verify the concept. The source current, source voltage, source current, source voltage, power factor simulation results under nonlinear sources are presented. Using multilevel converters not only eliminate the specific harmonics but also to minimize the total harmonic distortion. By using 5-level CHB based DSTATCOM harmonics is suppressed to 9.73% from 20.22% THD in source current. Both simulation and experimental results prove that these multilevel inverters are very promising for power system applications.

5.2. Future Scope We can increase the no of level of output from 5 to 7,9,11... By increasing the no of levels Harmonics can be suppressed further. THD can be improved for 7 Level- THD=24.95%5.3 Applications Power systems (substation, generating station and distribution station). Industrial application.

CHAPTER 10

REFERANCES

REFERENCES[1] J. Ganesh Prasad Reddy, K. Ramesh Reddy, Design and Simulation of Cascaded H-Bridge Multilevel Inverter Based DSTATCOM for Compensation of Reactive Power and Harmonics 1st Intl Conf. on Recent Advances in Information Technology [ RAIT-2012][2] J. S. Lai and F. Z. Peng "Multilevel converters A new breed of converters, IEEE Trans. Ind. Appli., vol.32, no.3. pp. 509-514. May/Jun. 1996.

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ACKNOWLEDGMENT

I wish to express my sincere thanks and deep sense of gratitude towards my guide Prof. Bavadhane V. D. for his guidance, valuable suggestions and constant encouragement in all phases.

I am highly indebted to him for his help in solving my difficulties, which came across during whole project work on Performance evaluation of Cascaded H-Bridge Multilevel Inverter Based DSTATCOM for Compensation of Reactive Power and Harmonics

Finally I extend my sincere thanks to respected Principal & Head of Electrical Engineering Department and all staff members for their kind support and encouragement.

Last but not least, I wish to thank my friends for their unconditional love and support.

Miss. Sneha SakundeM. E. (Electrical Power System)

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