ssp v1.4.0 release note - renesas electronics · 2018. 7. 28. · renesas synergy™ platform ssp...

Rev.1.03 May 2018

Renesas Synergy™ Platform Synergy Software Synergy Software Package

User’s M

anual

www.renesas.com

All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the latest information published by Renesas Electronics Corp. through various means, including the Renesas Electronics Corp. website (http://www.renesas.com).

SSP v1.4.0

Release Note

Release N

ote

Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of

semiconductor products and application examples. You are fully responsible for the incorporation or any other use of the circuits, software, and information in the design of your product or system. Renesas Electronics disclaims any and all liability for any losses and damages incurred by you or third parties arising from the use of these circuits, software, or information.

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9. Renesas Electronics products and technologies shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. You shall comply with any applicable export control laws and regulations promulgated and administered by the governments of any countries asserting jurisdiction over the parties or transactions.

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(Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its directly or indirectly controlled subsidiaries.

(Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics. (Rev.4.0-1 November 2017)

Release Note

R11UT0031EU0103 Rev.1.03 Page 1 of 32 May 1, 2018

Renesas Synergy™ Platform

SSP v1.4.0 Release Note Contents

1. Introduction .............................................................................................................................. 4

2. Release information ................................................................................................................. 4

3. Synergy MCU groups supported .............................................................................................. 4

4. Software Tools and Hardware Kits supported with this SSP release ........................................ 4 4.1 Version Information for Express Logic, Inc. ............................................................................................ 5

5. SSP release package and installation information ................................................................... 5

6. Changes from SSP v1.3.3 to SSP v1.4.0 release .................................................................... 8 6.1 New or updated features ......................................................................................................................... 8 6.1.1 SNMP ................................................................................................................................................ 8 6.1.2 r_sci_uart Abort ..................................................................................................................................... 8 6.1.3 RIIC Multi-Master Mode ........................................................................................................................ 8 6.1.4 r_sdadc ................................................................................................................................................ 8 6.1.5 r_opamp ................................................................................................................................................ 8 6.1.6 r_acmphs ............................................................................................................................................... 9 6.1.7 r_acmplp ................................................................................................................................................ 9 6.1.8 Crypto/r_sce .......................................................................................................................................... 9 6.1.9 r_gpt_input_capture .............................................................................................................................. 9 6.1.10 r_jpeg_encode ....................................................................................................................................... 9 6.1.11 r_sce_key_installation ......................................................................................................................... 10 6.1.12 sf_crypto_key ...................................................................................................................................... 10 6.1.13 sf_el_nx .............................................................................................................................................. 10 6.1.14 sf_comms_telnet ................................................................................................................................. 10 6.1.15 sf_block_media_ram ........................................................................................................................... 10 6.1.16 sf_block_media_qspi ........................................................................................................................... 10 6.1.17 sf_audio_record_i2s ............................................................................................................................ 10 6.1.18 sf_audio_playback ............................................................................................................................... 11 6.1.19 MQTT .............................................................................................................................................. 11 6.1.20 Cellular Framework for Quectel BG96 global CATM1 module ........................................................... 11 6.1.21 NetX & NetX Duo PPP ........................................................................................................................ 11 6.1.22 Netx Secure ......................................................................................................................................... 11 6.1.23 S1JA MCU support .............................................................................................................................. 12 6.1.24 S3A1 MCU support ............................................................................................................................. 12 6.1.25 USB ISO .............................................................................................................................................. 12

R11UT0031EU0103 Rev.1.03

May 1, 2018

Renesas Synergy™ Platform SSP v1.4.0 Release Note


6.2 New Improvements................................................................................................................................ 12 6.2.1 Express Logic component Integration into SSP .................................................................................. 12 6.2.2 BSP for SSP supported Platforms ...................................................................................................... 12 6.2.3 MCU Implementation/ SW Architecture .............................................................................................. 13 6.2.4 Unsupported MCU features are no longer selectable in the Synergy Configurator. ........................... 13 6.2.5 r_cgc .............................................................................................................................................. 13 6.2.6 r_gpt .............................................................................................................................................. 13 6.2.7 r_rtc .............................................................................................................................................. 13 6.2.8 r_sdmmc .............................................................................................................................................. 13 6.2.9 sf_audio_record_adc ........................................................................................................................... 13 6.2.10 sf_ble .............................................................................................................................................. 13 6.2.11 sf_el_nx .............................................................................................................................................. 13 6.2.12 sf_el_fx .............................................................................................................................................. 13 6.2.13 Synergy Configurator .......................................................................................................................... 14 6.2.14 Synergy Tools...................................................................................................................................... 14

7. Summary of bug fixes made since SSP v1.3.3 ...................................................................... 14 7.1 BSP .................................................................................................................................................... 14 7.2 nx .................................................................................................................................................... 14 7.3 nxd_mqtt_client ..................................................................................................................................... 14 7.4 nxd_tls_secure ...................................................................................................................................... 15 7.5 r_acmphs ............................................................................................................................................... 15 7.6 r_jpeg_decode ....................................................................................................................................... 15 7.7 r_lvd .................................................................................................................................................... 15 7.8 r_rtc .................................................................................................................................................... 16 7.9 r_slcdc ................................................................................................................................................... 16 7.10 sf_audio_playback ................................................................................................................................. 16 7.11 sf_cellular .............................................................................................................................................. 16 7.12 sf_console ............................................................................................................................................. 17 7.13 sf_crypto ................................................................................................................................................ 17 7.14 sf_el_ux ................................................................................................................................................. 17 7.15 sf_i2c .................................................................................................................................................... 17 7.16 Synergy Tools ........................................................................................................................................ 17 7.17 tx .................................................................................................................................................... 17

8. Known issues and limitations in SSP v1.4.0 release .............................................................. 18 8.1 r_acmplp ................................................................................................................................................ 19 8.2 r_agt .................................................................................................................................................... 19 8.3 r_cgc .................................................................................................................................................... 19 8.4 r_dac8 .................................................................................................................................................... 20 8.5 r_flash_hp .............................................................................................................................................. 21 8.6 r_glcd .................................................................................................................................................... 21



8.7 r_ioport .................................................................................................................................................. 21 8.8 r_riic .................................................................................................................................................... 21 8.9 r_sci_spi ................................................................................................................................................ 22 8.10 r_sci_uart ............................................................................................................................................... 22 8.11 sf_el_gx ................................................................................................................................................. 22 8.12 sf_el_ux ................................................................................................................................................. 22 8.13 sf_el_ux_comms_v2 .............................................................................................................................. 23 8.14 sf_i2c .................................................................................................................................................... 23 8.15 sf_WiFi ................................................................................................................................................... 23 8.16 GUIX Driver ........................................................................................................................................... 24 8.17 D/AVE 2D .............................................................................................................................................. 24 8.18 USBX Device ......................................................................................................................................... 24

9. Complete list of modules available in this release .................................................................. 25

10. Additional technical notes ...................................................................................................... 31



1. Introduction This document describes the release notes for Synergy Software Package (SSP) version 1.4.0.

2. Release information SSP Release Version v1.4.0

Release Date Mar 28, 2018 The intended audience for this release is Renesas Synergy customers, prospective customers, partners, and support staff. This release note describes the known issues in SSP v1.4.0 that were identified since the last patch release SSP v1.3.3.

Note: For supplemental information on the SSP modules, see the SSP Version 1.4.0 Usage Notes (sspv140-v101_Additional-Usage-Notes.pdf) available on the Renesas Synergy Knowledge Base at: https://en-us.knowledgebase.renesas.com/English_Content/Renesas_Synergy™_Platform/Renesas_Synergy_Knowledge_Base/SSP_Version_1.4.0_Usage_Notes

3. Synergy MCU groups supported S7G2, S5D9, S5D5, S3A7, S3A6, S3A3, S3A1, S124, S128, S1JA groups.

Note: At this time S1JA is only available for limited engagement with alpha customers.

4. Software Tools and Hardware Kits supported with this SSP release Tool Version Description

e2 studio 6.2.0 Software development and debugging tool. Link: https://www.renesas.com/en-us/products/synergy/software/tools.html

IAR Embedded Workbench® for Renesas Synergy™ 8.21.1

Software development environment and debugging tool. Link: https://www.renesas.com/en-us/products/synergy/software/tools.html

SSC 6.2.0 Synergy Standalone Configurator. Used in combination with IAR EW for Synergy. Link: https://www.renesas.com/en-us/products/synergy/software/tools.html

GNU Arm Compiler 4.9.3 GNU Arm® compiler GCC_4.9.3.20150529 IAR Compiler 8.21.1 IAR Arm® compiler toolchain

PE-HMI1 2.0 Product Example (PE) for Human Machine Interface to evaluate Renesas Synergy™ S7G2 Group MCU

DK-S124 3.1 Development Kit for Renesas Synergy™ S124 Group MCU DK-S7G2 3.1 Development Kit for Renesas Synergy™ S7G2 Group MCU SK-S7G2 3.3 Starter Kit for Renesas Synergy™ S7G2 Group MCU DK-S3A7 2.0 Development Kit for Renesas Synergy™ S3A7 Group MCU PK-S5D9 1.0 Promotion Kit for Renesas Synergy™ S5D9 Group MCU DK-S128 1.1 Development Kit for Renesas Synergy™ S128 Group MCU TB-S3A6 1.05b Kit for Renesas Synergy™ S3A6 Group MCU TB-S5D5 1.0 Kit for Renesas Synergy™ S5D5 Group MCU TB-S3A3 0.6 Kit for Renesas Synergy™ S3A3 Group MCU TB-S3A1* 0.5A Kit for Renesas Synergy™ S3A1 Group MCU TB-S1JA* 0.5A Kit for Renesas Synergy™ S1JA Group MCU

J-Link Software 6.30g SEGGER J-Link® debug probe is the quasi standard for Arm® Cortex®-M based MCUs.

Note: * SSP testing used pre-production versions of these kits; results with production kits may vary slightly.

https://en-us.knowledgebase.renesas.com/@api/deki/files/2623/sspv140-v101_Additional-Usage-Notes.pdf?revision=1

https://en-us.knowledgebase.renesas.com/@api/deki/files/2623/sspv140-v101_Additional-Usage-Notes.pdf?revision=1

https://en-us.knowledgebase.renesas.com/English_Content/Renesas_Synergy%E2%84%A2_Platform/Renesas_Synergy_Knowledge_Base/SSP_Version_1.4.0_Usage_Notes

https://en-us.knowledgebase.renesas.com/English_Content/Renesas_Synergy%E2%84%A2_Platform/Renesas_Synergy_Knowledge_Base/SSP_Version_1.4.0_Usage_Notes

https://www.renesas.com/en-us/products/synergy/software/tools.html








4.1 Version Information for Express Logic, Inc. Component Version

ThreadX® 5.8

NetX™ 5.9 SP3

NetX Duo™ 5.10 SP3

NetX Application bundle 5.9 SP3

NetX Duo Application bundle 5.10 SP3

USBX™ Host 5.8 SP2

USBX™ Device 5.8 SP2

FileX® 5.5

GUIX™ 5.4

TraceX® 5.2.0

GUIX Studio™ 5.4.0

NetX Secure 5.11

MQTT for NetX Duo 5.10 SP4

SNMP for NetX 5.9 SP4

SNMP for NetX Duo 5.10 SP4

5. SSP release package and installation information This package contains SSP v1.4.0 release.

Before installing SSP, ensure that the following items are installed on your PC:

• Renesas e2 studio ISDE v6.2.0 (download from Renesas.com https://www.renesas.com/en-us/products/synergy/software.html)

• GNU Arm® Compiler (included in Renesas e2 studio ISDE v6.2.0 installer) To install the SSP, follow these steps:

1. Download the following items for the SSP Release from Renesas.com: SSP_Distribution_1.4.0.zip (SSP Package Installer, including SSP Package) Renesas Synergy Software Package (SSP) v1.4.0 Release Note

(r11ut0031eu0101-synergy-sspv140-rel-note.pdf) 2. Unzip the package and run the SSP_Distribution_1.4.0.exe installer. 3. Install the SSP in the root folder of a compatible e2 studio installation. Note: The default installation folder for the SSP is C:\Renesas\e2_studio.

SSP documentation is available for download from the Synergy Software Package (SSP) page in Renesas Synergy Platform section, on Renesas.com. Sign in the MyRenesas Account by using your existing MyRenesas or Synergy Gallery credentials, or by creating a new MyRenesas account.

https://www.renesas.com/en-us/products/synergy/software.html

https://www.renesas.com/en-us/products/synergy/software.html



Important Notices! 1. S1JA MCU is currently only supported by the IAR v8.21 toolchain. The S1JA is an Arm Cortex M23 which uses

the Armv8-M architecture.

Note: Armv8-M architecture is not supported by the current version of GCC that is included with e2 studio in this release. When creating a project, the GCC toolchain may be selected by default. If so, change it to select the IAR compiler.

For instructions on installing IAR compiler in e2 studio, see the application note, Installing IAR Compiler into e2 studio. The document is available from the e2 studio downloads section, or may be accessed using this URL:

https://www.renesas.com/en-us/products/synergy/software/tools/e2-studio.html

2. SSP v1.4.0 requires developers upgrade their toolchain to e2 studio v6.2.0 or IAR v8.21.1, and SSC v6.2.0. Older versions of toolchain are not compatible with SSP v1.4.0

3. Users are required to generate and download a new Development and Production License Key file from Synergy Software Package (SSP) page in Renesas Synergy Platform section, on Renesas.com and apply it to your projects when upgrading to SSP v1.4.0. Using an older Development and Production License Key file generated/issued prior to SSP v1.4.0 will result in a build failure for the following modules.

A. To build and view the protected source for the new SNMP module included in SSP v1.4.0 B. To build and view the protected source for some of the modules included in NetX/NetX Duo applications

bundle that use software cryptographic algorithms provided as part of the NetX/NetX Duo applications. 4. To generate and download a new License Key file, log on Renesas.com using by using your existing MyRenesas or

Synergy Gallery credentials, or by creating a new MyRenesas account.

A new License Key file can be generated by your Company Super User by clicking the “Create a Development/Production License” link under the SSP section.

Once generated the new License Key file can be downloaded by all users registered under that company account from the Licenses and Downloads section of MyRenesas Portal page. To access MyRenesas Portal, click the user name at the top of web page, then select View My Renesas Portal from the drop down list.

https://www.renesas.com/en-us/products/synergy/software/tools/e2-studio.html



6. Changes from SSP v1.3.3 to SSP v1.4.0 release 6.1 New or updated features 6.1.1 SNMP Supported features: Included support for NetX and NetX Duo SNMP agent compliant with RFC1155, RFC1157, RFC1215, RFC1901, RFC1905, RFC1906, RFC1907, RFC1908, RFC2571, RFC2572, RFC2574, RFC2575, RFC 3414, and related RFCs. The SNMP agent operates only in UDP.

The NetX and NetX Duo SNMP protocol implements SNMP Version 1, 2, and 3. The SNMPv3 implementation supports MD5 and Secure Hash Algorithm 1(SHA-1) authentication, and Data Encryption Standard (DES) encryption.

This version of the NetX and NetX Duo SNMP Agent has the following constraints:

• No SNMP agent support for Transport Layer Security (TLS) or Datagram Transport Layer Security (DTLS) • No TCP support • Support for only one SNMP Agent per NetX IP Instance • No RMON support available • No support for SNMP v3 Inform messages • Provides mechanism to register callbacks for handling username, get, set, and getnext when creating a SNMP agent Known Issues: None

6.1.2 r_sci_uart Abort Supported features: • Abort only reception • Abort only transmission • Abort both transmission and reception Note: Transmission is aborted after the current character is transmitted. Known issues: Reception remains enabled after communication when the Abort API is called. Any characters received after an abort and before the next call to read will arrive via the callback function with the event, UART_EVENT_RX_CHAR. 6.1.3 RIIC Multi-Master Mode Supported features: RIIC driver supports multi-master operations as per I2C standards.

Known issues: None 6.1.4 r_sdadc Supported features: • 24-bit sigma delta A/D Converter • Single scan or continuous scan operation mode • Single-ended or differential input • Gain of up to 32x on differential inputs • Oversampling ratio configurable on differential inputs Known issues: None

6.1.5 r_opamp Supported features: • Low power or high-speed mode • Started by software or an AGT compare match • Stopped by software or an ADC conversion end (stopped by an ADC conversion end; only supported on op-amp

channels configured to start by an AGT compare match) • Trimming available on some MCUs (see the corresponding hardware manual) Known issues: On S1JA, the pin configuration registers must be updated by the application code after open().



6.1.6 r_acmphs Supported features: • Queries high-speed analog comparator result • Callback on a rising edge, falling edge, or both • Configurable debounce filter • Option to include comparator output on VCOUT pin Known issues: Pin configuration registers must be updated by the application code after open(). 6.1.7 r_acmplp Supported features: • Queries low-power analog comparator result • Callback on rising edge, falling edge, or both • Configurable debounce filter • Option to include comparator output on VCOUT pin Known issues: Pin configuration bitfields must be updated by the application code after open().

6.1.8 Crypto/r_sce Supported features: The following features have been added to the Crypto HAL library:

• AES, ECC, and RSA Key installation • ECC operations for curves P-192 and P-256 • Key Generation — Plain text/ raw keys and wrapped keys • Scalar Multiplication • Signature Generation and Verification Known issues: None

6.1.9 r_gpt_input_capture Supported features: • Support for period measurement. • Added Enable/Disable API to enable/disable all interrupts and start/stop the timer. Known issues: None 6.1.10 r_jpeg_encode Supported features: • Compresses RAW image data captured from camera device into JPEG format • Configurable output image quality • Chunked image processing to provide flexibility to applications to compress large images in chunks (partial raw

image) and provide acknowledgement to application to pass next chunk of the image • Compress complete frame of the raw image • Supports Motion JPEG (MJPEG) video compression/decompression Known issues: The JPEG_Encode driver only supports normal byte order in the output image format from the configurator.



6.1.11 r_sce_key_installation Supported features: • Crypto Key Installation API support for AES, RSA, and ECC algorithms in the Crypto HAL Library • "Key Installation driver interface" installs user-provided encrypted key on to the Synergy platform • Support for AES 128/192/256 (CBC, GCM, XTS, CTR, ECB chaining modes), as well as the RSA 1024/2048, and

ECC 192/256-bit encrypted keys (plain text keys encrypted as specified in the module usage notes) Known issues: None Note: The Key Installation API requires Renesas to provide the customer with the keys necessary to prepare their

plain text keys for installation. 6.1.12 sf_crypto_key Supported features: • ECC algorithm to Crypto Key Generation Framework Module • ECC 192-bit/256-bit wrapped key generation support on existing Crypto Key framework module Known issues: Support for plain text keys is not added 6.1.13 sf_el_nx Supported features: • Raw Ethernet packet processing with custom EtherType field • Link status monitoring • PHY driver uses suppressed preamble for MDIO control Known issues: None 6.1.14 sf_comms_telnet Supported features: New sf_comms_telnet module uses a shared IP instance, unlike sf_el_nx_comms

Known issues: None 6.1.15 sf_block_media_ram Supported features: • Enables FileX to be run on linear memory-mapped devices • Temporary and fast storage of data on RAM Known Issues: None 6.1.16 sf_block_media_qspi Supported features: Enables FileX use on external SPI flash using QSPI peripheral through block media interface. Known Issues: The smallest erase size is 4 KB on the QSPI chips currently being used. 6.1.17 sf_audio_record_i2s Supported features: • Audio record I2S framework provides high-level API for audio recording over the I2S interface • Records data in 8-bit or 16-bit PCM • Periodic callback function issued when new samples are available • Configurable number of samples) per callback Known Issues: None



6.1.18 sf_audio_playback Supported features: • Framework supports 16-bit sample playback on DAC, DAC8, and SSI interfaces • Framework supports 8-bit samples on DAC and DAC8 interface • Supports 16 and 8-bit audio streaming • Supports mixing of 16 and 8-bit stream data Known Issues: Framework does not support 8-bit samples on the SSI interface

6.1.19 MQTT Supported features: • Compliant with OASIS MQTT Version 3.1.1; Oct 29th, 2014. The specification can be found at: http://mqtt.org/ • Provides option to enable/disable TLS for secure communication using NetX Secure in SSP • Supports QoS and provides the ability to choose the levels that can be selected while publishing the message • Internally buffers and maintains queue of received messages • Provides mechanism to register callback when a new message is received • Provides mechanism to register callback when connection with the broker is terminated

Known issues: • When using two MQTT clients, MQTT PING messages are not sent for the first client • NetX Duo MQTT Client with TLS cannot reliably re-connect to MQTT Server

6.1.20 Cellular Framework for Quectel BG96 global CATM1 module Supported features: • Provides generic API interface to application for configuring and provisioning Quectel CAT-M1 cellular module • Network Stack Abstraction Layer (NSAL) to support IP stack; NetX/NetX-Duo over Quectel CAT-M1 • BSD Socket API interface for Quectel CAT-M1 on-chip networking stack Notes: • Tested on Verizon CAT-M1 network • Socket APIs that were not tested: bind(), listen(), and accept() 6.1.21 NetX & NetX Duo PPP Supported features: • Implements PPP using COMMS interface • Module not available for configuration from the Synergy thread configurator Known issues: None 6.1.22 Netx Secure Supported features: • RFC 2246: The TLS Protocol Version 1.0 • RFC 5246: The Transport Layer Security (TLS) Protocol Version 1.2 • RFC 5280: X.509 PKI Certificates (v3) • RFC 3268: Advanced Encryption Standard (AES) Cipher suites for Transport Layer Security (TLS) • RFC 3447: Public-Key Cryptography Standards (PKCS) #1: RSA Cryptography Specifications Version 2.1 • RFC 2104: HMAC: Keyed-Hashing for Message Authentication • RFC 6234: US Secure Hash Algorithms (SHA and SHA-based HMAC and HKDF) • RFC 4279: Pre-Shared Key Cipher suites for TLS • TLS provides a number of extensions that provide additional functionality for certain applications.

http://mqtt.org/



The following TLS extensions are currently supported by NetX Secure TLS:

• Secure Renegotiation Indication: This extension mitigates a Man-in-the-Middle attack vulnerability that could occur during a renegotiation handshake.

• Server Name Indication: This extension allows a TLS Client to supply a specific DNS name to a TLS Server, allowing the server to select the correct credentials (assumes the server has multiple identity certificates and network entry points).

• Signature Algorithms: This extension enables a TLS Client to provide a list of acceptable signature and hash algorithms to a TLS Server.

• X.509 Extensions: The X.509 specification describes a number of “extensions” that can be used to supply additional information used in the verification of certificates. The currently supported extensions are listed below: Key Usage: Provides acceptable uses for a certificate’s public key in a bit field Extended Key Usage: Provides additional acceptable uses for a certificate’s public key using OIDs Subject Alternative Name: Provides alternate DNS names that are also represented by the certificate

6.1.23 S1JA MCU support Supported features: MCU S1JA support added.

Known issues: CTSU related modules are not supported on S1JA. Note: S1JA MCU is currently only supported by the IAR v8.21 toolchain. S1JA is an Arm Cortex M23 using the

Armv8-M architecture. Armv8-M architecture is not supported by the version of GCC included with e2 studio in this release. When creating a project, the GCC toolchain may be selected by default, and should be changed to select the IAR compiler.

6.1.24 S3A1 MCU support Supported features: S3A1 Series MCU support added 6.1.25 USB ISO Supported features: • Current version of the driver supports the USB Host Video Class (UVC) • Support for the isochronous transfer. Known issues: None

6.2 New Improvements 6.2.1 Express Logic component Integration into SSP The following Express Logic modules have been upgraded • SNMP NetX 5.9 SP4, NetX Duo 5.10 SP4 • ThreadX 5.8, NetX 5.9 SP3 and NetX Duo5.10 SP3 • MQTT5.10SP4 NetX Secure 5.11 to SSP • USBX 5.8 SP2 • NetX Secure 5.11 6.2.2 BSP for SSP supported Platforms • The TCFA bit field is added to the GTST register for the R_GPTB0_Type typedef.

Applies to: All MCUs • The CMSIS is updated to v5.1.1

Applies to: All MCUs • The ID code can now be set in the BSP properties in the configurator. To use this new feature, the linker script in

existing projects needs to be updated. New projects will contain the correct linker script. Applies to: All MCUs



6.2.3 MCU Implementation/ SW Architecture BSP device-specific constraints have been added in Crypto module XMLs. This prevents unsupported Crypto modules to be displayed for the selected MCU.

Applies to: This improvement applies to the S3 and S1 Group MCUs for which Crypto modules are not supported. 6.2.4 Unsupported MCU features are no longer selectable in the Synergy Configurator. Some SSP folders have been converted to lower case to support case-sensitive file systems.

Applies to: All MCUs 6.2.5 r_cgc

The sub-clock oscillator does not stop at every RESET to set up the Drive capacity, which results in eliminating drift during a RESET observed on peripherals that run on the sub-clock oscillator.

Applies to: S7 Series MCU and S5 Series MCU

6.2.6 r_gpt The display name for the interrupt priority is renamed in the configurator to match the associated constraint.

Applies to: All MCUs 6.2.7 r_rtc APIs are added to adjust the error in the sub-clock source frequency.

Applies to: All MCUs 6.2.8 r_sdmmc The default channel when a new instance of R_SDMMC is added to a project is changed from 1 to 0.

Applies to: S7G2, S5D9, S5D5, S3A7, S3A3, S3A1 6.2.9 sf_audio_record_adc In Synergy Configuration, an option to set the data buffer name for Audio Record framework has been removed. Now, the data buffer name can be set in the ADC periodic framework.

Applies to: All MCUs.

6.2.10 sf_ble BLE Framework uses RL78G1D v1.2.1 BLE stack which is BT 4.2 compliant

Applies to: S7G2, S5D9, S5D5, S3A7, S3A6, S3A3, S128, S124 6.2.11 sf_el_nx • Ethernet driver now supports sending and receiving raw Ethernet packets with a custom ‘EtherType’ field. The

packets sent use the API ‘nx_ether_custom_packet_send’ and the packets received use the user callback. Applies to: S7G2, S5D9, S5D5

• Channel option in the configuration window now allocates memory for used channel only

Applies to: S7G2, S5D9, S5D5 6.2.12 sf_el_fx The sf_el_fx implementation is improved to support sector size larger than 512 bytes for block media devices.

Applies to: S7G2, S5D9, S3A7, S3A3, S3A1



6.2.13 Synergy Configurator • LPMV2 modules for MCUs (other than the selected one) are hidden in the add menu in the SSP configuration.

Applies to: LPMV2 • Module interrupt names are now matched in all the places they are used.

Applies to: RTC, AGT, DMAC, ICU, KINT • Link added to the module documentation on the module tile in the threads tab and in the right-click menu.

Applies to: All MCUs • The configurator now verifies that all clock constraints are met.

Applies to: All MCUs • The configuration tool now reports an error if a required lower level module is missing.

Applies to: All MCUs • Modules that should not be included directly by the user are no longer in the list of modules in the Synergy

Configuration tool. Applies to: All MCUs

6.2.14 Synergy Tools The available interrupt priorities are now limited to only valid options based on the selected MCU.

Applies to: All MCUs

7. Summary of bug fixes made since SSP v1.3.3 7.1 BSP Issue ID: 10247

The BSP_ALIGN_VARIABLE and the BSP_PACKED macros have no effect on IAR. The BSP_ALIGN_VARIABLE_V2 and BSP_PACKED_V2 were added and provide the functionality intended for both IAR and GCC. The new macros are preferred in new code. Existing macros will remain for backwards compatibility.

Applies to: All MCUs Issue ID: 11688

The macros BSP_PLACE_IN_SECTION_V2, BSP_ALIGN_VARIABLE_V2, and BSP_PACKED_V2 have been added and provide compiler-neutral support. The old macros are unchanged.


7.2 nx Issue ID: 8614

If the NX_SNTP_CURRENT_YEAR does not match the current year, and there is a leap year between the current year and NX_SNTP_CURRENT_YEAR, the SNTP Client use to compute the wrong date. This issue has now been fixed.


7.3 nxd_mqtt_client Issue ID: 10581

MQTT API nxd_mqtt_client_secure_connect() used to hang when the MQTT client tries to reconnect to a MQTT broker after performing standard MQTT operations, such as publish/subscribe. This issue is now fixed.

Applies to: S7G2, S5D9

Workaround: None



Issue ID: 9915

MQTT server used to close the connection if the first message received by the server was PUBLISH or SUBSRIBE and the packet identifier field in the received message was zero. This issue is now fixed.

Applies to: PK-S5D9, DK-S7G2, and Azure IoT Hub. Issue ID: 11094

If NX_SECURE_ENABLE is defined, then _nxd_mqtt_packet_receive_process() became a blocking call.

On the other hand, should ‘If NX_SECURE_ENABLE’ not be defined, then _nxd_mqtt_packet_receive_process() becomes a non-blocking call.

This issue was resolved by making _nxd_mqtt_packet_receive_process() non-blocking, regardless whether ‘if NX_SECURE_ENABLE’ is defined or not.

Applies to: S7G2, S5D9 Issue ID: 10953

The API nxd_mqtt_client_create fails when called after nxd_mqtt_client_delete, even though the nxd_mqtt_client_delete API returns a successful completion status.

This issue resulted in the failure to reconnect to a MQTT server.

This issue was resolved by deallocating resources for the client when nxd_mqtt_client_delete() API is invoked. Applies to: S7G2, S5D9

7.4 nxd_tls_secure Issue ID: 10371

The ‘Self Signed Certificate’ property of the ‘NetX Duo TLS Common’ configurator, when disabled does not take desired effect.

This is due to presence of NX_SECURE_ALLOW_SELF_SIGNED_CERTIFICATES macro in nx_secure_tls.h file. This issue has been fixed using comments in the NX_SECURE_ALLOW_SELF_SIGNED_CERTIFICATES macro in the nx_secure_tls.h file.


7.5 r_acmphs Issue ID: 9688

When creating a custom driver, the SSP_VECTOR_DEFINE macros cause build errors when they are used to create vector table entries for the COMP_HS, COMP_LS, and LVD (VBATT). This issue is fixed.


7.6 r_jpeg_decode Issue ID: 9604

A placeholder for user-provided p_context information was not updated in the callback function p_context; this happened when the JEDI or JDTI interrupt occurred in the JPEG decode driver. This issue has been fixed; the driver now passes the p_context to the user in callback function.


7.7 r_lvd Issue ID: 9868

The LVD Monitor 1 and 2 values of vdet1 and vdet2 are now included for S5D9 and S5D5 Group MCUs. The values will be visible on the drop-down menu in the configuration.

Applies to: S5D9, S5D5



7.8 r_rtc Issue ID: 9892

Date validations have been improved for the RTC driver. Additionally, the ‘day of the week’ field is now automatically calculated and updated by the driver for the provided date.

Applies to: All MCU's

Issue ID: 9442

The open status of RTC was incorrectly updated as ‘opened,’ even in case of failure. This issue is now fixed.

Applies to: All MCUs Issue ID: 8370

The RTC driver now provides a new configuration function to fix the drift issue during reset.


7.9 r_slcdc Issue ID: 9538

Displaying on SLCD by using HOCO as LCD source clock is possible now. Previously, the SLCDC was not displaying anything if the LCD clock source is selected as HOCO.

Applies to: S3A6, S3A7, S3A3, S3A1

7.10 sf_audio_playback Issue ID: 8220

Audio playback resume operation after the playback was paused is now functional.


7.11 sf_cellular Issue ID: 11135

The cellular framework is allowed to correctly set the operator selection mode to manual

Applies to: CAT1 and CAT3 cellular framework Issue ID: 11492

Corrected the prototype of the Invalid packet handler that was provided by the user in the ISDE options. The invalid handler now takes NX_PACKET* as a parameter.

Applies to: Cellular framework implementation for NimbeLink CAT1 and CAT3, and Quectel CAT M1 Issue ID: 11134

The cellular framework can be used when the network state is set to home or roaming

Applies to: CAT1 and CAT3 cellular framework

Issue ID: 10156

The cellular framework for NimbeLink CAT3 and CAT1, with the private network SIM for Verizon, can now connect to the cellular network.

Applies to: NimbeLink CAT3 and CAT1 on all Synergy MCUs with private network SIM for Verizon



Issue ID: 10096

The cellular framework for CAT1 Verizon module supports Firmware version B and C. The framework does not support firmware version A.

Applies to: NimbeLink CAT1 Verizon module Issue ID: 10269

Download rates are observed to be low for the default configuration setting.

Applies to: Cellular Framework for NimbeLink CAT1 and CAT3 modules on Verizon Network, and Quectel BG96 CATM1

7.12 sf_console Issue ID: 7607

The sf_console internal timeout was hardcoded to 5 ticks. It has been changed to a user-configurable parameter. The timeout can be increased if using low baud rates or to avoid menu or echo prints cut off.


7.13 sf_crypto Issue ID: 11359

The SF_CRYPTO_KEY keyGenerate API is now able to update the length of the key in the caller's buffer on an output.

Applies to: S3, S5, and S7 Group MCUs, where key generation is supported

7.14 sf_el_ux Issue ID: 9117

The user thread that is using SF_EL_UX Device Controller Driver (DCD) services for data transfers using DMA, will block a thread that has a thread priority lower than, or equal to, the user thread that is performing the DMA transfer, until the data is completely transferred to the Host.

With the fix, the data transfer uses DMA and does not block the lower priority thread.


7.15 sf_i2c Issue ID: 7882

The default option of the ThreadX source Configurator window did not match the text description when the user hovered over the Notify Callbacks option. This issue has been resolved.


7.16 Synergy Tools Issue ID: 10247

The BSP_ALIGN_VARIABLE and BSP_PACKED macros now work correctly in IAR.


7.17 tx Issue ID: 8617

TraceX now works when you put a breakpoint at the top of the application thread entry function.




8. Known issues and limitations in SSP v1.4.0 release Issue ID: 7763

For S1 and S3 Group MCUs, when the TRNG (True Random Number Generator) module is not being used, a ring oscillator in TRNG stays active resulting in more current consumption than expected. To eliminate this excess current usage the TRNG module must be started and stopped.

Applies to: All S1 and S3 Group MCUs

Workaround: For S1 MCUs:

1. Set the MSTPCRC.MSTPC28 bit to 0 (Cancel the module-stop state) 2. Wait for 3 PCLK 3. And then, set the MSTPCRC.MSTPC28 bit to 1 (Enter the module-stop state) Refer to the applicable MCU hardware manual for the MSTPCRC register definitions. Alternatively, the following code sequence may be used to work-around the stated issue:

void R_BSP_WarmStart (bsp_warm_start_event_t event) { ssp_feature_t trng_ip; switch (event) { case (BSP_WARM_START_PRE_C): trng_ip.id = SSP_IP_TRNG; trng_ip.channel = 0; trng_ip.unit = 0; R_BSP_ModuleStart(&trng_ip); /* Clears the MSTPCRC.MSTPC28 bit */ R_BSP_SoftwareDelay(100, BSP_DELAY_UNITS_MICROSECONDS); /* 3 cycles @32kHz clock rate */ R_BSP_ModuleStop(&trng_ip); /* Sets the MSTPCRC.MSTPC28 bit */ break; case (BSP_WARM_START_POST_C): break; default: break; } }

For S3 MCUs:

1. Set the MSTPCRC.MSTPC31 bit to 0 (Cancel the module-stop state) 2. Wait for 3 PCLK 3. And then, set the MSTPCRC.MSTPC31 bit to 1 (Enter the module-stop state) See the applicable MCU hardware manual for the MSTPCRC register definitions. Alternatively, the following code sequence may be used to work-around the stated issue

void R_BSP_WarmStart (bsp_warm_start_event_t event) { ssp_feature_t trng_ip; switch (event) { case (BSP_WARM_START_PRE_C): trng_ip.id = SSP_IP_SCE; trng_ip.channel = 0; trng_ip.unit = 0; R_BSP_ModuleStart(&trng_ip); /* Clears the MSTPCRC.MSTPC31 bit */ R_BSP_SoftwareDelay(100, BSP_DELAY_UNITS_MICROSECONDS); /* 3 cycles @32kHz clock rate */ R_BSP_ModuleStop(&trng_ip); /* Sets the MSTPCRC.MSTPC31 bit */ break;



case (BSP_WARM_START_POST_C): break; default: break; } }

8.1 r_acmplp Issue ID: 11600

When using either comparator driver (r_acmphs or r_acmplp), the interrupt is not mapped into the vector table in the generated code.

Applies to: S1JA

Workaround: Add the following code in the application project, where <channel> is the channel number used:

For r_acmplp:

SSP_VECTOR_DEFINE_CHAN(comp_lp_int_isr, COMP_LP, INT, <channel>); For r_acmphs:

SSP_VECTOR_DEFINE_CHAN(comp_hs_int_isr, COMP_HS, INT, <channel>);

8.2 r_agt Issue ID: 11098

In a cascaded timer setup, where the output of the first timer T0 is input to a second timer T1. The output time period for the cascaded timer T1 would be incorrect for the following two conditions:

1. The time period for T0 provided by the user is converted to counts. If this count value exceeds the maximum count value (2^16 - 1), then the clock dividers are used in the configuration of timer T0. Currently these clock dividers are not considered in the calculation of input frequency of timer T1.

2. If 1/(T0 time period in sec) is a float (such as 0.99), only the integer value of the result is considered, resulting in the incorrect frequency calculation of T1 timer.


Workaround: Use Raw Counts as a Period Unit, while configuring the period for second timer T1.

8.3 r_cgc Issue ID: 10700

Using the current CGC driver, when transitioning from High-Speed Mode to SubOscillator Speed mode, the power consumption numbers described in the hardware manual are not achieved, since the driver does not turn off the high-speed clocks.


Workaround: The user can modify the HW_CGC_OperatingModeSet() function such that the Set SOPCCR is modified as below:

"/** Set SOPCCR. */ if(CGC_SUBOSC_SPEED_MODE == operating_mode) { HW_CGC_HardwareUnLock(); if (!(p_system_reg->MOSCCR_b.MOSTP)) { p_system_reg->MOSCCR_b.MOSTP = 1U; } if (!(p_system_reg->HOCOCR_b.HCSTP)) { p_system_reg->HOCOCR_b.HCSTP = 1U; } if (!(p_system_reg->MOCOCR_b.MCSTP))



{ p_system_reg->MOCOCR_b.MCSTP = 1U; } if (!(p_system_reg->LOCOCR_b.LCSTP)) { p_system_reg->LOCOCR_b.LCSTP = 1U; } if (!(p_system_reg->PLLCR_b.PLLSTP)) { p_system_reg->PLLCR_b.PLLSTP = 1U; } p_system_reg->SOPCCR_b.SOPCM = CGC_SOPPCR_SOPCM_MASK & CGC_SOPCCR_SET_SUBOSC_SPEED_MODE; HW_CGC_HardwareLock(); }"

Conversely, the user can also add the preceding code to the user application, after the transition from High-Speed Mode to SubOscillator Speed mode is completed. This will turn off the high speed clock. Issue ID: 10697

The CGC configuration property view for a power control mode in PPv2 is missing 8 & 9 multiplier in the pulldown menu


Workaround: None Issue ID: 10641

The clocks HOCO, MOCO, and LOCO are not checked for stabilization after calling the Stop API. This issue results in the clocks running even after stopping.



If the MCU system clock is configured to run from HOCO, the MCU operates in higher power consumption High-Speed mode, regardless of the chosen ICLK frequency.


Workaround: None

8.4 r_dac8 Issue ID: 9895

R_DAC8_Write returns SSP_ERR_OVERFLOW on out-of-range data.

Applies to: S3A3

Workaround: None



8.5 r_flash_hp Issue ID: 8771

Flash HP module: If the module is unable to successfully enter Data Flash P/E mode, which may occur if there was a problem with the underlying hardware, the software waits endlessly, instead of returning an error code.

Additionally, should an error occur that resulted in a Flash error ISR being generated, and the error did not set the Command Lock status bit (unlikely), a callback (providing one was configured), would be generated for the user with an undefined callback event parameter supplied.

Applies to: S7, S5 Group MCUs

Workaround: There is no workaround for the P/E mode failure. If this situation occurs, it is indicative of a problem with the underlying hardware and is extremely unlikely to be encountered.

For the callback issue, the application should be expected to handle an error callback with a supplied event code that may not be accurate, or even a member of the list of possible Flash event codes. The callback is an accurate indication of a Flash Error, with respect to the current operation, and should be handled as such by the application.

8.6 r_glcd Issue ID: 9226

The very first Line Detect Interrupt could occur at an irregular timing and must be ignored. The current R_GLCD HAL driver does not handle this issue, so the user application needs to handle this issue.


Workaround: Ignore the very first Line Detect Interrupt in user application. Use the second interrupt or later. In case the GUIX and SF_EL_GX modules are used, gx_system_start API should be called after at least one frame period passed after gx_studio_display_configure API is called.

8.7 r_ioport Issue ID: 9680

When built with the IAR compiler, the IOPORT Read API uses more time in the current SSP version, when compared with previous version.

Applies to: S5D9, S3A7

Workaround: None

8.8 r_riic Issue ID: 11342

After calling the RIIC Slave read/write APIs, the RIIC Slave ERI interrupt is triggered. If configured, the user application gets a call back on any STOP condition on the I2C bus, even if it is part of a protocol targeted for the other Slave.



RIIC_Slave read operation provides the wrong count on number of bytes received. This wrong information is provided in the callback if number of bytes received from the master are less than the expected number of bytes at the Slave.


Workaround: None



8.9 r_sci_spi Issue ID: 11525

When bit rate modulation is enabled, the actual bit rate may be reduced to half of the desired bit rate.



The IR flag in the interrupt controller is cleared at the beginning of the TXI and RXI ISR. Undesired behavior can be seen where the TXI/RXI interrupt is getting invoked, when TXI/RXI ISR is still executing for previous interrupt.

This issue can cause the former RXI/TXI interrupt to be overridden by the TXI/RXI interrupt invoked later.


Workaround: Applications can check for the previous interrupt processing has been completed and the ISR has returned prior to taking action for the next occurrence of the interrupt.

8.10 r_sci_uart Issue ID: 11268

Some of the received bytes may get corrupted/missed due to errors during reception; when the DTC is used for reception with data length greater than 1KB.

Applies to: DK-S128

Workaround: Do not add a DTC for RX in the UART configurator, instead use callback function to get the data.

8.11 sf_el_gx Issue ID: 9757

The component “GUIX Port on sf_el_gx” allows user to specify “Display Driver Configuration Inheritance” to “Inherit Graphics Screen 2,” (such as, foreground); however, SF_EL_GX source always references “DISPLAY_FRAME_LAYER_1” (such as, background) when performing buffer toggle operation. This is hard-coded in sf_el_gx_frame_toggle().


Workaround: Projects using GUIX in foreground should change “DISPLAY_FRAME_LAYER_1” to “DISPLAY_FRAME_LAYER_2,” which is given as the 3rd argument of DISPLAY API layerChange() called in sf_el_gx_frame_toggle(). Note: To apply this workaround, users should not edit the original sf_el_gx.c file located at

/synergy/src/framework/sf_el_gx/; instead, copy the file to /src/ directory and make the change on the copy. The reason for copying is because files under /synergy/ are subject to be overwritten when “Generate Project Content” is clicked or a project is built. B sure to exclude the original sf_el_gx.c. Right-click the file > Exclude from build > Click Select All > Click OK.

8.12 sf_el_ux Issue ID: 11329

USB DCD driver attempts to set the ‘UX_SYNERGY_DCD_FIFOCTR_BVAL’ bit after writing the last packet in a transfer, even if the last packet is the same size as the endpoint buffer size. This results in in erroneous generation of ZLP. It is not required to set BVAL bit in such cases, since ZLP is automatically triggered.

Applies to: All MCU, boards.

Workaround: Applications can ignore the ZLP when data transfer length is a multiple of endpoint buffer size.

Note: This issue is noticed only in vendor class where ZLP is required on control pipes. For other data pipes, the ZLP is generated properly.



Issue ID: 9834

The SF_EL_UX HCD does not handle the EoF error interrupt in the interrupt handler, even though the interrupt is enabled. Once the EoF error is detected, the driver is stuck in the interrupt handler, since it never clears the interrupt. The EoF error handling routine is not implemented in the driver, but is required since the USB hardware disables the USB port if the error was detected.

Applies to: S7G2, S5 and S3 MCUs.


SF_EL_UX Device driver is not functional when DTC is configured as the transfer component in the Synergy Configuration tool to the USBX Device Class stack.

This issue is applicable only for USB device classes.


Workaround: Instead of using DTC as a transfer component to the USBx Device class stack, use DMA or CPU (software) as the transfer component in the Synergy configuration tool. On S1 parts, since DMA is not supported, use CPU (software) as the transfer component. Issue ID: 11407

While using DMA, the USB HS device read is limited to 4K of data

Applies to: All MCU, boards - except S124, S128 and S1J series (which do not support the DMA)

Workaround: Currently if the data size of more than 4K is to be transferred, then do not use DMA. This would limit the throughput performance.

8.13 sf_el_ux_comms_v2 Issue ID: 11533

In the sf_el_ux_comms_v2 module, the Open API creates a semaphore, but does not releases the semaphore when Close API is called.


Workaround: The user application should delete the semaphore which was created in the Open API. For example, insert the following in application code to delete the semaphore:

err = tx_semaphore_delete(&g_sf_comms0_instance_ctrl.semaphore);

ssp_err = g_sf_console0.p_api->close(g_sf_console0.p_ctrl);

8.14 sf_i2c Issue ID: 10261

After failure of write/read operation user will not be able to close the sci_i2c driver instance.


Workaround: None

8.15 sf_WiFi Issue ID: 11136

An illegal instruction exception is posted if theTCP packet transmission fails and NetX tries to re-transmit the packet through WiFi NSAL

Applies to: WiFi Framework for GT202 on DK-S7G2, DK-S3A7, PK-S5D9, TB-S5D5, TB-S3A6 (Only socket), TB-S3A3 Synergy MCUs

Workaround: None



8.16 GUIX Driver Issue ID: 11671

Touch driver provides the wrong coordinate information to the GUIX application, when the touch buttons in the panel are in close proximity in the UI and when the buttons are operated by the user in quick succession. As a result, the application will not be able to identify the correct button.

Applies to: S7G2


If a MQTT client subscribes to a MQTT topic with a length that is larger than the configured length, the nxd_mqtt_client_subscribe() API does not return an error. But when the client publishes to such an MQTT topic, and the receive message is targeted for such topics, it returns an error.

This issue can also be seen if the client subscribes to a topic with non-ASCII characters.


Workaround: None

8.17 D/AVE 2D Issue ID: 9566

The D/AVE 2D driver API, d2_utility_fbblitcopy(), might cause a screen artifact. This occurs because the driver does not wait for the completion of the framebuffer cache flush. This function is used if a user called the GUIX API, gx_canvas_block_move().


Workaround: None

8.18 USBX Device Issue ID: 11293

When MSC and CDC composite classes are used in the same project, if the CDC class does not respond, the MSC class also fails to get the MSC device content.


Workaround: None



9. Complete list of modules available in this release These modules are available for respective MCUs based on the following criteria:

• If the core functionality of the module has been tested and works on a MCU, even if they have known bugs, then the module is supported on the MCU.

• If the core functionality is broken or not tested on a MCU then that module is not supported on the MCU. • If a Module has been tested on one of the Synergy MCUs, and it is independent of the underlying MCU hardware or

HAL drivers, then the module is supported on all Synergy MCUs on which the underlying driver/framework/stack upon which the module depends on have been completely tested on that MCU.

Module Name SSP Feature Supported Synergy MCU Groups

BSP Board Support Package S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

Driver r_acmphs Analog Comparator High Speed S1JA r_acmplp Analog Comparator Low Power S1JA

r_adc A/D Converter S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_agt Asynchronous General Purpose Timer

S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_cac Clock Frequency Accuracy Measurement Circuit


r_can Controller Area Network S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_cgc Clock Generation Circuit S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_crc Cyclic Redundancy Check Calculator S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_ctsu Capacitive Touch Sensing Unit S124, S128, S3A3, S3A7, S5D5, S5D9, S7G2

r_dac Digital to Analog Converter S124, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_dac8 8-bit Digital to Analog Converter S1JA, S128, S3A3

r_dmac Direct Memory Access Controller S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_doc Data Operation Circuit S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_dtc Data Transfer Controller S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_elc Event Link Controller S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_flash_hp Flash Memory, High Performance S5D5, S5D9, S7G2

r_flash_lp Flash Memory, Low Power S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7

r_fmi Factory Microcontroller Information S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_glcd Graphics LCD Controller S5D9, S7G2

r_gpt General Purpose Timer S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_gpt_input_capture General Input Capture S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_icu Interrupt Controller Unit S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2



r_ioport General Purpose I/O Ports S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_iwdt Independent Watchdog Timer S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_jpeg_decode JPEG Decode S5D9, S7G2 r_jpeg_encode JPEG Encode S5D9, S7G2

r_kint Keyboard Interrupt Interface S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_lpm† Low Power Mode S124, S3A7, S7G2 r_lpmv2_s1ja Low Power Mode V2 for S1JA S1JA r_lpmv2_s124 Low Power Mode V2 for S124 S124 r_lpmv2_s128 Low Power Mode V2 for S128 S128 r_lpmv2_s3a1 Low Power Mode V2 for S3A3 S3A1 r_lpmv2_s3a3 Low Power Mode V2 for S3A3 S3A3 r_lpmv2_s3a6 Low Power Mode V2 for S3A6 S3A6 r_lpmv2_s3a7 Low Power Mode V2 for S3A7 S3A7 r_lpmv2_s5d5 Low Power Mode V2 for S5D5 S5D5 r_lpmv2_s5d9 Low Power Mode V2 for S5D9 S5D9 r_lpmv2_s7g2 Low Power Mode V2 for S7G2 S7G2

r_lvd Low Voltage Detection Driver S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_opamp Operational Amplifier S1JA, S128 r_pdc Parallel Data Capture Unit S5D5, S5D9, S7G2 r_qspi Quad Serial Peripheral Interface S3A1, S3A3, S3A7, S5D5, S5D9, S7G2

r_riic IIC S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_riic_slave IIC Slave S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_rspi Serial Peripheral Interface S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_rtc Real-time Clock S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_sci_i2c Serial Communication Interface I2C S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9,S7G2

r_sci_spi Serial Communication Interface SPI S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_sci_uart Serial Communication Interface UART


r_sdadc Sigma Delta ADC S1JA

r_sdmmc SDHI Driver for SDIO and SD/MMC Memory Devices S3A1, S3A3, S3A7, S5D5, S5D9, S7G2

r_slcdc Segment LCD Controller S3A1, S3A3, S3A6, S3A7

r_ssi (Inter-IC Sound) Interface [old: Serial Sound Interface] or r_i2s

S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_wdt Watchdog Timer S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

r_sce# Cryptographic Library (HAL interfaces)

See table note on Cryptographic Functions.



Module Name SSP Feature Supported Synergy MCU Groups Framework

sf_adc_periodic Periodic Sampling ADC S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_audio_playback Audio Playback S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_audio_playback_hw_dac Audio Playback HW DAC S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_audio_playback_hw_i2s Audio Playback HW I2S S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_audio_record_adc Audio Record ADC S124, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_audio_record_i2s Audio Record I2S S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_ble_rl78g1d BLE Framework S124, S128, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_ble_rl78g1d_onboard_profile BLE Framework Onboard Profiles S124, S128, S3A3, S3A6, S3A7,

S5D5, S5D9, S7G2 sf_block_media_qspi File System Support on QSPI S3A3, S3A7, S5D5, S5D9, S7G2 sf_block_media_ram File System Support on RAM S3A3, S3A7, S5D9, S7G2

sf_block_media_sdmmc Block Media Interface for SD Multi Media Card S3A3, S3A7, S5D9, S7G2

sf_comms_telnet Synergy Telnet Communication Interface S5D5, S5D9, S7G2

sf_console Console S124, S128, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_el_fx Synergy FileX interface S3A1, S3A3, S3A7, S5D9, S7G2 sf_el_gx Synergy GUIX Interface S7G2, S5D9 sf_el_nx Synergy NetX Interface S5D5, S5D9, S7G2

sf_el_nx_comms Synergy NetX Communication Interface S5D5, S5D9, S7G2

sf_el_ux Synergy USBX Interface S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_el_ux_comms† Synergy USBX Communication Interface


sf_el_ux_comms_v2 Synergy USBX Communication Interface V2

S1JA, S124, S128, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_external_irq External Interrupt S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_i2c I2C Framework S124, S128, S3A3, S3A6, S3A7, S5D5, S7G2

sf_jpeg_decode JPEG Decode S5D9, S7G2

sf_message Inter-Thread Messaging S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_power_profiles† Power Mode Profile S124, S3A7, S7G2

sf_power_profiles_v2 Power Mode Profile V2 S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_spi SPI Framework S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_tes_2d_drw 2D Drawing Engine Framework S5D9, S7G2

sf_thread_monitor Thread Monitor (Watchdog) S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_touch_ctsu Capacitive Touch Sensing Unit S124, S128, S3A3, S3A7, S5D9, S7G2



# Framework Interfaces for Cryptographic Functions (sf_crypto) available for this release include: HASH, TRNG, and Key Generation (RSA and AES).

## Cryptographic Functions: See table listing Cryptographic Functions available for each MCU in this Release; these functions are accessible as part of r_sce/cryptographic library.

sf_touch_ctsu_button Capacitive Touch Sensing Unit Button

S124, S128, S3A3, S3A7, S5D9, S7G2

sf_touch_ctsu_slider Capacitive Touch Sensing Unit Slider

S124, S128, S3A3, S3A7, S5D9, S7G2

sf_touch_panel_i2c Touch Panel I2C S5D9, S7G2

sf_uart_comms UART Framework S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_wifi_gt202 WiFi Framework S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_wifi_gt202_onchip WiFi framework on Chip Stack S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_cellular_cat1 Cellular Framework CAT S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_cellular_cat1_socket Cellular Framework CAT Socket S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_cellular_cat3 Cellular Framework CAT S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_cellular_cat3_socket Cellular Framework CAT Socket S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_cellular_catm1 Cellular Framework CATM1 S5D9, S7G2

sf_cellular_catm1_socket Cellular Framework CATM1 Socket S5D9, S7G2

sf_crypto# Cryptographic Framework S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2 See table note on Framework Interfaces for Cryptographic Functions.

sf_crypto_cipher## Crypto-Framework Cipher Module

sf_crypto_hash## Crypto Framework HASH Module S5D5, S5D9, S7G2

sf_crypto_key## Crypto Framework Key Module S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_crypto_key_installation## Crypto Framework Key Installation Module

S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

sf_crypto_signature## Crypto Framework Signature Module S5D5, S5D9, S7G2

sf_crypto_trng## Crypto True Random Number Generator

S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9,S7G2

Module Name SSP Feature Supported Synergy MCU Groups X-Ware Stacks fx FileX S124, S3A3, S3A6, S3A7, S5D9, S7G2 gx GUIX S5D9, S7G2 nx NetX S5D9, S7G2 nx_auto_ip NetX Auto IP S5D9*, S7G2 nx_bsd NetX BSD S5D9*, S7G2 nx_dhcp_client NetX DHCP Client S5D9*, S7G2 nx_dhcp_server NetX DHCP Server S5D9*, S7G2 nx_dns_client NetX DNS Client S5D9*, S7G2 nx_ftp_client NetX FTP Client S5D9*, S7G2 nx_ftp_server NetX FTP Server S5D9*, S7G2



nx_http_client NetX HTTP Client S5D9*, S7G2 nx_http_server NetX HTTP Server S5D9*, S7G2 nx_pop3 NetX POP3 S5D9*, S7G2 nx_ppp NetX PPP S5D9*, S7G2* nx_smtp_agent NetX SMTP Agent S5D9*, S7G2 nx_smtp_client NetX SMTP Client S5D9*, S7G2 nx_sntp_client NetX SNTP Client S5D9*, S7G2 nx_telnet_client NetX Telnet Client S5D9*, S7G2 nx_telnet_server NetX Telnet Server S5D9*, S7G2 nx_tftp_client NetX TFTP Client S5D9*, S7G2 nx_tftp_server NetX TFTP Server S5D9*, S7G2 nxd NetX Duo Stack S5D9*, S7G2 nxd_auto_ip NetX Duo Auto IP S5D9*, S7G2 nxd_bsd NetX Duo BSD S5D9*, S7G2 nxd_dhcp NetX Duo DHCP IPv4 Client S5D9*, S7G2 nxd_dhcp NetX Duo DHCP IPv6 Client S5D9*, S7G2 nxd_dhcp_server NetX Duo DHCP IPv4 Server S5D9*, S7G2 nxd_dhcp_server NetX Duo DHCP IPv6 Server S5D9*, S7G2 nxd_dns NetX Duo DNS Client S5D9*, S7G2 nxd_ftp_client NetX Duo FTP Client S5D9*, S7G2 nxd_ftp_server NetX Duo FTP Server S5D9*, S7G2

nxd_http_client NetX Duo HTTP Client S5D9*, S7G2

nxd_http_server NetX Duo HTTP Server S5D9*, S7G2 nxd_nat NetX Duo NAT S5D9*, S7G2 nxd_pop3 NetX Duo POP3 S5D9*, S7G2 nxd_ppp NetX Duo PPP S5D9*, S7G2* nxd_smtp_client NetX Duo SMTP Client S5D9*, S7G2 nxd_sntp_agent NetX Duo SNTP Agent S5D9*, S7G2 nxd_sntp_client NetX Duo SNTP Client S5D9*, S7G2 nxd_telnet_client NetX Duo Telnet Client S5D9*, S7G2 nxd_telnet_server NetX Duo Telnet Server S5D9*, S7G2 nxd_tftp_client NetX Duo TFTP Client S5D9*, S7G2 nxd_tftp_server NetX Duo TFTP Server S5D9*, S7G2 nxd_mqtt_client NetX Duo MQTT Client S5D9, S7G2 nxd_tls_secure NetX Duo TLS Secure S5D9, S7G2

tx ThreadX S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D5, S5D9, S7G2

ux_device_class_storage USBX Device Class Mass Storage

S1JA, S124, S128, S3A1, S3A3, S3A6, S3A7, S5D9, S7G2

ux_device_class_hid USBX Device Class HID S124, S128, S3A3, S3A6, S3A7, S5D9, S7G2

ux_device_class_cdc_acm USBX Device Class CDC-ACM

S124, S128, S3A3, S3A6, S3A7, S5D9, S7G2

ux_host_class_cdc_acm USBX Host Class CDC-ACM S3A3, S3A6, S3A7, S5D9, S7G2, ux_host_class_hid USBX Host Class HID S3A3, S3A7, S5D9,S7G2 ux_host_class_hub USBX Host HUB S5D9, S7G2

ux_host_class_storage USBX Host Class Mass Storage S3A3, S3A7, S5D9, S7G2



Cryptographic Functions Available for each MCU in this Release

Function S7G2, S5D9, S5D5 S3A1, S3A3, S3A7, S3A6

S1JA, S124, S128

TRNG Generate and read random number

Generate and read random number

Generate and read random number

AES Encryption, decryption, Encryption, decryption Encryption, decryption AES Key Size 128-bit, 192-bit, 256-bit 128-bit, 256-bit 128-bit, 256-bit AES Key Type Plain text / raw key,

Wrapped key Plain text / raw key, Wrapped key

Plain text / raw key

AES Chaining Modes ECB, CBC, CTR, GCM, XTS†† ECB, CBC, CTR, GCM, XTS

ECB, CBC, CTR

ARC4 Encryption, decryption NA NA TDES Encryption, decryption NA NA TDES Key Size 192-bit NA NA TDES Chaining Modes ECB, CBC, CTR NA NA RSA • Signature Generation

• Signature Verification • Public-key Encryption • Private-key Decryption • Key Generation – plain

text and wrapped keys

NA NA

RSA Key Size 1024-bit, 2048-bit NA NA RSA Key Type Plain text / raw key,

Wrapped key NA NA

Key Installation AES, ECC, RSA keys AES keys NA ECC • Key Generation – plain

text and wrapped keys; • Scalar Multiplication; • ECDSA- Signature

Generation • ECDSA -Signature

Verification

NA NA

ECC Key Size P-192, P-256 NA NA

ECC Key Type Plain text/ raw keys and wrapped keys

NA NA

DSA Signature Generation, Signature Verification

NA NA

DSA Key Size (1024, 128)-bit, (2048, 224)-bit, (2048, 256)-bit

NA NA

HASH SHA1, SHA224, SHA256, MD5

NA NA

* NetX and NetX Duo Applications are MCU-independent application layer protocols depend on the NetX and Ethernet drivers. All MCUs on which NetX has been tested and verified support these protocols.

† Indicates a module that is deprecated starting with SSP v1.3.0 and all subsequent versions. Deprecated modules will only be available to maintain compatibility with existing projects that may be using them. It is highly recommended that new projects use the recommended replacements and not use deprecated modules. For details, see the SSP User’s Manual.

†† XTS is supported for 128-bit and 256-bit keys only.



Experimental modules: Modules that are dependent on a driver which has been tested and supported on a particular MCU, but the module in itself has not been tested on the MCU, have been identified as experimental module in the following table. These experimental modules are currently not supported by Synergy Configuration tools and use of these modules in customer projects is not supported by Renesas at this time.

Experimental Modules ux_device_class_cdc_ecm USBX Device Class CDC-ECM S124, S3A3, S3A7, S5D9, S7G2 ux_device_class_rndis USBX Device Class RNDIS S124, S3A3, S3A7, S5D9, S7G2 ux_host_class_gser USBX Host Class Generic Serial S3A3, S3A7, S5D9, S7G2 ux_host_class_printer USBX Host Class Printer S3A3, S3A7, S5D9, S7G2 ux_host_class_prolific USBX Host Class Prolific S3A7, S3A3, S5D9, S7G2 ux_host_class_swar USBX Host Class Swar S3A7, S3A3, S5D9, S7G2 ux network driver USBX Network Driver S124, S3A3, S3A7, S5D9,S7G2,

10. Additional technical notes All SSP modules are tested using the default configuration settings in the e2 studio and IAR EW for Synergy compiler, operation of the modules with other configurations are not guaranteed.

• Subscribe to the Synergy Technical Bulletin Board to receive the latest technical news and notifications about new features, known issues, workarounds, and release announcements. To subscribe, visit http://renesasrulz.com/synergy/synergy_tech_notes/f/214.aspx. Sign in to Renesas Rulz, and press ‘Email Subscribe to this forum’.

• Additional technical information, including informative papers and articles on SSP and Synergy can be found at Synergy Knowledge Base, https://en-us.knowledgebase.renesas.com/English_Content/Renesas_Synergy%E2%84%A2_Platform

http://renesasrulz.com/synergy/synergy_tech_notes/f/214.aspx

https://en-us.knowledgebase.renesas.com/English_Content/Renesas_Synergy%E2%84%A2_Platform

https://en-us.knowledgebase.renesas.com/English_Content/Renesas_Synergy%E2%84%A2_Platform



Website and Support Support: https://synergygallery.renesas.com/support

Technical Contact Details:

• America: https://www.renesas.com/en-us/support/contact.html • Europe: https://www.renesas.com/en-eu/support/contact.html • Japan: https://www.renesas.com/ja-jp/support/contact.html All trademarks and registered trademarks are the property of their respective owners.

https://synergygallery.renesas.com/support

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Revision History

Rev. Date Description Page Summary

1.00 Mar 28 2018 — Initial release 1.01 Mar 29, 2018 — SSP v.1.4.0 corrections and updates throughout 1.02 Apr 13, 2018 — Added missing modules and made minor corrections 1.03 May 1, 2018 14 Issue ID 10581 nxd_mqtt_client updated to indicate it is fixed

SSP v1.4.0 Release Note Publication Date: Rev.1.03 May 1, 2018 Published by: Renesas Electronics Corporation

http://www.renesas.comRefer to "http://www.renesas.com/" for the latest and detailed information.

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