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1 Next Generation On-Chip Networks: What Kind of Congestion Control Do We Need? George Nychis, Chris Fallin, Thomas Moscibroda, Onur Mutlu Carnegie Mellon
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Ultra Fine-Grained Run-Time Power Gating of On-Chip Routers for CMPs Hiroki Matsutani Michihiro Koibuchi Daisuke Ikebuchi Kimiyoshi Usami Hiroshi Nakamura
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How does it work and what should people know to participate “Work-depth” Alg Methodology (SV82) State all ops you can do in parallel. Repeat. Minimize:
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Aérgia: Exploiting Packet Latency Slack in On-Chip Networks
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Aérgia: Exploiting Packet Latency Slack in On-Chip Networks
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The Era of Many-Module SoC : Revisiting the NoC Mapping Problem
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Ultra Fine-Grained Run-Time Power Gating of On-Chip Routers for CMPs
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How does it work and what should people know to participate
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