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    SIES GRADUATE SCHOOL OF TECHNOLOGY

    NERUL, NAVI MUMBAI

    DEPARTMENT OF COMPUTER ENGG.

    BRANCH: CE YEAR/SEM:TE/V

    MICROPROCESSOR

    LIST OF EXPERIMENTS

    1. ALP TO ADD AND SUBTRACT 2 8-BIT NUMBERS IN BCD2. ALP TO MULTIPLY AND DIVIDE 2 8-BIT NUMBERS IN BCD3. ALP TO ADD 16-BIT NUMBERS IN BCD4. ALP TO GENERATE PACKED BCD FROM ASCII5. ALP TO FIND FACTORIAL OF A NUMBER6. ALP TO SORT ARRAY ELEMENTS7. ALP TO FIND MAX IN ARRAY8. ALP TO DISPLAY CHARACTERS A-Z9. ALP TO CONCATENATE STRINGS10. ALP TO CONVERT LOWERCASE TO UPPERCASE11.ALP TO INTERFACE 8255 IN I/O MODE12.ALP TO INTERFACE 8253 IN MODE-313.MIXED LANGUAGE PROGRAM TO EMULATE CALCULATOR14.MIXED LANGUAGE PROGRAM TO FIND SUM OF ELEMENTS OF

    ARRAY

    ______________________________________________________________________________________Department of Computer Engineering SIES GST1

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    EXPERIMENT NO: 01(a)

    BCD ADDITION

    AIM: To perform two 8 bit BCD additions.

    THEORY: Instructions used in program:

    MOV: (Move)This data transfer instruction transfers data from one register/memory location to another

    register/memory location. The source may be nay one of the segment registers or other

    general or special purpose registers or a memory location and another register/memory

    location may act as destination. However, in case of immediate addressing mode, a

    segment register cannot be a destination register. In other words, direct loading of the

    segment registers with immediate data is not permitted. To load the segment registers

    with immediate data, one will have to load any general purpose register with the data and

    then it will have to be moved to that particular segment register.

    The arithmetic instructions add data in registers or memory.

    ADD: (Add)

    This instruction adds an immediate data or contents of a memory location specified in the

    instruction or a register (source) to the contents of another register (destination) or

    memory location. The result is in the destination operand. However, both the source and

    destination operands cannot be memory operands. Also contents of segment registers

    ______________________________________________________________________________________Department of Computer Engineering SIES GST2

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    cannot be added using this instruction. All the condition code flags are affecteddepending on the result.

    STEPS:

    Store the 8-bit numbers in registers or memory locations.

    Use add i n s t r u ct i o n t o a dd t wo n umb er s .

    Us e DAA t o c o nv e r t t o BCD.

    Store the result in register or memory location.

    CONCLUSION: Assembly coding is done to add two 8-bit numbers, numbers and result

    both are stored in registers. As the program is written using the basic operations of the

    processor, the program forms the basis of any efficient application that includes

    mathematical operations.

    ______________________________________________________________________________________Department of Computer Engineering SIES GST3

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    EXPERIMENT NO: 01(b)

    BCD SUBTRACTION

    AIM: To perform two 8 bit BCD subtractions.

    THEORY: Instructions used in program:

    MOV: (Move)This data transfer instruction transfers data from one register/memory location to another

    register/memory location. The source may be nay one of the segment registers or other

    general or special purpose registers or a memory location and another register/memory

    location may act as destination. However, in case of immediate addressing mode, a

    segment register cannot be a destination register. In other words, direct loading of the

    segment registers with immediate data is not permitted. To load the segment registers

    with immediate data, one will have to load any general purpose register with the data and

    then it will have to be moved to that particular segment register.

    The arithmetic instructions add data in registers or memory.

    SUB: The subtract instruction subtracts the source operand from the destination operand

    and the result is left in the destination operand. Source operand may be a register,

    memory location or immediate data and the destination operand may be a register or a

    memory location. But source and destination operands both must not be memory

    operands. Destination operand cannot be an immediate data. All the condition code flags

    are affected by the instruction.

    ______________________________________________________________________________________Department of Computer Engineering SIES GST4

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    DAS: Decimal Adjust after Subtraction

    This instruction converts the result of subtraction of two packed BCD numbers to a valid

    BCD number. The subtraction has to be in AL only. If the lower nibble of AL is greater

    than 9, this instruction will subtract 06 from lower nibble of Al. If the result of

    subtraction sets the carry flag or if upper nibble is greater than 9, it subtracts 60H from

    AL. This instruction modifies the AF,CF,SF,PF, and ZF flags. The OF is undefined after

    DAS instruction.

    STEPS:

    Store the 8-bit numbers in registers or memory locations.

    Use sub i ns t r u c t i on t o subtract two numbers.

    Use DAS to covert to BCD.

    Store the result in register or memory location.

    CONCLUSION: Assembly coding is done to subtract two 8-bit numbers, numbers and

    result both are stored in registers. As the program is written using the basic operations of

    the processor, the program forms the basis of any efficient application that includes

    mathematical operations.

    ______________________________________________________________________________________Department of Computer Engineering SIES GST

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    EXPERIMENT NO: 02(a)

    MULTIPLICATION

    AIM: To perform BCD Multiplication.

    THEORY: Instructions used in program:

    MOV: (Move)

    This data transfer instruction transfers data from one register/memory location to another

    register/memory location. The source may be nay one of the segment registers or other

    general or special purpose registers or a memory location and another register/memory

    location may act as destination. However, in case of immediate addressing mode, a

    segment register cannot be a destination register. In other words, direct loading of the

    segment registers with immediate data is not permitted. To load the segment registers

    with immediate data, one will have to load any general purpose register with the data and

    then it will have to be moved to that particular segment register.

    MUL: Unsigned Multiplication Byte or Word

    This instruction multiplies an unsigned byte or word by the contents of AL. The unsigned

    byte or word may be in any one of the general purpose registers or memory locations.

    The most significant word of the result is stored in AX. All the flags are modified

    depending upon the result. Immediate operand is not allowed in this instruction.

    AAM: ASCII adjust after Multiplication

    This instruction, after execution, converts the product available in AL into unpacked

    BCD format. This instruction follows multiplication instruction that multiplies two

    ______________________________________________________________________________________Department of Computer Engineering SIES GST6

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    unpacked BCD operands, that is, higher nibbles of the multiplication operands should be

    0. The multiplication of such operands is carried out using MUL instruction. The result of

    multiplication is available in AX.

    STEPS:

    Store the 8-bit numbers in registers or memory locations.

    Us e mul i ns t r uc t i on t o mul t i p l y t wo number s .

    Use AAM to covert to BCD.

    Store the result in register or memory location.

    CONCLUSION: Assembly language code is written to multiply two 8-bit numbers;

    numbers and result both are stored in registers. As the program is written using the basic

    operations of the processor, the program forms the basis of any efficient application that

    includes mathematical operations.

    ______________________________________________________________________________________Department of Computer Engineering SIES GST

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    EXPERIMENT NO: 02(b)

    DIVISION

    AIM: To perform 8 bit subtraction.

    THEORY: Instructions used in program:

    MOV: (Move)

    This data transfer instruction transfers data from one register/memory location to another

    register/memory location. The source may be nay one of the segment registers or other

    general or special purpose registers or a memory location and another register/memory

    location may act as destination. However, in case of immediate addressing mode, a

    segment register cannot be a destination register. In other words, direct loading of the

    segment registers with immediate data is not permitted. To load the segment registers

    with immediate data, one will have to load any general purpose register with the data and

    then it will have to be moved to that particular segment register.

    AAD: ASCII Adjust before Division

    This instruction converts two unpacked BCD digits in AH and AL to the equivalent

    binary number in AL. This adjustment must be made before dividing the two unpacked

    BCD digits in AX by an unpacked BCD type. PF, SF, ZF are modified while AF, CF, OF

    are undefined, after the execution of the instruction AAD.

    DIV: (unsigned Division)

    This instruction performs unsigned division. It divides an unsigned word or double word

    by a 16-bit or 8-bit operand. The dividend must be in AX for 16-bit operation and divisor______________________________________________________________________________________Department of Computer Engineering SIES GST8

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    may be specified using any one of the addressing modes except immediate. The result

    will be in AL while AH will contain the remainder. If the result is too big to fit in AL,

    type 0 interrupt is generated. In case of a double word dividend (32-bit), the higher word

    should be in DX and lower word should be in AX. The divisor may be specified as

    explained earlier. The quotient and remainder will be in AX and DX respectively. The

    instruction does not affect any flag.

    STEPS:

    Store the 16-bit number and 8-bit number in registers or memory locations.

    Us e d i v i ns t r uc t i o n t o d i v i de t wo number s .

    Use AAD to covert to BCD.

    Store the result in register or memory location.

    CONCLUSION: Assembly coding is done to divide 16-bit number by 8-bit number,

    numbers and result both are stored in registers. As the program is written using the basic

    operations of the processor, the program forms the basis of any efficient application that

    includes mathematical operations.

    ______________________________________________________________________________________Department of Computer Engineering SIES GST

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    EXPERIMENT NO: 03

    BCD ADDITION

    AIM: To perform 16 bit BCD addition.

    THEORY: Instructions used in program:

    MOV: (Move)

    This data transfer instruction transfers data from one register/memory location to another

    register/memory location. The source may be nay one of the segment registers or other

    general or special purpose registers or a memory location and another register/memory

    location may act as destination. However, in case of immediate addressing mode, a

    segment register cannot be a destination register. In other words, direct loading of the

    segment registers with immediate data is not permitted. To load the segment registers

    with immediate data, one will have to load any general purpose register with the data and

    then it will have to be moved to that particular segment register.

    The arithmetic instructions add data in registers or memory.

    ADD: (Add)

    This instruction adds an immediate data or contents of a memory location specified in the

    instruction or a register (source) to the contents of another register (destination) or

    memory location. The result is in the destination operand. However, both the source and

    destination operands cannot be memory operands. Also contents of segment registers

    cannot be added using this instruction. All the condition code flags are affected

    depending on the result.

    ______________________________________________________________________________________Department of Computer Engineering SIES GST

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    ADC: Add with Carry

    This instruction adds the carry flag bit to the result. All the condition code flags are

    affected by this instruction.

    DAA: DAA instruction (Decimal Adjust Accumulator) allows conversion of the 8-bit

    accumulator value to Binary Coded Decimal (BCD). If the low-order 4 bits of the

    accumulator are greater than 9, or the auxilliary carry flag is set, 6 is added to the low-

    order 4 bits of accumulator, then if the high-order 4 bits of the accumulator are greater

    than 9, or the carry flag is set, 6 is added to the high-order 4 bits of the accumulator.

    STEPS:

    Store the 16-bit numbers in registers or memory locations.

    Us e ADD i ns t r uc t i o n t o ADD l ower b yt es .

    Use DAA to covert to BCD.

    Us e ADD i ns t r uc t i o n t o ADD hi gher by t es .

    Use DAA to covert to BCD.

    Store the result in register or memory location.

    CONCLUSION: Assembly coding done to perform 16-bit addition and result converted

    to BCD using DAA instruction.

    ______________________________________________________________________________________Department of Computer Engineering SIES GST11

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    EXPERIMENT NO: 04

    BCD FROM ASCII

    AIM: To produce a packed BCD from two ASCII encoded digits.

    THEORY: Instructions used in program:

    MOV: (Move)

    This data transfer instruction transfers data from one register/memory location to another

    register/memory location. The source may be nay one of the segment registers or other

    general or special purpose registers or a memory location and another register/memory

    location may act as destination. However, in case of immediate addressing mode, a

    segment register cannot be a destination register. In other words, direct loading of the

    segment registers with immediate data is not permitted. To load the segment registers

    with immediate data, one will have to load any general purpose register with the data and

    then it will have to be moved to that particular segment register.

    AND: (Logical AND)

    This instruction bit by bit ANDs the source operand that may be an immediate, a register

    or a memory location to the destination operand that may be a register or a memory

    location. The result is stored in the destination operand. At least one of the operand

    should be a register or a memory operand. Both the operands cannot be memory locations

    or immediate operands. An immediate operand cannot be a destination operand.

    ______________________________________________________________________________________Department of Computer Engineering SIES GST12

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