testability / design-to-test (dfmat)

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Testability / Design-to-Test (DFMAT) Testability / Design-to-Test (DFMAT) eXpress Users’ Group Meeting eXpress Users’ Group Meeting September 22, 2006 September 22, 2006

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Testability / Design-to-Test (DFMAT). eXpress Users’ Group Meeting September 22, 2006. Agenda. Project Vision and Goals Integrated Diagnostics/Testability Concepts Sample Satellite Application Functional overview of process Sample diagnostic study Exported test parameters - PowerPoint PPT Presentation

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Page 1: Testability / Design-to-Test (DFMAT)

Testability / Design-to-Test (DFMAT)Testability / Design-to-Test (DFMAT)

eXpress Users’ Group MeetingeXpress Users’ Group MeetingSeptember 22, 2006September 22, 2006

Page 2: Testability / Design-to-Test (DFMAT)

Page 2

AgendaAgendaAgendaAgenda

Project Vision and GoalsProject Vision and Goals Integrated Diagnostics/Testability ConceptsIntegrated Diagnostics/Testability Concepts Sample Satellite ApplicationSample Satellite Application

Functional overview of process Sample diagnostic study

Exported test parametersExported test parameters Specific examples of transferring of test vectors

Test vectors used by capable Test ExecutiveTest vectors used by capable Test Executive

Page 3: Testability / Design-to-Test (DFMAT)

Page 3

Project MissionProject MissionProject MissionProject Mission

Enhance Boeing Satellite’s Integration and Test environment:Enhance Boeing Satellite’s Integration and Test environment: Implement an effective Testability Analysis capability incorporated

into the spacecraft design process to ensure that correct and efficient verification and validation is accomplished.

BIT only solves Unit level problems, System level is not analyzed. Focused sequencing and real-time diagnostics are not available. Outsourced suppliers need to be integrated into the design analysis.

Eliminate manual processes needed to create Bus TRD, Payload TRD and test databases, and enable validation of test databases prior to production.

Create a Standardized Test Environment that will eliminate or reduce complex NRE development costs and long cycle times.

Move to a strategy of Integrated Diagnostics and an embedded IVHM / ISHM system to leverage enterprise resources and enable self-maintenance.

A standardized test architecture provides reliability, efficiency and cost savings, A standardized test architecture provides reliability, efficiency and cost savings, which directly impacts the ability for Boeing Satellites to be more cost competitive!which directly impacts the ability for Boeing Satellites to be more cost competitive!

Page 4: Testability / Design-to-Test (DFMAT)

Page 4

Areas of FocusAreas of FocusAreas of FocusAreas of Focus

Integration of Functional DepartmentsIntegration of Functional Departments Development/Enhancement of System Engineering processesDevelopment/Enhancement of System Engineering processes Risk ManagementRisk Management

Identification Risk prioritization Mitigation strategies

DDesign esign FFor or MManufacturing, anufacturing, AAssembly and ssembly and TTest (DFMAT) est (DFMAT) implementation for Test (V&V)implementation for Test (V&V)

Integration of Project Management and System EngineeringIntegration of Project Management and System Engineering Proposal DevelopmentProposal Development

Page 5: Testability / Design-to-Test (DFMAT)

Page 5

System EngineeringHardware

Engineering

Test Engineering

RMT&A Engineering

Logistics Engineering

Factory Support Engineering

Software Engineering

Diagnostic products are distributed across many IPTs, skill families, Boeing business units, and suppliers.

Many historical problems were due to poorly specified or poorly integrated products, and inconsistent or inefficient processes. This can occur even when the individual products meet their own local requirements.

SupplierManagement

Traditional Product DevelopmentTraditional Product DevelopmentTraditional Product DevelopmentTraditional Product Development

Page 6: Testability / Design-to-Test (DFMAT)

Page 6

RequirementsDefinition

ArchitectureDefinition

Design Guidance(Lessons Learned)

Verification &Validation

Flight Testing &Field Maturation

DesignAnalysis

Logistics Engineering

RMT&A Engineering

Integrated Diagnostics System Engineering

Hardware Engineering

Software Engineering

Test Engineering

Factory Support Engineering

ID Requires a Structured SEIT ProcessID Requires a Structured SEIT ProcessID Requires a Structured SEIT ProcessID Requires a Structured SEIT Process

Page 7: Testability / Design-to-Test (DFMAT)

Page 7

DFMAT VisionDFMAT Vision

Design

TestManufacturing

Influ

ence

Influence

Connectivity

Page 8: Testability / Design-to-Test (DFMAT)

Page 8

Future ISF Test EnvironmentFuture ISF Test EnvironmentFuture ISF Test EnvironmentFuture ISF Test Environment

Stabilize environment *** Productivity enhancements *** Phased approach

Proc or TPS

EngineeringAnalysisTools &Utilities

Enterprise/Material Resource

Planning

T&C Test Equipment Payload Test EquipmentBus Test Equipment DSP Test Equipment

Design-To-Test (DTT)Sub-Environment

System SW System SW System SW System SW

Test ProgrammingSub-Environment

Test Equipment StandardI/F Sub-Environment

CAEE/CAD &Diagnostic SW

(Expert Systems)MRP/MRP II/ERP/etc. SW

TestEnvironment

EngineeringEnvironment

BusinessEnvironment

Test DataDB (TDDB)

Reports

TestResults

Database

DiagnosticFeedback

TEST

EXECUTIVE

EnvironmentFunctionSW Type

System SW

Other Test Equipment

Test Equipment/System Environment

USSED

OperationalInfo

SpacecraftT&C Info

Implement Priority

Phase IPhase IIPhase III

Test StrategyDatabase

TestSequence &Diagnostic

Info

OperationsDatabase

T&C Sub-Environment

Test Results AnalysisSub-Environment

DatabaseSub-Environment

T&CEngine

Page 9: Testability / Design-to-Test (DFMAT)

Page 9

Full Testability/DTT EnvironmentFull Testability/DTT EnvironmentFull Testability/DTT EnvironmentFull Testability/DTT Environment

Test Exec

eXpressDiagnostic

Tool

DiagMLDB File

InputModel File

TestResults DB

Instruments

Payload TestExec GUI

TRDSystem

TRDProject File

TRDDocument

UUT

CAD/CAEE

Software

TestStrategy DB

Test Executive

Data storage

Test Prog Set (TPS)

DTT Components

Hardware

Page 10: Testability / Design-to-Test (DFMAT)

Page 10

Basic eXpress FeaturesBasic eXpress FeaturesBasic eXpress FeaturesBasic eXpress Features

Documents and stores information in shared “data warehouse Documents and stores information in shared “data warehouse Captures the functional design elements into dynamic models Integrates various design, test and RMT information Analyzes hardware and software interactions

Establishes dependencies among componentsEstablishes dependencies among components Identifies and characterizes hierarchical propagation of faults

Creates a test strategyCreates a test strategy Identifies and analyzes test point locations

Develops a diagnostic flowDevelops a diagnostic flow Identifies and enhances fault isolation capabilities Improves focus on “fault groups”

Uses Concurrent Engineering to synergize Design and TestUses Concurrent Engineering to synergize Design and Test Experts in different functional disciplines access (use) the same

system Removes “stovepiped” functions

Page 11: Testability / Design-to-Test (DFMAT)

Page 11

eXpress’s Contribution to Fill the GapeXpress’s Contribution to Fill the GapeXpress’s Contribution to Fill the GapeXpress’s Contribution to Fill the Gap

Diagnostic ImprovementDiagnostic Improvement Realize Concurrent Engineering benefits

Testability ImprovementTestability Improvement Test sequence optimization Test point placement Reliability Minimize regression testing

Test Optimization ImprovementTest Optimization Improvement Creating optimized test plans

In certain sequences When units are missing When failed units must be bypassed Temporary unit placement

Assure 100% test coverage Prevent over/under testing Lower Mean Time to Isolate (MTTI) Reduction in unresolved “No Fault Found” anomalies Improved Safety Through Critical Fault Analysis (FMECA) Reduced Life Cycle Cost

Page 12: Testability / Design-to-Test (DFMAT)

Page 12

Integrated Diagnostic AnalysisIntegrated Diagnostic AnalysisIntegrated Diagnostic AnalysisIntegrated Diagnostic Analysis

Engineering AnalysisEngineering Analysis Test point placement Test sequence recommendations Fault coverage

Reliability, Maintainability and Testability AnalysisReliability, Maintainability and Testability Analysis FMECA reports Improve our ability to evaluate Risk and exploit Opportunities

Test AnalysisTest Analysis Sequence optimization Special Test Request (STR) re-sequencing

Test OperationsTest Operations Export / Import of “test vectors” via DiagML (ATML) Automatic capturing of “Lessons Learned”

Page 13: Testability / Design-to-Test (DFMAT)

Page 13

Testability OverviewTestability OverviewTestability OverviewTestability Overview

eXpress

Test PlanFunction

BlockDiagram

GUI

Design Model

ReportGenerationFunction

Linked TabDelimited Files

Symbol Files(.emf, .wmf)

Symbol Libraries(.exs)

Part Libraries(.exp)

Pre-existingDesigns

(.exd)

DiagML Interface

P/L Test MatrixData(.tmd)

Standard Reports(.rtf)

Custom ReportAttribute and

Parameter Data(.apd)

ObjectBrowser

GUI

TRDGUI

DesignModel

Function

PayloadDesign

(.eng)

Page 14: Testability / Design-to-Test (DFMAT)

Page 14

Design-to-Test – eXpress IntegrationDesign-to-Test – eXpress IntegrationDesign-to-Test – eXpress IntegrationDesign-to-Test – eXpress Integration

1. UUT Model Input

2. Test Data Input

Page 15: Testability / Design-to-Test (DFMAT)

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Design-to-Test – eXpress Integration…Design-to-Test – eXpress Integration…Design-to-Test – eXpress Integration…Design-to-Test – eXpress Integration…

3. Test Strategy Generation

4. DiagML Export

Page 16: Testability / Design-to-Test (DFMAT)

Page 16

Satellite Payload Diagnostic StudySatellite Payload Diagnostic StudySatellite Payload Diagnostic StudySatellite Payload Diagnostic Study

Page 17: Testability / Design-to-Test (DFMAT)

Page 17

Exported Parameters to ExcelExported Parameters to ExcelExported Parameters to ExcelExported Parameters to ExcelObject Abbreviation Object Type Item Reference Failure Prob. Method Description Gain Noise Figure Reliability (FR) [+]

1 001 T Sw Component Default Precedence T-Switch 0 0 0.000012 001A T Sw Component 001A T Sw Default Precedence T-Switch 0 0 0.000013 002 T Sw Component Default Precedence T-Switch 0 0 0.000014 002A T Sw Component 002A T Sw Default Precedence T-Switch 0 0 0.000015 003 T Sw Component Default Precedence T-Switch 0 0 0.000016 003A T Sw Component 003A T Sw Default Precedence T-Switch 0 0 0.000017 004 T Sw Component Default Precedence T-Switch 0 0 0.000018 004A T Sw Component 004A T Sw Default Precedence T-Switch 0 0 0.000019 005 T Sw Component Default Precedence T-Switch 0 0 0.00001

10 006 T Sw Component Default Precedence T-Switch 0 0 0.0000111 007 T Sw Component Default Precedence T-Switch 0 0 0.0000112 008 T Sw Component Default Precedence T-Switch 0 0 0.0000113 009 T Sw Component Default Precedence T-Switch 0 0 0.0000114 010 T Sw Component Default Precedence T-Switch 0 0 0.0000115 011 T Sw Component Default Precedence T-Switch 0 0 0.0000116 012 T Sw Component Default Precedence T-Switch 0 0 0.0000117 1:04 Component Default Precedence 1:4 Splitter 0 0 0.0000118 1:04 Component Default Precedence 1:4 Splitter 0 0 0.00001

19CMDDF1 Component CDF1 Default Precedence Command Despread Fwd -0.3 0 0.00001

20 OMT1 Component OMT1 Default Precedence Square -0.5 0 0.00001

21 TRF1 Component TRF1 Default Precedence

TRFJune 6 2008 Installed June 7 2006 Removed TA 123 0 0 0.00001

22 TRF2 Component Default Precedence TRF 0 0 0.00001

23GW1Antenna Component GW1 Default Precedence Antenna 20 0 1

24 <UNNAMED> Component CA546K-1 Default Precedence Coax Attenuator 0 0 1.125 <UNNAMED> Component CA546K-1 Default Precedence Coax Attenuator 0 0 1.126 <UNNAMED> Component CA546K-1 Default Precedence Coax Attenuator 0 0 1.127 <UNNAMED> Component CA546K-1 Default Precedence Coax Attenuator 0 0 1.128 <UNNAMED> Component CA546K-1 Default Precedence Coax Attenuator 0 0 1.129 <UNNAMED> Component CA546K-1 Default Precedence Coax Attenuator 0 0 1.130 <UNNAMED> Component CA546K-1 Default Precedence Coax Attenuator 0 0 1.131 <UNNAMED> Component CA546K-1 Default Precedence Coax Attenuator 0 0 1.132 BPF1 Component BPF1 Default Precedence Band-Pass Filter -2 0 1.133 BPF2 Component BPF2 Default Precedence Band-Pass Filter -2 0 1.134 BPF3 Component BPF3 Default Precedence Band-Pass Filter -2 0 1.135 BPF4 Component BPF4 Default Precedence Band-Pass Filter -2 0 1.1

Page 18: Testability / Design-to-Test (DFMAT)

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Diag-ML Export to Test ExecutiveDiag-ML Export to Test ExecutiveDiag-ML Export to Test ExecutiveDiag-ML Export to Test Executive

Page 19: Testability / Design-to-Test (DFMAT)

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Design-to-Test – eXpress Integration…Design-to-Test – eXpress Integration…Design-to-Test – eXpress Integration…Design-to-Test – eXpress Integration…

6. Test Strategy Execution

5. Test Strategy Import in TestBase

Page 20: Testability / Design-to-Test (DFMAT)

Page 20

ConclusionsConclusionsConclusionsConclusions

Enhance satellite production through better System Enhance satellite production through better System Engineering design and analysis tools and processesEngineering design and analysis tools and processes Integrated Diagnostics and Testability Analysis permits early

evaluation of the validation strategy and coverage Use of industry-standard tools like eXpress allows for consistent

analysis and better interfacing with outsourced suppliers eXpress enables integration of interrelated functional departments

and suppliers Use Design-to-Test methodology to close the loop and enable Use Design-to-Test methodology to close the loop and enable

concurrent engineering processesconcurrent engineering processes A compatible Test Exec can take advantage of the standard export

of test vectors via the industry standard Diag-ML format Feedback of test results to the System Engineering enables the

concurrent engineering environment Establish a foundation for implementation of IVHM/ISHMEstablish a foundation for implementation of IVHM/ISHM

eXpress establishes the foundation for the implementation of verifiable embedded-test in an IVHM/ISHM system