Fermi National Accelerator Laboratory

-Cod-93/290-E

CDF

The CDF Silicon Vertex Detector

S. Tkaczyk et al

Fermi National Accelerator Laboratory P.O. Box 500, Batavia, Illinois 60510

September 1993

Published in the Proceedings of the International Symposium on the Developments and Application of Semiconductor Tracking Detectors, Hiroshima, Japan, May 22-24, 1993

e Operated by Universities Research Association Ike. under Contract No. DE-ACM-76CH03Wa with he United States Department of Energy

Disclaimer

This report was prepared as an account of work sponsored by an agency of the United States Government. Neither the United States Government nor any agency thereof, nor any of their employees, makes any warranty, express or implied, or assumes any legal liability or responsibility for the accuracy, completeness, or usefulness of any information, apparatus, product, or process disclosed, or represents that its use would not infringe privately owned rights. Reference herein to any specific commercial product, process, or service by trade name, trademark, manufacturer, or otherwise, does not necessarily constitute or imply its endorsement, recommendation, or favoring by the United States Government or any agency thereof The views and opinions of authors expressed herein do not necessarily state or reflect those of the United States Gouernment or any agency thereof.

CDF/PUB/SEC VTX/PrBLIC/2274 FERMILAB-COriF-93/290-E

The CDF Silicon Vertex Detector

S. Tkaczyk, H. Carter, B. Flaugher, B. Gonzales, M. Hrycyk, C. Nelson, S. Segler, T. Shaw, K. Turner, and T. R. Weason

Fermi National Accelerator Laboratory : Batavia. Illinois 60510

B. Barn&t, C. Boswe& .I. Skarha, F. D. Snider, A. Spies, and J. Tseng The J&u Hopkins Univeniry. Baltimore, Maryland 21118

A. Barbaro-Galtieri, W. C. Carithers, R. Ely, C. Haber, S. Holland, S. Kleinfelder, N. Prod&, 0. Schneider, M. D. Shapiro, W. Wester, M. Wang, and W. Yao

Lswrencc Berkeley Laborsay, Berkeley ! California 94720

D. Amidei, P. F. Derwent, A. Dunn, T. Song, and S. Vejcik Univeniry of Miichigul. Ann Arbor, Missan 481~9

N. Bacchetta, M. Gold, and J. Matthews Univenity of New Mexico. Albuquerque. Ncr Mexico 87131

D. Bisello, G. Busetto, A. Castro, M. Loreti, and L. Pescara Univemity of Padove.. I-35100 Padove. Italy

F. Bedeschi, V. Bolognesi, S. Dell’Agnello, S. Galeotti, M. Mariotti, A. Menzione, G. Punzi, F. R&elli, L. Ristori, F. Tartarelli,

N. Turini, H. Wenzel, and F. Zetti Istitum Nahmde dl Fistica Nucleate.

Univemity and Scuale. Nomadic Superiors of Piss. I-S6100 Pin.+ Italy

M. W. Bailey, A. F. Garfinkel, and N. M. Shaw Purdue univmity, went Lafayette, Indiana 17907

R. Hughes, P. Tipton, and G. Watta Univemicy of Rocbrtrr, Rochater. Ner York 1,617

September 1, 1993

A silicon strip vertex detector “u designed, constmcted and comml.,ioned at the CDF Up- d h Tedron 4lida at F&b. The mt&rdcsI d&n of the detector, ita coolkq mud IIu+ni* ue pmalted. The ed end elutrania anployiq . Clllt0m VLSI chip, the readout electmnia and ntious componemta of the SVX ytom are daaibed. The s,.tem pafarnuncc aad the q&axe with ti opa&iaa of the detector in the radi.tim envixommnt

dmcuued. The device bu been tu coIIi* beam data since May of 1999, pcrf.xmi,,s Eeitl bat design specilhtions and a&an+ the physica progxm of CDF.

‘Operated by Ihe Univmitia Raearcb Au&don under cmtr~t with the US Department of Encw. ‘Supported by the U. S. Dsputmcnt of En- .nd Lemmce Berkeley Laborazy under c~nw.ct No. DEACOS.

76SFC%‘&3

Published Proceedings of the International Symposium on the Developments and Application of Semiconductor Tracking Detectors, Hiroshima, Japan, May 22-24, 1993. 1

1 INTRODUCTION

The CDF detector WM built to study the coUisions of protons and antiprotons at the Tevatron collider. It ir a multiporpose detector dedicated for praise measurements of the particles produced at #p collisions. During the period between 1989 and 1992 the CDF detector was opgraded in order to extend its sensitivity to new physics. As part of this upgrade a new silicon microstrip vertex detector ( SVX ) wu designed and constructed. The SVX L the Arat device of thin kind to be operated at a hadron collider. It should allow identifkation of secondary vertices from the long lived particles ( + zz IO-l’s). Of particular interest ir a measurement of the properties of B mesons produced either directly in the proton-antiproton collkion or from the subsequent decay of a top quark.

The mechanical design, front end electronics and cooling of the SVX are presented in chapter 2, the data acquisition electronics in diacnued in chapter 3, the initial performance results are shown in chapter 4 and experience gained during dmolt 1 year operation in high radiation environment ir presented in chapter 5.

2 SVX GEOMETRY AND DESIGN

The CDF SVX detector [l, 2, 31 wru designed under the rigid requirements imposed by operation at .a hadron collider. These constrainta immediately forced certain de+ choices. At the Tevatron collider, the @ interactionr are distributed along the beam line with r = 35 cm. Thus a long detector, ahcan in Ague 1, h required for good event acceptance. The SVX detector in 51 cm in length and will contain - 60% of the Pp collision vertices. The amount of material used to construct the SVX wu kept to an dmolnte minimum, to reduce particle decays within the material and to decrelue multiple scattering, both of which limit the ace~~racy of secondary vertex measurements and cause backgrounds to other detectora. The mat&da wed dw needed to be mechanically stable and resistant to the relatively high radiation in which the detector operates.

The SVX detector consistn of tm barrel mod&a placed end-to-end rbich are centered on the nominal inter&ion collision point wad rhwe rm are coincident with the beam axis. One of the barrels i shown in Ague 1. Each barrel conaiatr of faux concentric cylindrical layers. The layers ue placed between 2.7 em and 7.g cm distance from the beam line. The inner kycr was placed M close to the beam aa allowed by the bum pipe.

The DC-coupled ailicon microbip detectorn are 8.5 cm long and 300 JKII thick and have strip pitch of 60 pm for the three l~yen nearest to the bum and 56 pm for the fourth layer [4]. The detector width increua with ruiiu to provide . wedge geometry which points back to the beam Line. ThIee *lieon micx.strip exystds axe &cd to a low rei& FLohncelI [5] foam md carbon Rbex support together with ceramic redoot hybrid circuit baud ( an ear cud ) and a panaive hybrid. Such . etnxtnre i called a ladder, shorn in flere 2. At the interface between the silicon micrceip detecton, wir&x& electrically connect the strip between the a+cent detectors. Silicon microstrip run &IQ the leqth of the ladders and provide tracking in the r - 4 plane. At the interface betrrn the dnt silicon microltlip detector and the UI cud, wire bon& connect esch strip to an input of a cutom designed integrated circuit ( the SVX IC ). The elT&ive length of a ladder ia 25.5 em. The laddm UC arranged in a K&sided geometry. A 30° degree section ir called a wedge. Ladders ue aapported at the endn by beryllium bulkheads The totd number of ladden in the SVX detector L 12 wedges x 4 layen I 2 en& = 96 ladden or 24 ladden for each layer. In itn find mounted position in the barrel, each ladder ia rotated by 3’ around it@ length in order to allow overlap between adjacent ladden and to midmi~c arimuthd boundary gap. Finally, an electricd shield closes the entire barrel urembly.

2

2.1 SVX FRONT END ELECTRONICS

The SVX IC haa been described in detail elsewhere [6, 71. Its current version WIU fabricated using 3-pm feature sire CMOS technology snd has both digital and analog sections. The analog section contains 128 channels of charge integrating amplifiers followed by samplrud-hold and threshold storage stages. The digital section contains logic for data sparsiIication and serial readout. Di@td lines are used bi-directionally to receive sign& controlling the operation of the amplifiers and the switches, and to send signals containing channel address and chip identification. An an&g signal line is used to send the pulse hight of channelc during readout. The SVX IC allows the setting of a sparsification threshold by receiving a calibration pulse into 128 capacitors connected to the input of each channel and storing the asaocisted charge OD. L threshold storage capacitor. The chip C~.II be operated in double or quadruple correlated sample-and-hold integration schemes.

The ear circuit board mounted on the ladder contains the SVX IC’s on a thick-film aluminum nitride substrate, which was used to provide good conduction of the heat from the chip to the cooling system. Ear cards carry signals to and from the SVX IC’s and provide necessary interconnections which allow the chip within a wedge to be de&y chained. The eu carda also have resistors to set the bias current in the chip,, and capacitors to filter noise on the bii voltage lines.

Other hybrid circuit boudr ( the port carda ) are mounted on the bulkhub. These multilayered boards interface sign& between the eu car& and the data acquisition dectromics. The port card usn digital drivers and receivers for data transmission. An andog differentid driver circuit driva the pulse height information from the microstrip. The port card has two circuita which provide pulses for setting the threshold or for chip cdibratiou.

The readout cable ( a “pigtail”) attached to the end of the readout ear board incorporatea II “gold-dot technology” [s] to make electrical contact to a mating bu cable. This bus cable connectr four ladders in a wedge to the port card. Small bump of gold have been deposited cm the traces at the end of the flexible Kapton pigtail cable. There bumps mate with pada on the bu cable, using a lightweight G-10 clamp fastened with a small bolt and nut. The interconnect pitch hu traces OD staggered l-mm centers, giving an effective O&mm pitch. ThL connection scheme dIows eary assembly of the cables and worka better than the conventiond pin and socket arrangement by providing complete flexibility in the number of tracea and in the cable layout.

2.2 SVX COOLING SYSTEM

The god of the low mur SVX cooling system is to remove heat from the readout electronics io the SVX detector and to intercept heat from the surrounding tracking chamber electronics in order to keep the silicon strip detecton and the mcchaaicd structure of the barrel at the ladder install&an temperature of ZO’C. Thin i necuury to avoid the increea in silicon atrip lerhge current from higher temper&arc ope&ion and to miuimise thermal gradient, in the intemd detector structure, so that the initial highquality mechmicd dignment can be mdntdned. Approximately 50W of heat is gene&& by the dectroniu in each half of the SVX.

The cooling w carrying chilled water at 14°C ue in thermd contact with the beryllium bulkhead and run underneath the ledp 011 which the readout circuit boards are mounted. An additiond cooling circuit - used to remove hut from the port card.

In addition to the water cooling, gu cooling wu introduced at the oppaite end of the SVX detector in order to reduce thermd gradients acrou the detector, since moat of the heating and cooling occtus only at the readout end. In order to be compatible with the ~nrroundiug trading chamber gar, argon-ethane gsl ic pre-cooled to PC in a heat exchanger before delivery at a flow rate of IO Standard Cubic Feet per Hour to each barrel. Aa a ape&l safety measure, the system operatea at sub-atmospheric prarure inside the CDF detector volume. If a water leak was to

3

occur, the result would be the gar entering the system rather than water leaving it, which would be immediately detectable.

2.3 MONITORING AND INTERLOCK SYSTEMS

The SVX har extensive monitoring and interlock systems for its protection. Temperature probe. ax mounted at various locations OII each barrel to monitor the temperature profile along the rilicon detectors. Transducers are integrated into the system to monitor the flow rate of chilled water into the SVX barreh. Signals from the monitoring devien are fed into a programmable interlock computer which shuts off various componenta of the SVX system whenever an abnormality or a malfunction are detected.

3 DATA ACQUISTION SYSTEM

The SVX DAQ syrtem vaa reqtied to integrate into the existing hardware, software and main- tenance structure of CDF. It had to contain rufficiently parallel structure and bandwidth not to introduce any additional deadtime into the CDF readont. Finally it had to provide the required timing and control sign& and diagnortic capabiitin needed by the front end readout chips.

3.1 SYSTEM ARCHITECTURE

The architecture of the SVX data aequiaition ayetern wu determined by the SVX detector design, the operation of the SVX chip and theix need for a variety of dockiug quench, the required readout apeed and the existing CDF data reqniaition network [O]. The system consirtr of a Fastbur Sequencer, Crate Controller and Digitkr mod&s. Additional details can also be found in the literature [IO, 11, 121.

The standard interfsee to the CDF data aeqtition system i provided by a SLAC Scanner Proccsror (SSP)[14], a commercial product that ir rued extendvely in the CDF network. It in a programmable F&bus marter that can reformat the event data and attach header information. It bar adequate memory to buffer four events, e feature wed in certti calibration modes.

The Sequencer, a Fartbw hve, h a proqammable module which providea the clocking sign& neeesrary to operate the SVX chipa, ~ynchroniration logic to link to the CDF data acqniuition system, and sufficient memory for ODC event u L pipeline to the SSP. The Controllen and Digitiacra are houred in SVX Rabbit [13] entea OII the CDF Centnl Detector. The ControIIer providea the interike between the Digitka and the Sequencer. The Digitiaen procar analog data and buffer digital dsta from the vmdga. They ue read out by the Controllu. The CDF SVX detector waa instrumented with font Futbw cmtu and four SVX Rabbit crate, each with 6 Dig&en to accommodate 34 SVX wcd.gu, u illustrated in figure 3.

3.2 CONTROL AND DATA FLOW

The Seqnenca can read from and write to both the Digit&n and the Controller. It is also pouible to direct the red idomdion out a front panel port on the Di&en M u to operste with a standalone online monitoring syatcm. The primary mode for reading out wedge data i via automatic bills in which the Controller rud, the wedge data register in uch of itm Digit&n reporting the prnence of data.

Twelve aignala control wnple-and-hold operationa within the ampliflen u well u the event readout. During bum crouings, the SVX timing sign& pass from the Sequencer through the Controller and Digitber to the wedge. Samplcand-hold operation ia synchroniaed with the 3.5-p

4

beam crossing interval. During readout, the timing signal drivers turn off, and the d&$&r accepts the chip and channel addresses along with the analog data from the wedge. The sequencer &o issues II convert sigmd telling the ADC on the Digitizers when to begin the hold and digitire cycle. Once the data for a channel have been prepared by the Digitisers, readout can commence. The Controller is commanded by the Sequencer to initiate a scan read. In this mode the Controller ~ poU each Digitiser and only rend data to the Sequencer for those Digit&m which have responded that they have data. The SVX IC’s aill normaUy be programmed to provide rparsified data which will cause the Digit&n to stop responding aa each wedge becomes empty, The Sequencer monitors the presence of data in the wedges and tertiatn the resdout after all the wedges have been emptied. A 32-bit Read-Data path Gem the Digitiser to the Sequencer curies dsts during L read or present, data status from each Digit&r when a read is not in progress. Both the data and their status can be masked off. The data Gom any wedge can be marked in the Controller and data status is markable in the Sequencer.

A compact data format was used to describe the digital and digitised analog output Gom the SVX chip. Each hit ia described by one 3%bit word. The control registers are resd Gom the Digit&r or ControUer modules using the same format as for the hit information. Data Gom c.U the Digit&r and Controller registers are read out with every event and appended to the T&W data for diagnostics and calibration purposes.

The algorithms for the readout of the SVX Sequencer include dats acquisition and data calibra- tion modes. During data acquisition and data mode calibration every event is readout to * disk. In scanner mode calibration the raw data words Gom the Sequencers are sent only to the SSPs. For each channel the scanner accumulatea the sums of relevant quantitia aa well (u the number of events read After collection of the predeAned number of triggers, the dsta wcumulated by the SSP me rent the rest of the ray up the DAQ ch& to be furthu umlyrcd by calibration consumer processes. Thin method of calibration IUII# much titer thm in the data mode because it reduce8 the number of data transfers and usn the computing poner of the SSP.

3.3 SYNCHRONIZATION WITH THE CDF DAQ

The operation of the SVX chip ir performed by an eluemblc of timing sign& generated by the Sequencer module in phw with the Temtron bunch crossing times. For thL remo the Sequencer has to be synchronised with every beam crowing. The method &o miuimisn the impact of the jitter of the Sequencer’s internal dock on the precise timing of the event and thrahold integration times. The operation of the SVX Sequencer L Iinked to the various level trigger decisiona generated by the CDF dsta acquisition system 114.

In Agure 4 an cumple of the micwequencu program block diagram ia presented, performing an event acquLition during the collider run. The pro- darta with the downloding of the chip identification numbem to the chip’ memoria md re&ng them M for the diagnostic purposes. This part of the pmgrm t executed only once. Then the Sequencer’s clock ir shut off, wtiting to be synchronwd with the next beam crossing. After receiving the atart clock signal, the Partial Reset procednm i aecuted in r&h only the chip integrator in reset and the eventa -pled in the previolu crowing are kept on the Ssmple and Hold capacitor. Then a check L msde of the first level, Ll, trigger decision eignd.

The absence of the Ll trigger s&ml i rut indiatiotion to integrate a new mple. When the integration cycle ia fluished the Sequencer’s interad dcd i stopped by the next stop clock signal and the synchrotiation with the nut beam crouing tah place. The following start clock signal enabler the operation of the internd clock again and the PsrtiaI Red im performed. There =e 43 80-m microsequencer’s instructions executed between the Stut-CIock md Stop-Clock sequence. The total number of instructions in thst cycle L shared between the Particd Reset and the Integration

5

subprocesses and tht exact numbers depend ou a particular implementation. In one of them the integration time requires 19 of these instructions, and low noise constraints applied to the reset operation demand another 22 instructions. In the remaining two instructions the Start-Clock and Ll trigger signals are checked. The Sequencer’s abiity to select snd check the separate conditions on each microsequencer instruction allows us to execute the full event sampling cycle.

The presence of the Ll trigger signal indicates that the event stored during the previous croming passed the Ll trigger conditions and the event mry be prepared for readout. In this c&se s threshold sample is &ken, which is used to cancel the leakge current component in the event sample. The event sampling and the threshold cycles must be executed with the fuU knowledge of the beam crossing. In the first case the beun crossing should appclu inside the integration window (see figure Sa), and in the second one the integration must be performed between the beam crossings (see figure 5b). The threshold restoring subprocess, requires two beam crossirgs to be performed with the constraints defined above. The microsequencer program i&bits generation of the Stop-Clock signal at the LRS4222 mod& during the threshold cycle. When the threshold is restored, the syynchrouisation mechanirm is enabled @n.

In the next step a test of the Level 2 trigger decision is done. Its presence initiates the readout cycle and its absence directs control to the synchrouisation subprocess. For non-triggered events, II separate integration cycle L performed in the very next Start/Stop clock cycle.

3.4 SCAN TIMES

AU detector elements in the CDF data acquistion system are required to be read out within 2 ms. Due to the large number of cbann& it wu neccuuy to partition the SVX into four independently read branches (see flgure 3). The sc~ time is d&cd - a sum of two components: the time required to read SVX chips in six wedges by the Sequencer and the time to move data from the Sequencer’s Event Memory to the SSP’a buffer.

The Sequencer IC(UI time is proportional to the number of hits multiplied by the sum of the duration of the baric chip dsta cycle, c&d Bio, the rapow of the front end modules, signal propagation delays and the time mqaimd by the Sequencer to check that dl the data are read out from wedges. The time required to move data from the Sequencer to the SSP was measured and it corresponds to a block trmsfer rate equal to 200 us per 32 bit word.

The SVX chip hat the ability to spusify the data md red only channels above the threshold. The number of hits per interaction ia a knction of the loUowing factors: event multiplicity, noise fluctuations above the threshold settings, uniformity between chip in a wedge, number of low momentum spiral tracka md beuo gu interactions. The ~ersgc occuputcy was estimated not to exceed 10% of ch-els which corresponds to 8 scan time of 0.77 ms, weU below the maximum value dIomd. For a fked tbrabold, this number i ape&d to increase slowly u a function of the sbrbed m&&ion dae by the dekctor eomponent#, maidy due to the increnaed number of noisy channel, with w ldqe current v&e that will result.

4 DETECTOR PERFORMANCE

Trajectorin in the SVX are found by extrapolating tracks reconstructed in the Central Tracking Chamber (CTC). The dgorithm uaociata SVX hits, one at the time, to m existing track found in the CTC. At eruzb iteration a new At of truk puameten is mde including the contributions from the multiple Coulomb scattering. The 4orithm program from the outer to the inner layers. Tracks having at leslt 3 hits auociated with it ue saved.

A great cue was taken d&g the me&&~ construction of the SVX detector to ensure high precision of urembly. The SVX detector wu aligned to the CTC using a bum line e,s an erternd

reference ( global d&ztment ) and the ladders were aligned internally within each barrel. In figure 6 a distribution of the I coordinate r~ a function of the s position of the primary vertex is shown. Independent fits to the beam line for each of the two barrels were performed and showed an agreement to be better than 5 jnn between the barreb. The smalI slope of the bean, liner ( 3 @m/cm) wan also measurable.

The track residuals in the SVX obtained after application of the alignment constants are shown in figure 7. A sample of tracks with momentum greater than 3.5 GeV/c and having 4 hits registered in the same wedge of the SVX detector wu selected. The width of the residual diatriburion was found to be close to 10 #m. It corresponds to L detector spatial resolution of 13 pm.

The tracks for which the SVX iuforrmtion wu used improve the invariant maa distribution. In the care of J/B decays into a pair of muor,. the width waa reduced by about 30 %. The high precision of the SVX track information ia shown in figure g where the combinatorial backgrounds are reduced after IA 4-sigma cut vat applied on the decay length, L, of the Kf candidates. The continuous histogram represents the invariant mass distribution before the cut on L. Points (filled squares) with I) fitted signal and background pammetrimtions correspond to the distribution after the cut was applied. The dashed histogram shows all combinations for which the calculated decay length is negative and smaller than 4 sigma.

5 RADIATION MONITORING OF THE SVX DETECTOR

The high luminosity and the proton antiproton cross section at L hadron collider mean that the SVX will be exposed to radiation coming Gom the phydcs processa and operstional beam losses. The inner moat layer, located at 3 cm Gom the beam axis, L the most vulnerable. The potential high beam loa conditions, in coqjunction with the radiation coft technology used in construction of rhe SVX detector, required the duign and implementation of (L dedicated IOU monitoring system which would minimise any accidental radiation dose.

Preliminary measurements of the radiation levela made in the CDF collision hall were already made during the 1988-1989 rum The resukr m&d u 8 function of time and were approximately 900 rad/pb-’ at the early stages and declined to the level of 300 rd/pb-’ u the run condition stabilized. At the start of the 1992-1993 Tentron Collider run, the expected 25 pb-’ of delivered luminosity would lead to an integrated done of 12 kmd. Such o dose could have (LII impact on the performance of rhc microstrip detecton and front end readout.

Radiation backgrounds are monitored with two rystemc [17] located rymmetricdly about 2.8 m from the interaction region and a &~UICC of 5 cm from the beam ti. Silicon diodea are used to measure the minimum ionising particle rata and the Tentron Beam Lou Monitors [15] ue rued to measure the iotiing dose levela. In addition to the rate and dae infornution, arrays of therm- luminncen( d&&n (TLD#) UC iddId in the lo&ion of the other monitoring devica. The TLDs provide the radial dependence of the radiation dose, which drop off U m r-1.78.

In figure 9 an estimated inner layer radiation dm L shown .U a function of the delivered luminos- ity. This time history showa that the highest dose occurred in the early stages of the commidoning of the Tentron, Mowed by . regular alope related to the optimised delivery of the luminosity. The slope value which can be determined Gem this plot shows a remukble agreement with our earlier measurementa Gom the 1988 run of 300 rd/pb-‘. The BLM and TLD data imply a total dose of approximately 12 krrd &orbed by the SVX inner layer with 20 pb-’ of delivered luminosity.

During the operation of the SVX detector, the gain and noise of the SVX IC, u well u the detector leakage currents, were monitored. In figure 10 the average gain decrease for all SVX layers is displayed. The decrewl in the gain show . dmilu radial dependence to what wu measured with TLDs. By applying resulta of the earlier measurements of gain and noise degradation u a function of the radiation expo~ure[lll], the inferred dose st the SVX inner layer was calculated.

7

The dose determined Gom the overall change in gain, wra 22 krad, which is inconsistent with other measurement& The total noise incrc~e at the inner layer predicts .a radiation dose of 15 krad with 18 pb-’ of delivered luminosity (u shown in figure 11. During stable operation of the Tevatton the gain and noise changed linearly with the delivered luminosity, which indicatea that the predominant damage was caused by the flux of particles coming from the colliding beams, rather than accidents. The dependence of the leakage currents at the inner layer m a function of time indicates a radiation dose which in smaller than that inferred from the gain, but similar to that measured Gom noise degradation. These measurements may indicate thst the time constant of annealing the silicon bulk is short compared to the radiation expomre rate. They may also show that there is 8 difference in response depending on the type of exposure. In thin c-e the detector was exposed to a low-intensity flux of particln over a long period of time Gom hadronic coIlicions. The tests used to determine the relationship between radiation exposure and detector perforrna~~ce exposed the detector to bigh- intensity radiation sourcea for very short periods of time, which ia the typicd method applied for such procedures.

6 CONCLUSIONS

The work on the construction of the CDF silicon vertex detector wchl completed. The silicon mi- crostrip detectors were located to an accuracy of 10 microns and > 96.5% of the silicon striip are fully functional.

A new data acquisition readout electronica for the SVX wcu boilt and commiwioned. The system wan designed to help integrate n new detector into an existing CDF data acquisition network and provided flexibility necessary to operate the SVX IC within the 3.5 lu beam crossing interval.

Using the specially commiuioned rdiation monitoring system the totd radiation dose was mea- sured and found to be fairly consistent with the expectations that it cornea mainly horn the luminosity related causes. The potibility of aerioua accidents auociatcd with high radiation dosn was reduced to a minimum by using this system.

The SVX detector L being snceeufnlly operated at the CDF experiment and its performance already reaches the design ape&cations. The pxe!imiray results of the physics andysea already indicate that ia a powerful tool in high-pro&ion tmckimg and identtication of displaced vertices of long lived puticIn[l9]. It gira CDF a great opportunity for a rich B phytiu program and a good perspective in the seuck for the top quark.

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[13] G. Drake et al., Nucl. In&r. and MetA. A289 (198.9) Bg.

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[IS] N. Bacchetts et al., Nucl. hair. and Meti. A224 (1999) 284.

[17] P. F. Derwent et al., “Experience with Radiation Protection for a Silicon Vertex Detector at a Hadronic Collider”, Proceedinp of the 1993 IEEE Particle Accelerator Conference, May 17-20, 1993, Washington, DC.

[lg] R. Shafer et al., ProcMding of the 1961 IEEE Particle Accelerator Conference, March 1981, Washington, D.C.

[I91 H. Wensel et al., “QCD and High Energy Hadronic Interactions”, Proceedings of the XXVIIIth Recontrn de Moriond, La Arcs, France, Much lQQS, e-l. by J. Tran Thanh Van ( to be published).

9

Figure 1: Schematic view of one barrel of the SVX detector, showing the internal geometry.

MEW. AUCNMENT HOLE

READ OUT EAR

PIG TAIL

SILICON CZ3ECTOR

MECH. ALIGNMENT HOLE

Figure 2: Components of an SVX ladder.

/

SSP SI SP SI SSP SI

I

QJxsync

Control v

COntKli mind COllUd Andosd to DlQkd Data Detector from

L

Digital Data from

rmector Detectcf

Figure 3: SVX DAQ System Diagram.

s: s.t DO.. lo : l.. ISC /

.i I

i-l ..11*. L”.“t

!L- I

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,-__ -..-. - ..-.. -

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ill” T.I.*ll*Id

1% I!...* et...

j- I__-__-__

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Figure 4: The SVX microprogram functional block diagram. The dashed rectangles represent program modules used in the code generation. The module names are as follows: a- INITIALIZE, b- SYNCHRONIZE, c- BRANCH, d- SAMPLE and HOLD, e- THRESHOLD, f- LATCH, g- READOUT, h- INJQ.

lllllllllllllllllllllllllllllllllllllllllllllllllllll

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1111111111111111)

m

SW-Sync IU 111

Start-Clock

stop-Clock

I I

I u I

I II

I I

I LlA I

I I

w I

Rb

Rs

I 0.72~~ I I 1 i I

I I 4 i 1.06~~ i

Figure 5 (a): Synchronization of the Sequencer’s operations with the beam crossings and the CDF DAQ network.

11111111111111111111llllllllllllllllllllllllllllllllllllllllllllllllllllllllllilllllllllllllllllllllllllllllllllllllllllllllllllllllllll

Sons Mdr-Clk

SIX-Sync

Bi E# SC I I I

I’ I’ i’

Start-Clk

Stop-Clk

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Pa

w

RS

Rc

8 u I I u I

I I I u u

I I i I[Lj

I i i I

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I

I mRint I I 1

Figure 5 (b): Threshold restoration cycle performed between the beam crossings.

- E 0.08 _

0 0.07 E

0.05 r

= km3

Figure 6. Reconstruction of the beam profile using SVX tracks. The beam position along its direction is shown. Open circles (triangles) correspond to tracks found in East (West) barrel.

1 0000

7500

1

, , L I

h , 8 8 I

L I L L I

I h 6 4

l .

Q = 10.6 pm -L

Figure 7. Distribution of residuals for the tracks reconstructed using the SVX information.

160. 160. 1 1 L L 1 1 I I I I 1 1 I I I I 1 1 8 8 L L I I I I 1 1 , , L

nx nx < 50. < 50.

n x<so.:L/~L>~. n x<so.:L/~L>~.

s-x .-x < 50. i L/6L < -4. < 50. i L/6L < -4. 120. - 120. -

ir

c

40.

0. 0.42 0.42 0.46 0.50 0.54 0.58 0.58

n-k Mass (GeV/c*)

Figure 8. Reduction of the combinatoric background using SW tracks in the invariant mass distribution of pairs of tracks considered as decays of K$ --> TI+TT.

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s \ ; 3 .- L :g

5 ;- ; $ i 2

8

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Delivered Luminosity (pb- 1)

Figure 10. The measured change in gain as a function of delivered luminosity for four layers of the SW (O- labels the inner layer, 3- labels the outermost layer).

ggzl q*3 m E. CD 235 -. -CL!2 l--k0 -aq

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