The Proceedings of

The 6th International Conference on

Signal Processing Applications & Technology

Boston, Massachusetts, USA

October 24-26,1995

Volume I

©DSP Associates UB/TIB Hannover 89113 569 475

The Proceedings ofThe Sixth International Conference on

Signal Processing Applications & Technology

TABLE OF CONTENTS

• Active Noise Control

Real-Time Multiple Error LMS (M.E.-L.M.S.) Algorithm Improvements for Active Noise- 1ControlAlberto Gonzalez, Maria de Diego, Antonio Albiol, and Luis Vergara, Universidad Politecnicade Valencia, SPAIN

Multi-Variate Minimization Algorithm for Active Noise Control of Sound 5Antonio Albiol, Alberto Gonzalez, and Luis Vergara, Universidad of Politecnica Valencia, SPAIN

Secondary Path Modeling Using an Adaptive Predictor on the TMS320C30 11Dipa Vijayan, Texas Instruments Inc.; Sen M. Kuo, Northern Illinois University, USA

A DSP-Based System for Broad Band Active Noise Control in Ducts 16Paulo L. Osorio, and V. Nobrega, Catholic University, BRAZIL

Noise Characterization for Active Noise Control 21Lourival Lippmann Jr., Ilka Marinho Barros, and Leonardo Marques Teixeira, LAC/COPEL/UFPR, BRAZIL

Adaptive Frequency Selective Filters for Feedback Active Noise Control 26Gerard Coutu, RPI at Hartford Graduate Center, USA; Michael Dignan, Bolt, Beranek &Newman, USA

Tree Structured Based Adaptive Noise Canceler on TMS320C5x 31Padma P. Mallela, Texas Instruments Inc.; Sen M. Kuo, Northern Illinois University, USA

Multiple Channel Hybrid Active Noise Control on TMS320C31 Quad Processor Board 36P. Liu, X. Kong and S. M. Kuo, Northern Illinois University, USA

Acoustic Noise and Echo Cancellation Microphone System for Desktop Conferencing 41Sen M. Kuo, Northern Illinois University, USA; Yu C. Huang, Texas Instruments, USA;Zhibing Pan, AT&T Bell Labs, USA

Frequency-Domain Active Noise Control and Equalization Systems 46Sen M. Kuo and Li Ji, Northern Illinois University, USA

Reference Signal Gererating Techniques for Narrowband Active Noise Control 51Ciguo Zhang, Gerald Miller and Sen M. Kuo, Northern Illinois University, USA

Implementation of Active Noise Canceler Using an Adaptive Predictor 56Young Sam-Kim, Geun-Taek Ryu, Dae-Sung Kim, Jung-Go Choe and Hyeon-Deok Bae,Chungbuk National University, KOREA

Parallel Processing of Multi DSP System and its Application to Active Noise Control 60Masashi Kondo and Koichi Nakamura, Nagoya Institute of Technology, JAPAN; M. Ueda,Nippon Steel Corporation, JAPAN

• Adaptive DSP Algorithms

Burst-Free Adaptive Hybrids 65M.A. Khasawneh, Jordan University of Science & Technology, JORDAN; T.F. Haddad,University of Ottawa, CANADA

Analysis & Design of Adaptive Programmable LP, HP, BP, and BS Digital Filters 70Adel Shaker El-Fishawy, Menoufia University, EGYPT

A Modified Sub-Band Adaptive Filtering for Acoustic Echo-Cancellation 74B. Farhang-Boroujeny and ZhongjunWang, National University of Singapore, SINGAPORE

Application of Neural Network-Based Equalizers in Tracking Time-Varying Non-Linear 79Multipath Microwave Radio ChannelsE. Luk, A.D. Fagan and J.O. Scanlan, University College Dublin, IRELAND

Normalized X-Block Adaptive Algorithm for Active Noise Control 84Qun Shen, Mark R. Jolly and Dino J. Rossetti, Lord Corporation, USA

Analog Adaptive Filter Using Orthogonal Functions 89Laura Ortiz-Balbuena, Hector Perez-Meana, Alejandro Martinez-Gonzalez, Luis Nino deRivera and Mariko Nakano-Miyatake, Universidad of Autonoma Metropolitana Iztapalapa,MEXICO

• Advanced TV Technology

A Digital FPLL for GA-VSB ATV Receiver 93Dong-Seog Han and Dong-11 Song, Samsung Electronics, KOREA

Adaptive Definition Enhancement and Noise Reduction 98Semion Sheraizin, AmTech Electronic Filtration Tech. Ltd., ISRAEL

VLSI Implementation of Double Scan Picture-in-Picture for 16:9 Aspect Ratio TV System 103Seungung Baek, Tongha Kim, Kwangsub Song, Yongserk Kim and Yeuncheul Jeung, SamsungElectronics, KOREA

Y/C Separation Method Using Effective Time and Frequency Domain Correlation for NTSC 108Video SignalJun-mo Jung, Eui-Gyu Kim, Dae-Yun Shim and Yeun-Cheul Jeung, Samsung ElectronicsCompany Ltd., KOREA

A New Ghost Canceler for TV Repeater 111Jae Ryung Jung, H. J. Nam, J. H. Kwak, H. M. Park, S. J. Kwon, J. .S. Park and Y. G. Kim,LG Electronics Inc., KOREA

A Deinterlacing Algorithm Based on Weighted Wide Vector Correlations 116Yeong-Taeg Kim, Samsung Electronics Co., KOREA

B

An MPEG-2 Real Time Audiovisual Decoder 121Giovanni Fausto Andreotti, Raffaele Belardi, Raffaele Di Vaio, Luigi Mori and MaurizioOnorato, Italtel-SIT, ITALY

Still Image Compression in Human Visual Model for Koreasat Data Broadcasting Services 126Nam Soo Park and Dae-Seong Kang, Electronics and Telecommunications Research Institute,KOREA

• ASIC DSPs

A Programmable Architecture for Viterbi Decoder 133Miodrag Temerinac, Otto Witte, Reiner Backes, Werner Sinnhofer and Markus Klump, ITT-INTERMETALL, GERMANY

Software and Hardware Considerations in Using the CD2450 Configurable DSP Core in Low- 138Cost ApplicationsHiromitsu Yagi, Clarkspur Design Inc., USA; Robert E. Owen, Data/Time International, USA

Using FPGAS in Digital Signal Processing Applications 145Greg Goslin, Xilinx, Inc., USA

Using Xilinx Field Programmable Gate Array's (FPGA's) for Application-Specific Digital 150Signal Processing PerformanceGreg Goslin, Xilinx, Inc., USA

TeleCore - A Versatile Architecture for the Digital Communication Market 154Rivka Shenhav, Rimon Inc., USA

A Reconfigurable Bit-Serial Adaptive Lattice Filter Chip 159Amulya K. Garga and Kevin P. Acken, The Pennsylvania State University, USA

An Algorithm Specific DSP for Automatic Control of a High Speed Power Converter 164Yngve Rehnstrom, Vaxjo University, SWEDEN; Viktor Owall, LundUniversity, SWEDEN;M. Lenells, Vaxjo University, SWEDEN; Per Ranstad, ABB Flakt Industri AB, SWEDEN; MatsTorkelson, Lund University, SWEDEN

Real Time Prototyping of Video-Applications 169Stefan Tamme, SICAN GmdH, GERMANY

OakDSPCore™ Ideal for V.34 174Michael Abell, DSP Group Inc., USA; Victor Demjanenko, VoCAL Technologies Ltd.., USA

GSM Half-Rate Coprocessor 180Esben Randers, Analog Devices Inc., USA

Low-Power Implementation of the PDC1/2 Rate Codec on an Application Specific DSP 185Jonathan Zingman, ShihuaWang, Edward Wu, Jumana Muwafi, and Kumkum Gupta, TCSI,USA; Gerhard Fettweis, TU Dresden, GERMANY; Shiro Koboyashi, Takaaki Kawasaki, SakaeFujimaki and Yasunori Nambu, Asahi Chemical Industries, JAPAN; Masatsugu Mitsutake, YujiKameshima, Hideaki Konoma and Katsuhiko Yamazoe, Asahi Kasei Microsystems, JAPAN

Low-Power Direct Digital Frequency Synthesizers for Communications Systems 190Alan Y. Kwentus, Avanindra Madisetti, Kei-Yong Khoo andAlan N. Willson Jr., University ofCalifornia, USA

High-Performance Architecture of a Next-Generation 3D-CG Rendering Processor AGP 195Hideki Yoshizawa, Tatsushi Ohtsuka, and Shigeru Sasaki, Fujitsu Laboratories Ltd., JAPAN

The PM44: A Single-Chip SIMD GigaOP DSP for Imaging 200

John Redford, John Her and Elliott Berger, Pixel Magic Inc., USA

Design Methodology for DSP ASIC 205

Patrick Hayashi and Tapan Joshi, LSI Logic Corporation, USA

• Audio

Implementing an Acoustic Room Response Analyser 210John Edwards, Loughborough Sound Images PLC, UK

Finding the Directions of Speech Sources by Microphone Array 215Zheng Liu, Jun Wang and Fumitada Itakura, Nagoya University, JAPAN

A Real-Time Implementation of Virtual Acoustic Room by ADSP 2115 DSP Processor 220Yong-Hee Lee, Don-Sung Oh, Sun I. Kim and Doo-Soo Lee, Hanyang University, KOREA

A Flexible MPEG 2 Audio Decoder and Transport Stream Interface Based on TMS320C40 225ITT MAS3500CBenno Stabernack, Fraunhoer Einrichtung fur Zuverlassigkeit und Mikrointegration, GERMANY;Carsten Heinelt and Maati Talmi, Heinrich-Hertz-Institut fur Nachrichtentechnik GmbH,GERMANY; Werner Sinnhofer, ITT Semiconductors Group, GERMANY

• Biomedical

High-Resolution Subspace Techniques for Cardiac Analysis 230William H. Hutson, Teracom Inc., USA

A Supervisor/Server System for Evaluation of Evoked Potentials 239Sokol Saliu, Sarp Oral and Fatim Reel, Cukurova University, TURKEY

Sensory Automated Infusion Pump Using Neural Networks 243Rakesh Narayanan and R. Vijayakumar, N.S.S. College of Engg., INDIA; Dr. Harishankar,Kerala University, INDIA

An Artificial Neural Network System for Classification of the Cardiac Rhythm 248Panos C. Voukydis, Harvard Medical School, USA

Consonant Training System for Hearing-Imparied Children Using Vocal Tract Area Function 253Takefumi Kitayama, Fumitake Sugano, Hiroyuki Kamata and Yoshihisa Ishida, Meiji University,JAPAN

D

Evoked Potential Location with Fewer Stimuli Using Time-Frequency Representations 258Trina Adrian de Perez, Ma. Cristi Stefanelli, Francisco D'Alvano, Renny E. Badra and AquilesViloria, Universidad Simon Bolivar, VENEZUELA

A Computer System for Event Related Brain Potentials 263Jerald Varner, University of Nebraska, USA; John W. Rohrbaugh, Washington University Schoolof Medicine, USA

A New Method of Automatic Detection and Quantification of Microaneurysms in Retinal 266Florescein AngiogramsCristian Leturia, and Andres Guesalaga, Universidad Catolica de Chile, CHILE; Luis Bravo,Clinica Santa Maria, CHILE

Cardiac Arrhythmia Analysis Using Wavelet Transform 271LU Jin and L. M. Cheng, City University of Hong Kong, HONG KONG; S. C. Chan, Universityof Hong Kong, HONG KONG

R-R Interval Detection System for ECG 276Takashi Kohama, Masaji Kondo and Shogo Nakamura, Tokyo Denki University, JAPAN

A Real-Time Implementation of a Signal Averaged Electrocardiogram System 280Subbaraman Narayan and John F. Doherty, Iowa State University, USA

• Communications & Telephony

Audio Conferencing in Telecom 285Brady Barnes, Inter-Tel, Inc., USA

Perpetually Optimum Adaptive Filter Tap Profiles for Subband Acoustic Echo Cancellers 290Eric J. Diethorn, AT&T Bell Laboratories and AT&T Custom Electronic Systems, USA

Efficient Conferencing in a Wireless Voice Communication System 294David Almagor, National Semiconductor Corporation, USA

A PC Based Computer-Telephony Integration Platform 298Rafael Ciria, Rafael Sarmiento de Sotomayor, Cristina Aguila, Jose Parera and Juan Santos,Universidad Politecnica de Madrid, SPAIN

Integrated DTMF Detector and Echo Canceller 303Rami Drucker, Israel Greiss, David Almagor, Gil Montag and Ophir Shabtay, NationalSemiconductor, ISRAEL

FTF Algorithm Based Joint EC/DFE 307Dinko Begusic, Nikola Rozic and Nenad Noveljic, University of Split, CROATIA

Implementation of the Fast Wavelet Transform for Noise Cancelling in Hands-Free Mobile 312TelephonyFisseha Mekuria, Ericsson Mobile Communications AB, SWEDEN

Multi-Channel Echo Canceller Interworking with Time Switch Module in Mobile Switching 317CenterDon-Sung Oh and Dong-Jin Shin, Electronics and Telecommunications Research Institute, KOREA;Sung-Sil Kim, Texas Instruments Korea, KOREA; Doo-Soo Lee, Hanyang University, KOREA

Evaluation Comparison of Broadband and Subband AECs for Teleconferencing Application 322M. Tahernezhadi, Northern Illinois University, USA; S. C. Manapragada, Motorola Inc., USA

A Simple Single Tone Frequency Estimator Implemented on a DSP 327Maurizio Andronico, Salvatore Casale, Aurelio La Corte and Pierpaolo Nicosia, University ofCatania, ITALY

A Double Talk Detector Based on Coherence 332Tomas Gansler, Maria Hansson and Goran Salomonsson, Lund University, SWEDEN

A DSP-Based Design of a Wideband ISDN PC Phone 337Jinsang Choi, Jonghoon Park, Ee-Tack Lee and Gang-su Lee, Electronics andTelecommunications Institute, KOREA

GAO Soft Phones: The World's First Software Driven, DSP Based, and Cost-Effective 342Phones Designed on DSPsFrank X.Y. Gao and Arthur Chow, Gao Research & Consulting Ltd., CANADA

Hardware Implementation of an ATM/B-ISDN Switch Using Fuzzy-Neural Scheme 347Hemchandra M. Shertukde and Su-Jen Chen, University of Hartford, USA

GSM Custom Receiver Algorithms and Hardware Description 351Agostino Picciriello, Italtel, ITALY

The Architecture and Benefits of Digital IF Up Conversion Implementations 356David B. Chester and John Fakatselis, Harris Semiconductor, USA

Design of a Digital Simultaneous Voice/Data Modem 361Jeff Derby, IBM Corporation, USA

Wavelet Transform-Based Modification of Goertzel Algorithm for Detection of DTMF Signals 367Adam Dabrowski, Poznan University of Technology, POLAND

Real-Time Implementation of G.721 ADPCM On a Low Cost TMS320C5X DSP Starter Kit - 372DSKJason Chyan and Padma Mallela, Texas Instruments, Inc., USA

A Real-Time Implementation of a Correlation-Based Spread Spectrum Acoustic Echo Canceller 377Using Motorola Dual DSP56001 Digital Signal Processor BoardJian Huang and John F. Doherty, Iowa State University, USA

Signal Processing for Improving the Speech Quality of Digital Cellular Phone 381Y. Yamazaki, T. Sato and T. Taniguchi, Fujitsu Laboratories Ltd., JAPAN

Twin ADSP2101 Architecture For Teleconferencing Applications 386T. Gnanasabapathy and M. Tahernezhadi, Northern Illinois University, USA

Rayleigh Mobile Channel Simulation Using IIR Digital Filters 391A. Wickert, University of Colorado, USA; Jay M. Jaycobsmeyer, Pericle Communications

#**Consumer Products

Dttign of a Low-Cost Color Thermal Printer Using DSP TMS320C14 396jftang-Fu Hsieh and Henry Chen, Industrial Technology Research Institute, TAIWAN

DSP in PDAs 401Charles Fadel, Analog Devices, Inc., USA

Virtual Space Telephony 405Heping Ding and Michael Knappe, Bell-Northern Research Ltd., CANADA

Development of a New Portable Device for Real-Time Speech-Speed Slowing 410Yoshito Nejime, Tadashi Takamiya and Juichi Morikawa, Hitachi Ltd., JAPAN

• Data Acquisition

A DSP and Data Acquisition Method for Application in Power Systems with Variable 415FrequencyV. Backmutsky and V. Zmudikov, Holon Center for Technological Education, ISRAEL

Micro Power "Relative Precision" 15-Bit A/D Converter 420L Grisoni, A. Heubi, S. Grassi, P. Balsiger and F. Pellandini, University of Neuchatel, Instituteof Microtechnology, SWITZERLAND; A. Schaub, Audiosys A.G., SWITZERLAND

Multidirectional Air-Flow Measurement Using Strain Gauges 425R. Chandy, R. Morgan and P.J. Scully, Liverpool John Moores University, UK

High-Speed Multi-Slope Integrating Analog-Digital Converter 429Christoph Gebauer and Gerhard Trenkler, University of the Federal Armed Forces, GERMANY

Digital Data Acquisition and Control Interface for DSP, Using A Precision Reciprocal 433Timing ArchitectureLeo McManus, Paul Orton and Peter Thomas, Nottingham Trent University, UK

Integrated Two-Dimensional Imager 438Michael Younger, Clyde Deluca, Dan McCarthy and Debbie Simon, Army Research Laboratory,USA

The Use of Subsampling for Economical Digital IF Receiver Implementations 441John Fakatselis and David B. Chester, Harris Semiconductor, USA

An Embedded Processor Based Data Acquisition System using Innovative Compression 446Algorithims and Flash Memory TechnologyVandana Verma and Minda Zhang, Intel Corporation, USA

Delta-sigma Converters Team up with DSP for Accurate AC Spectral Analysis 451Robert Calkins, Data Translation Inc., USA

A DSP-Based Data Acquisition Module for Colliding Beam Accelerators 455Joseph A. Mead and T. j . Shea, Brookhaven National Laboratory, USA

Low Cost Acquisition System Using MAX110 2-Channel, 14 Bit Serial ADC 460

Viorel Nica and Daniela Nica, "Gh-Asachi" Technical University, ROMANIA

Digital Receivers Bring DSP to Radio Frequencies 465

Rodger Hosking, Pentek Inc., USA

High Density, Multibit Information Storage 469He' Ary Shamir, ColorCode, UnLimited Corp., USA

• Data Communications

Processing of Synchronous Communications Signals 475Kevin DeMartino, Dynamics Research Corporation, USA

Data Sequence Selective Timing Recovery for Multi-Level PAM Signals 480Marcus Draheim, Universitat Hannover, Inst. fur Hochfrequenztechnik, GERMANY

Implementation of a D8PSK-Modem Using the TMS320C30 DSP 485Margarita Cabrera, Eduardo G. Azofra and Gregori Vazquez, Universidad Politecnica deCatalufta, SPAIN

Design and Implementation of a High Speed Digital Modem on the Motorola DSP56001 490Charles A. Cilliers, Grind, SOUTH AFRICA

Majority Voting with Low Communication Overhead 495Guevara Noubir and Henri J. Nussbaumer, Swiss Federal Institute of Technology,SWITZERLAND

An Adaptive Technique for Reliable Timing Recovery in High Speed QAM Signal Receiver 500Baohua Zheng, TALX Corporation, USA

A DMT Transmission System for High-Speed Communication on Copper Wire Pairs 504Mikael Isaksson, Telia Research AB, SWEDEN; Tomas Nordstrom, Lulea University ofTechnology, SWEDEN; Lennart Olsson, Telia Research AB, SWEDEN; Per Odling, LuleaUniversity of Technology, SWEDEN

Implementation of International Data Encryption Algorithm (IDEA) on the Motorola DSP561xx 509Family of ProcessorsT. R. Madhusudan Sastry, T. Ganesan, B. Madhukar and N. Srinivasa, Motorola India ElectronicsPvt. Ltd., INDIA

Joint Demodulator/Equalizer QAM Receiver 513Fuling Liu and Chen Chen, Western Atlas International Inc., USA

Design of a V.34 Modem for a Real-Time Multitasking DSP Operating System 518Fredy D. Neeser and Malcom S. Ware, IBM Zurich Research Laboratory, SWITZERLAND

H

Digital Filter Implementations

llNftanentation of Bias Remedy Equation Error IIR Algorithm on TMS320C30 523iL. Sharma and Yong Y. Li, University of Wisconsin-Platteville, USA

and Implementation of Adaptive Digital Filters on a Multi-TMS320C40 System 526Hranitzky and Marco Platzner, Graz University of Technology, AUSTRIA

•Time Implementation of an Adaptive Acoustic Echo Canceller on a DSP32C 531•Yu Chao and Don McLean, CSIRO, AUSTRALIA

itation of Multirate Filters on the Motorola DSP 56100 Family 536f. Ubale, V.K. Anuradha, T. Ganeshan and N. Srinivasa, Motorola India Electronics Pvt.

lid., INDIA

An Implementation of a 2-D Discrete Wavelet Transform on the Texas Instruments 541TMS320C80Christopher J. Burke and Mehool S. Patel, MVP Development Group, Inc., USA

Digital Signal Processing with 32-bit RISC Microprocessors 546Richard Leach, Motorola, Inc., USA

Digital Filter Design and Algorithm Implementation with Embedded Signal Processors 551J, ; $)Iavin Govind, Intel Corporation, USA}•(• •

p;,- £ A Optimal Automated Implementation of FIR Filters on Field Programmable Gate Arrays 556\," .-';'_ Idlchael Soderstrand, Naren Balasubramanian, Dannielle Husinga and Muthya Potharlanka,j University of California at Davis, USA

• Digital Filters

A PTV Multiplier-Free Realization of Two-Band Filter Banks 561jianlin Li, PictureTel Corp., USA; Sawasd Tantaratana, University of Massachusetts, USA

Perfect Reconstruction IIR Filter Bank With Good Time-Frequency Resolution 566i' Simon Znidar, University of Ljubljana, SLOVENIA

Characterization of Almost Linear-Phase IIR Half-Band Filters Based on AUpass Networks 571Michael Ansorge and Fausto Pellandini, University of Neuchatel, SWITZERLAND

.L-i and VLSI Implementation of a 27-Tap Decimate/Interpolate-by-Two Half-Band FIR 5781 Filter

, T.A. Krasniewski and C. Chan, Carleton University, CANADA; V. Szwarc, L.aux and J. Lodge, Communications Research Centre, CANADA

':. V

• DSP Algorithms

A New System Function Representation with Transform of Scale and Shift Parameter 583Yan Zhang and Toichi Machida, Tokai University Junior College, JAPAN

Spectrometric Data Correction Using a Recursive Quadratic Operator of Measurand 588ReconstructionLeszek Szczecinski, Universite du Quebec a Trois-Rivieres, CANADA; Roman Z. Morawski,Warsaw University of Technology, POLAND; Andrzej Barwicz, Universite du Quebec aTrois-Rivieres, CANADA

A Study of Index Mapping for Prime Factor Algorithm of FFT 593Rong Zheng, Northwestern Polytech University, P.R. CHINA

Pole-Zero Model Identification Based on Burg Method 598Eugene Ponomariev, The Accolade Group, Ltd., RUSSIA

Analysis of Spatiotemporal Signals of Dynamical Systems: Theory and Applications 603Milan Rajkovic, Institute of Nuclear Sciences, YUGOSLAVIA

Adaptive Interpolation of Non-Stationary Signals 608P. Beauseroy and R. Lengelle, Universite de Technologie de Troyes, FRANCE

Parallel Implementation of Parametric Spectral Estimation for Doppler Blood Flow 613InstrumentationD. F. Garcia Nocetti, J. Solano Gonzalez and H. Benitez Perez, Universidad Nadonal Autonomade Mexico, MEXICO

• DSP Algorithms/Filters

On the Design of the State Digital Filters 618F. Garcia Ugalde, Bohumil Psenicka and Vratislav Davidek, University of Mexico, MEXICO

A Variable Parameter Digital Pulse Shaper Using a Sparse FIR and Interpolation 624M. J. Howell and A. R. Owens, University of Wales, UK

Automatic Optimum Order Assignment in IIR Adaptive Filters 629Zhiquiang Ma, Jiantao Shen, Asadul Huq and Kenji Nakayama, Kanazawa University, JAPAN,

Matrices on the Coefficient Space Isomorphic to the Frequency Transformation of IIR Digital 634FiltersKoichi Ichige, University of Tsukuba, JAPAN; Rokuya Ishii, Yokohama National University,JAPAN; Naohisa Otsuka, University of Tsukuba, JAPAN

Prime Factor Algorithm for Discrete Cosine Transform 639Sofija Bogdanova, St. Cyril & Methodius University, MACEDONI

• DSP Algorithms/Transformsu,

*AThne-Recursive Algorithm for the Computation of Gab or Coefficients 642f€nioLu, Towson State University, USA; Myoung An, Prometheus Inc., USA; George Kechriotis,;fMnkmg Machines Company, USA; Richard Tolimieri, City College of New York, USA

Noise-Reduction Using Selective Truncation of Wavelets 647^ X. Fan, DSC Communications Corporation, USA; N. H. Younan, Mississippi State University,

Applications of Wavelet Transform in Signal Processing 652A. Abbate and M. Doxbeck, Benet Labs., USA; P. Das, Rensselaer Polytechnic Institute, USA

• DSP Architectures

The FPGA as FFT Processor 657Les Mintzer, Momentum Data Systems, USA

BIT_Serial Architecture for the Two Dimensional DCT 662Manuel Sanchez, Universidad de Malaga, SPAIN; J. D. Bruguera, Universidad de Santiago,SPAIN; E. L. Zapata, Universidad de Malaga, SPAIN

Open Bus Alternatives for High-Performance Signal Processing 667Richard Jaenicke, SKY Computers Inc., USA

Real-Time Motion Video Compressor Using SMESH 672Tri Caohuu, Nguyen Le and Khoi Nguyen, San Jose State University, USA

Special Structure Memory for Image Processing 678Tri Caohuu and Mikchael P. Chan, San Jose State University, USA

Selecting and Designing with DSP Cores 683Jeff Bier, Berkeley Design Technology Inc., USA

DSP DMA Features Simplify Host Processor Interface Design 688Noam Levine and Shawn Arnold, Analog Devices, USA

A New DSP Architecture For Supporting Concurrent Applications 693Scot Robertson, Analog Devices, USA

Use of RISC Processors in Multicomputer DSP Environments 698Gerard Vichniac, Mercury Computer Systems, Inc., USA

TMS320C32 Communications Interface 701Peter Galicki, Texas Instruments, Inc., USA

TFteld Programmable Routers 707L. Jarrett Malone, ASAP Solutions, Inc., USA; Tarun Soni, Sterling Software, USA; GhassanY. Yacoub, ASAP Solutions, Inc., USA

K

• DSP Machines

The Next Generation in Desktop Computing: A General Purpose DSP Multi-Processor 711David M. Skapura, Scient Computing, USA

Versatile Floating Point DSP Board - ADSP 21020 Based 716S. Sivaramakrishnan, Sajira Beevi, M. P. Matthew and R. C. Agarwal, Naval Physican andOceanographic Laboratory, INDIA

A 256K Fast Fourier Transform Processor 720D. Smart, Angus Massie and W. Marwood, Defence Science & Technology Organisation,AUSTRALIA; Kee Hue, Hue Technologies Pty. Ltd., AUSTRALIA

High-Performance Qualitative Simulation on a Multi-DSP Architecture 725Marco Platzner and Bernhard Rinner, Graz University of Technology, AUSTRIA

Field Programmable Gate Array Implementation of a Class of Computationally Efficient 730Recursive Time-Frequency Distriubtion KernelsSean Gallagher, Richard Perry and Moeness Amin, Villanova University, USA

Frequency Agile Signal Processor Enhance s Navy's Space Surveillance Radar 735Brian Drachman, Scientific Research Corporation, USA

PC+DSP-Based System for Measuring All the Low Frequency Perturbations Characterizing 740Electric Power Supply QualityJesus Ruiz, E. Aramendi, L. A. Leturiondo and J. M. de Diego, Universidad del Pais Vasco,SPAIN

A Low-Cost PC-Video Board with VGA Display for Image Processing 745Christophe Vergnet, R. Goullioud, Richard Grisel, N. Abouchi and N. Giraud, CPE-LISA-EPJ,FRANCE

Algorithm Implementation Using a Client/Server Model on the TMS320C80 Parallel Processing 750DSPBogdan Vacaliuc, General Imaging Corporation, USA

• DSP Software Packages

Costas Loop Implementation with Visual DSP Design 755Xianping Jiang and Brian G. Carlson, Hyperception Inc., USA

The Time-Frequency Signal Analysis Toolbox (TFSA 5.0) 760Boualem Boashash, Queensland University of Technology, AUSTRALIA

Automated and Optimal Multivariable Systems Identification Using ADAFTx 765Wallace E. Larimore, Adaptics Inc., USA

A New Window-Based Computer Aided Engineering Tool - "ASP" for Adaptive Signal 770ProcessingHen-Geul Yeh, California State University, USA; Chuan Hsueh and George Ho, MultiDSP Inc.,USA

DSP Software for Digital Telephony and Video Conferencing 775Frank X. Y. Gao and Arthur Chow, Gao Research & Consulting Ltd., CANADA

The Use of a Schematic Entry DSP Development System to Implement Real Time Assembly 780Language Code into a Stand Alone ADSP-2181 PlatformJim Richardson, Real Time Signal Processing Inc., USA; Martin Alcock, Digital SynthesisResearch Inc., CANADA; Ross Hay, NOWSCO Pipeline Services Ltd, UK

Open Software Environment for High Performance Embedded Multiprocessors 785J. E. Sorrells and S. D. Johnson, Axiom Technology Inc., USA

• DSP Technology

Performance Analysis of Custom & Commercial Off-the-Shelf (COTS) Input Signal 790Conditioner (ISC) for the UYS-2A Navy Signal ProcessorBill Krieg, AT&T Advanced Technologies, USA

A Built-in Self Test Scheme Using Double Data Compression for Multi Chip Module 795SystemsWei Su, T. Raju Damarla and Gerald T. Michael, U.S. Army Research Labs, USA

The D950 Core and Its Coprocessor Concept 800Patrick Blouet, SGS-Thomson Microelectronics, FRANCE

RISC Processor for Digital Signal Processing Purposes 805Eduardo Braulio, Wanderley Netto, Rivanaldo Sergio de Oliveira and Osamu Saotome, InstitutoTecnologico de Aeronautica-ITA, BRAZIL

EPICS10: Development Platform for Next Generation EPICS DSP Products 810Reinier Beltman, G.R. Postuma and H.C.W. van Loon, Philips Research Laboratories, THENETHERLANDS; R. Woudsma, Philips Electronic Design and Tools, THE NETHERLANDS;A.C. Turley and R. v.d. Berg, Philips Semiconductors CIC, THE NETHERLANDS; U.Sauvagerd and B. Strassenburg, Philips Concept & Application Laboratory, GERMANY;D. Wettstein and R. K. Bertschmann, Philips Semiconductors C&M, SWITZERLAND

DSP563OO - The New High-Performance, Low-Power 24-bit DSP Core from Motorola 815Paul Marino, Elchanan Rushinek, Avner Goren, David Galanti, Oded Norman, ZviRozenshein, Natan Baron, Elkana Ben-Sinai, Philippe Sixou, Eyal Melamed-Cohen, YoramSalant, Judah Adelman and Eliezer Zand, Motorola Semiconductor Israel Ltd., ISRAEL

DSP56301 - The New High-Performance, Low-Power, High-Integration DSP from Motorola 820Zvi Rosenshein, Oded Norman, Avner Goren, David Galanti, Eytan Zmora, Dror Halahmi,Hemi Fein, Uri Dayan, Yaron Gold, Chen Goldenberg, Elchanan Rushinek, Paul Marino andNatan Baron, Motorola Semiconductor Israel Ltd., ISRAEL

Glueless Connection to PCI and ISA Buses is Supported by the New Motorola DSP 56301's 825High-Performance Host InterfaceShai Kowal, Leonid Smolyansky, Avner Goren, David Galanti, Ishay Liubovich, Dan Bruk,Paul Marino and Natan Baron, Motorola Semiconductor Israel Ltd., ISRAEL

M

• Geophysical Signal Processing

Parallel DSPs Seismic Data Interpretation Systems of the Former Soviet Union SOS-PS2x00 830Israel Medvedev, Bear Parallel Supercomputers, USA

Superresolution Technique for Identifying Overlapping Echoes 835Huajin Gu and Robert Gao, Louisiana Tech University, USA

The Application of Discrete Transforms in Seismic Signal Analysis 840Slavica K. Zarkula and Vlastimir D. Pavlovic, University of Nis, YUGOSLAVIA

• HLL Compilers

Improving Compiled DSP Code Through Language Extensions 846Carla Procaskey, Intermetrics, Inc., USA

Using C++ for Real-Time Signal Processing 851Schuyler Quackenbush and Vipul N. Parikh, AT&T Bell Laboratories, USA

Automatic Synthesis of Trellis Diagrams for Optimized DSP Assembly Code Generation 855Bemhard Wess and Martin Gotschlich, Technische Universitat Wien, AUSTRIA

Machine-Independent Compiler Optimizations for the UofT DSP Architecture 860Sanjay M. Pujare, Hewlett-Packard Company, USA; Corinna G. Lee and Paul Chow, Universityof Toronto, CANADA

Automatic Data Partitioning for HLL DSP Compilers 866Mazen A. R. Saghir, Paul Chow and Corinna G. Lee, University of Toronto, CANADA

Advances in Fixed-Point DSP Architecture Drastically Improve Performance & Simplify 872High-Level Language ImplementationBob Fine, Analog Devices, Inc., USA

New C-Like Language and Compiler for DSP 876Kenichi Yoshii, Musashi Institute of Technology, JAPAN; Hiroaki Chiba, Nagoya Institute ofTechnology, JAPAN; Hideki Fujita, Chubu Electric Power Co. Inc., JAPAN; Mototaka Sone,Musashi Institute of Technology, JAPAN; Koichi Nakamura, Nagoya Institute of Technology,JAPAN

C++ Signal Processing Class Libraries - Identifying the Need and Defining the Potential 881Mark Webster, Keith Baldwin and Sam Makhlouf, Harris Corporation, USA

• HLL Tools

A Fully Parametrized IEEE Floating-Point Operators Library For Use In Digital Signal 886ProcessingM. Aberbour, S. Gounaud, A. Houelle, H. Mehrez and N. Vaucher, University Pierre etMarie Curie, FRANCE

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Migrating Designs from High-Level to Hardware Using Block-Diagram-Based DSP Tools 891Jeff Bier and Phil Lapsley, Berkeley Design Technology, Inc., USA

DSPView: A Graphical DSP Application Development Environment 896D. Richard Hipp, Hipp, Wyrick & Company, Inc., USA; Debbie Absher, AT&T AdvancedTechnology Systems, USA

901Synthesizing Digital Signal Processing Algorithms from Formal DescriptionsKhaled Elleithy and Alaaeldin A. M. Amin, King Fahd University of Petroleum & Minerals,SAUDI ARABIA

Multiprocessor Architecture Extension for the Block-Diagram-Oriented Design Tool 906COSSAP/DESCARTESGuido Post, Vojin Zivojnovic and Sebastian Ritz, Aachen University of Technology, GERMANY

Macro Library for Mixed C/Assembly Language Development 911Greg Huffman and Kevin McCoy, DNA Enterprises Inc., USA

A DSP Kernel and Host Resource Manager for Desktop Multimedia 916Grant Brydon, Spectrum Signal Processing Inc., CANADA

• Image Analysis921

Fast Calculation of Moments of 3D Gray Level ImagesJianguo Liu, F. H. Y. Chan, and F.K. Lam, The University of Hong Kong, HONG KONG;H. F. Li, University of Concordia, CANADA

• Image Coding

Fractal-Based Compression Techniques 926M. Rashwan, Cairo University, EGYPT; Mohamed Elsherif and A. Elsayad, Electronics ResearchInstitute, EGYPT

Video Image Compression and Motion Compensation Using Multiresolution Image Features 930and Classified VQY. H. Gu, Staffordshire University, UK; W. Hermsen, Eindhoven University of Technology,NETHERLANDS; R.A. Carrasco, Staffordshire University, UK

A Fixed-Point DSP Implementation of a Video Codec Suitable for PSTN Videotelephony 935Hossein Jelveh, Kings College London, UK; Bill Hodgkiss, Signals & Software Limited, UK

Image Decomposition and Compression in Digital Multimedia Systems 940Zoran S. Bojkovic, University of Belgrade, YUGOSLAVIA

A Comparative Study of Image Adaptive Vector Quantisation Schemes 945J. Shanbehzadeh and P. O. Ogunbona, University of Wollongong, AUSTRALIA

A. Real Time Fuzzy Image Transform Coding Algorithm Implemented for the ADSP 2101 949Y.S. Kulkarni and A. Ramamurthy, Victoria Jubilee Technical Institute, INDIA

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Stripwise Image Warping 954Ladan Baghai-Ravary, Steve Beet and M.O. Tokhi, Sheffield University, UK

Comparison Study of Block-Based and Band-Based Coding of Residual Frame after ME/C in 95Sub-Band Video CompressionHwang-Seok Oh, Yunju Baek and Heung-Kyu Lee, Korea Advanced Institute of Science andTechnology, KOREA; Joon-Hyeon Jeon, Korea Telecom, KOREA

A New Videoconf erence Coding Based on Adaptive Vector Quantization and Subband 965Coding TechniquesHeng Young, Lei Chen and Z. Y. Quan, Beijing University of Posts & Telecommunications,P.R. CHINA

Optimal DCT for Hardware Implementation 970Martin Langhammer, Kaytronics, CANADA

Sequence Image Compression Using Fractal Technique 975Yao Zhao, Hongke Zhang and Baozong Yuan, Northern Jiaotong University, CHINA

Implementation of JPEG Baseline Sequential Mode on the Motorola DSP561xx Family 979S. Kalyanakrishnan, T. Satyanarayana, Rajesh R. Patwardhan and N. Srinivasa, MotorolaIndia Electronics Pvt. Ltd., INDIA

Low Bound Estimation of Image Compression Coding with Given Reconstructured Image 984QualityHuijuan Li and Jae-Ho Choi, Chonbuk National University, SOUTH KOREA; Qingdong Yao,Zhejiang University, CHINA; Hoon-Sung Kwak, Chonbuk National University, SOUTH KOREA

Variably-Sized Block-Adaptive Fractal Image Coding 990Won Doh, Hyun-Woo Kang, Jeong-Tae Seo and Dae-Hee Youn,Yonsei University, KOREA

An Implementation of Video Bit Rate Controler Using a DSP Chip 995Hyun-Sik Chang, Electronics and Telecommunications Research Institute, KOREA; Jae Yeal Nam,Keimyung University, KOREA; Sang-Gyu Park, Electronics and Telecommunications ResearchInstitute, KOREA

Subband Image Coding Using Fuzzy Quantization Step Control 999Peter Planinsic, Joze Mohorko, Marjan Golob, Zarko Cucej and Dali Donlagic, Faculty of EE andComputer Science, SLOVENIA

Underwater Image Compression Using the Wavelet Transform and Trellis Coded Vector 1005QuantizationDavid F. Hoag, H. Arda Aksu, Vinay K. Ingle, Masoud Salehi and John G. Proakis, NortheasternUniversity, USA

Implementation of a Real-Time Video Codec for Very Low Bit-Rate Communication Using 1010TMS320C40Gil-Yoon Kim, Gun-Han Park, Yunju Baek, Hwang-Seok Oh and Heung-Kyu Lee, KoreaAdvanced Institute of Science & Technology, KOREA; Joon-Hyeon Jeon, Korea TelecomS/W Research Lab, KOREA

• Image Processing

An FPGA/PLSI Hausdorff Distance Processor Design for Pattern Recognition Applications 1014Vladimir Bochev and Pencho Marinov, Bulgarian Academy of Sciences, FRANCE; ThierryCecchin, Universite de Nancy I, FRANCE

A Pyramidal Approach to Image Matching 1018Z. Y. Zhang and B. Z. Yuan, Northern Jiaotong University, P.R. CHINA

Design of Image Processing System for Stereoscopic 3-D Display Without Special Glasses 1023Yong-Moo Kwon, Je-Ho Lee, Bong-Hwan Oh, Sangkuk Kim and Jin-Ho Ahn, Korea Institueof Science and Technology, KOREA; Sang-Hui Park, Yonsei University, KOREA

A Simple and Quick Approach to Processing Drawing Images 1028

Wei Su and Gerald T. Michael, U.S. Army Research Laboratory, USA

| A Method for Rendering Rivers Based on Measured Data 1033

p, Ji HongBin, Liu Zhen and Y. Aoki, Hokkaido University, JAPAN

: Design and Chip Implementation of a Digital Signal Processor for the Video/still Camera 1038'{ Shin-Shu Wang and Wen-Hsin Chen, Industrial Technology Research Institute, TAIWAN%

A DSP-Based Real-Time Image Processing System 1042Michael S. Moore,Vanderbilt University, USA

I-An Application of Morphological Filters to Metallurgy Images 1047Virginia Ballarin, Emilce Moler, Manuel Gonzalez and Sebastian Torres, Universidad

r*. Nacional De Mar Del Plata, ARGENTINAAdvanced Image Processing Applications with DSP96OOO Digital Signal Processors 1052

| Mohamed El-Sharkawy, Purdue University, USA

Real-Time Signal Processing Using FPGAs: A Centroider Algorithm 1058Massimiliano Corba and Zoran Ninkov, Rochester Institute of Technology, USA

A Framework for High Speed Morphology 1063A. Chihoub, A. Tsai, M. LaValava and J. Turlip, Siemens Corporate Research Inc., USA