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TIC-TAC-TOE a) player vs player b) player vs computer

By :-

1) Abhinav golas 2003cs50466 2) Shruti garg 2003cs10189

Cycle No -1 INSTRUCTOR:- Anant Vishnoi

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DESIGN SPECIFICATIONS

Functionality and User interface Ticatactoe on 8*8 matrix consists of 9 blocks ( 3 rows and 3 columns). a) PLAYER VS PLAYER In the player vs player version two players turn by turn enter the input from keyboard . Keyboard keys (1-9) map to

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Data (from keyboard)

Reset ( * or # from keyboard)

TICTACTOE

Game diplay on 8*8 matrix

Score display On LED display

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the 9 blocks of tictactoe . So in order to select an ith block on tictactoe player has to press ith key on the keyboard. Once the display on 8*8 gets updated , turn switches to the next player.Moves of players are shown by / and \ on the chosen block. In case one of the player wins or the game gets draw, the 8*8 display and score on LED display get refreshed automatically . Pressing * or # at any point of time will restart the whole game. Condition for win A player wins the game when he completes a row or a column or a diagnol on the tictactoe. b) PLAYER VS COMPUTER In the player vs computer player , a single person can play the game vs an automated player . Here the automated player has been designed with always win strategy i.e it wont ever allow the other player to win the game. In both these versions, score on the LED display will specify number of games won by each player and also show which player is currently playing. DATA PATH

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WIN DECIDING MACHINE

SIX 7 SEGMENT

Input machine

board

2 player machine

STORE OF GAME

Output display machine

8*8 MATRIX INTERFACE

8*8 MATRIX

SEVEN SEGMENT INTERFACE (SCORE DISPLAY)

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HIGH LEVEL DESCRIPTION The datapath comprises of 7 modules

1) Input Machine 2) 2 player machine 3) Board, turn and score segment 4) 8x8 output display machine 5) 7 segment output machine 6) Winning machine 7) Computer player

The high level description of each of these is:-

Input machine PLAYER VS PLAYER The input machine gets the requisite data from the keyboard and converts it into a 2-bit row select and a 2-bit column select(required for chosing an appropriate block of the tictactoe). It also ensures that the data is valid, i.e. the column and row options chosen are within valid limits. Refresh data signal send by overall control machine is

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required as an enable to this input machine . It sends a status signal called valid which basically tells that the machine has received a valid input now and thus has done its job. PLAYER VS COMPUTER In this ,the input machine takes input from keyboard or the Computer player depending on whichever of them has the current turn. So the two inputs are basically multiplexed with the select coming from turn signal (described later). Inputs: Col: 3 bits, for the keyboard module Clock 15hz: 1 bit, for keyboard module Clock 490hz: 1 bit, for the keyboard module Refresh_data: 1 bit, enable signal for the circuit

(control signal) Clock 16kHz: 1 bit, for circuit

Outputs: X: 2 bit, row select ( from keyboard or computer

player) Y: 2 bit, column select (from keyboard or computer

player) Valid: 1 bit, data ready output (status signal)

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COMPUTER PLAYER Our automated computer player has been designed in VHDL with always winning strategy which is described as follows:-

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Board Board basically is a store for tictactoe values. The Board consists of a 3x3x2 register, i.e. we require a 3x3 set of boxes for the board, each of which is a 2 bit register. 3*3 set of boxes is needed to store value(2 bit) in each of the 9 boxes of tictactoe . So we have divided the board into 3 columns, each of which is a 6 bit register with parallel in parallel out. This is done by means of D flip flops. In addition there is also a T flip flop which contains the data as to whose turn is it. The coding scheme for the 2 bit register is as follows:- 00 empty 01 X (shown by / on 8*8) 10 O (shown by \ on 8*8) 11 invalid Inputs: Data in: 6 bits ( comes from the two player machine

which is described later) Column select: 3 bits (coming from input machine) Board reset: 1 bit resets the whole board( control

signal ) Dav :- enable to the board (control signal) Clock: 1 -bit

Outputs:

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Column A,B,C: 6 bits each

TURN LOGIC:-

It consists of a T flipflop which has enable coming from done signal given by two player machine. Hence it toggles the turn whenever input from first player has been fed by the two player to the board.

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2 player machine

The 2 player machine gets the row and column in which to write from input machine and decides whether the selected spot is empty or not. It then updates the requisite column of the board with the appropriate data according to the turn of the player. Inputs: Dav: 1 bit, control signal when the machine is to be

active X: 2 bit, row select Turn 1 bit will show which player is currently

playing 0 or X ColumnX: 6 bit data Clock: 1 bit

Outputs: BA,BB,BC: 2 bits each, data to be fed into each row

of the specified column Done :- status signal which gets on when the machine

has done its work.

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DETAILED DESCRIPTION The BOARD which is a store of the tictactoe supplies the previous data of all rows and columns. The column select coming from input machine then decides the current column and takes the six bit data (corresponding to 3 rows) of that particular colum which it sends as input to two player machine. Now the two player machine also has the row select coming as input from input machine so it basically modifies two bits(corresponding to selected row ) of the column data(6 bit) according to the turn of player and passes rest of the 4 bits as it is . So the six bit output from two player machine consists of modified column data which it then sends to BOARD to restore modified data.

Done

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Winning condition machine

This is a machine which runs continuously. This continuously evaluates if a player has won the game. This it does by monitoring the 8 lines which can lead to a player win. Logic for this machine has been coded in VHDL which basically takes the present state of the store (BOARD) and analyzes the 8 lines ( 3 rows , 3 columns and 2 diagnols). If any of these 8 lines have been filled by the same player then the machine gives win signal and also the winning player. Inputs: CA,CB,CC: 6 bits each, the 3 column of the board

Outputs: Win: 1 bit, whether a player has won the game Player: 1 bit, if the game has been won, which

player has won the game Draw: 1 bit, if the game ended in a draw

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8x8 output machine

The 8x8 output machine redraws the board when the board needs to be updated, i.e. after each move. It has a column counter(3 bit) . Corresponding to each of the column the output machine takes the 6 bit column data from BOARD and then decodes those 6 bits to give 16 bits ( 8 for columns and 8 for rows) which are mapped directly to the 8*8 matrix on FPGA. Inputs: BoxA,B,C : 2 bits each, data for each box in column

i Enable: 1 bit, to enable circuit Clock: 1 bit

Outputs: Circolumn: 2 bits, to select which board column we

wish to display Col: 8 bits, to go to 8x8 display Row: 8 bits, to go to RowA of 8x8 display Outputdisp: 1 bit, completion signal, i.e. the machine

has completed updating the display.

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7 segment display machine

This machine has the task of keeping the score board updated, which displays the current score and whose turn is it. This machine is different from others as it is independent of other machines and runs continuously without monitoring Display format:

13- 15 The left 2 digits indicate the score of player 1, while the right 2 digits, of player 2. The dash in the middle is a moving display, if it is on the left hand side, it means that it is the turn of player 1, else if it is on player 2s side, then it is player 2s turn. Inputs: PlayerA,PlayerB: 8 bits each, contains BCD coded

number for number of player victories. Turn: 1 bit, tells whose turn is it.

Outputs: 7segout: 8 bit output for data to be displayed col: 3 bit, which of the 6 7-segment displays to use

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Control Machine

This machine controls all the other machines, and is basically the control part of the circuit, and controls all the smaller machines operating in the circuit. Inputs: Win: 1 bit, from the winning condition machine Draw: 1 bit, from the winning condition machine Valid: 1 bit, from the input machine Outputdisp: 1 bit, from the 8x8 output machine

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Outputs: Refresh_data: 1 bit, to the input machine telling it to

get fresh inputs Dav: 1 bit, to the 2 player machine, telling it to

write this new input to the board En: 1 bit, to the 8x8 output machine, to refresh

output Score: 1 bit, to score updater machine, to update the

score Turn: 1 bit, to maintain the turn register, which tells

the circuit whose turn is it.

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IMPLEMENTATION RESULTS

PLAYER VS COMPUTER Number of External IOBs 52 out of 160 85% Flops: 0 Latches: 0 Number of CLBs 296 out of 400 74% Total CLB Flops: 74 out of 800 9% 4 input LUTs: 502 out of 800 62% 3 input LUTs: 72 out of 400 18% Number of OSCILLATORs 1 out of 1 100% Number of TBUFs 24 out of 880 2%

PLAYER VS PLAYER Number of CLBs: 121 out of 400 30% CLB Flip Flops: 52 4 input LUTs: 175 3 input LUTs: 32 16X1 ROMs: 8 Number of bonded IOBs: 52 out of 61 85% IOB Flops: 0 IOB Latches: 0 Number of TBUFs: 24 out of 880 2% Total equivalent gate count for design: 1834 Additional JTAG gate count for IOBs: 2496

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TIMING REPORT PLAYER VS PLAYER Minimum period: 33.080ns (Maximum frequency: 30.230MHz) Maximum combinational path delay: 36.802ns Maximum net delay: 14.245ns COMPUTER VS PLAYER Minimum period: 80.523ns (Maximum frequency: 12.419MHz) Maximum net delay: 26.818ns

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IMPLEMENTATION DETAILS #CN 17 TO 20 NET R0 LOC = P56; NET R1 LOC = P57; NET R2 LOC = P58; NET R3 LOC = P59; NET C0 LOC = P60; NET C1 LOC = P61; NET C2 LOC = P62; # CN 14 TO 9 NET COL4 LOC =P45; NET COL5 LOC = P44; NET COL6 LOC = P40; NET COL7 LOC = P39; NET COL0 LOC = P38; NET COL1 LOC = P37; NET COL2 LOC = P36; NET COL3 LOC = P35; NET ROW6 LOC = P46; NET ROW5 LOC = P47; NET ROW2 LOC = P48; NET ROW7 LOC = P49; #CN 13 TO 12 NET ROW0 LOC = P14; NET ROWB LOC = P19; NET ROWB LOC = P25; NET ROW3 LOC = P17; NET ROW4 LOC = P18; NET ROWB LOC = P26; NET ROWB LOC = P27; NET ROW1 LOC = P23; NET ROWB LOC = P16;

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NET ROWB LOC = P15; NET ROWB LOC = P20; NET ROWB LOC = P24; CN 8 TO 21 NET DATA7SEG LOC = P75; NET DATA7SEG LOC = P77; NET DATA7SEG LOC = P79; NET DATA7SEG LOC = P80; NET DATA7SEG LOC = P81; NET DATA7SEG LOC = P82; NET DATA7SEG LOC = P83; NET DATA7SEG LOC = P84; NET COL7SEG0 LOC = P3; NET COL7SEG1 LOC = P4; NET COL7SEG2 LOC = P5; NET GND LOC = P6;

CONCLUSION The two player machine and one player machine for tictactoe work fine. Limitations:- Score cannot be displayed properly because of limitation on number of connectors available. For temporary basis con-21 is being used which doesnot maps the first pin and hence introduces an error in the score. Possible refinements:

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We thought of introducing this additional feature which we couldnot because of timing constraints:- difficulty levels in one player machine. As for now we have computer player which will always win.

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