timer/counter pulse width modulation modes cs-280 dr. mark l. hornick 1
TRANSCRIPT
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Timer/Counter
Pulse Width Modulation modes
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There are two PWM modes of Timer/Counter 0
PWM mode is determined by bits WGM00:WGM01 1:1 – Fast PWM mode
Timer/Counter counts from 0x00 to 0xFF After reaching 0xFF, rolls over to 0x00 and starts
over
1:0 – Phase Correct PWM mode Timer/Counter counts from 0x00 to 0xFF to
0x00 After reaching 0xFF, decrements back down to 0x00
and starts over
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In both PWM modes, the T/C counts all the way to MAX
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MAX= 0xFF
OCR0
BOTTOM = 0x00
ticks
Counter value
Fast PWM Mode
MAX= 0xFF
OCR0
BOTTOM = 0x00
ticks
Counter value
PWM Phase Correct Mode
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Output Comparator behavior in PWM Modes
Output Comparator can drive the voltage on OC0 (PB3) high or low
PB3 must be setup for output
When in PWM modes, bits COM01:COM00 affect the operation as follows:
0 0: OC0 disconnected 0 1: Reserved 1 0: Clear OC0 on compare match 1 1: Set OC0 on compare match
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Signals on OC0 in Fast PWM mode
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MAX= 0xFF
OCR0
BOTTOM = 0x00
ticks
Counter value
Fast PWM Mode
ticks
COM01:COM00 = 1:1 Set OC0 on compare match
Signal on OC0
COM01:COM00 = 1:0 Clear OC0 on compare match
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Fast PWM Interrupts
OCF0 flag in TIFR is set when TCNT0=OCR0. When OCIE0 is enabled: Compare Match interrupt is generated (ISR jump vector at 0x14) OCF0 is automatically reset when ISR is executed
TOV0 is set when TCNT0 overflows from 0xFF to 0. When TOIE0 is enabled: Overflow interrupt is generated (ISR jump vector at 0x16) TOV0 is automatically reset when ISR is executed
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The duration of pulse width can be modulated by varying the value of OCR0
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Behavior of OC0 in PWM Phase Correct mode
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MAX= 0xFF
OCR0
BOTTOM = 0x00
ticks
Counter value
ticks
COM01:COM00 = 1:1 Set OC0 on compare match
Signal on OC0
COM01:COM00 = 1:0 Clear OC0 on compare match
PWM Phase Correct Mode
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Phase-correct Interrupts
OCF0 flag in TIFR is set when TCNT0=OCR0. When OCIE0 is enabled: Compare Match interrupt is generated (ISR jump vector at 0x14) OCF0 is automatically reset when ISR is executed
TOV0 is set when TCNT0 decrements back to 0. When TOIE0 is enabled: Overflow interrupt is generated (ISR jump vector at 0x16) TOV0 is automatically reset when ISR is executed
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Pulse width modulation in Phase-correct operation
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