G Rajesh [U4ECE 13117]

16,384-Bit Dynamic Random Access Memory

TMS 4116

Specifications16,834 x 1 OrganizationLow Power dissipation -operation : 462 Mw -Standby : 20mW1 T Cell Design, N channel Si-Gate

Technology16 pin ,7.62 mm package Config.

16,384 bit MOS RAM Organized as 16,384 one-bit words Single Transistor storage Cells & N-Channel si-Gates Only 10mW avg. power required to refresh and retain memory Compatible with series 74 TTL circuits

Pin Diagram A0-A6 - Addresses CAS - Column Address Strobe D - Data input Q - Data Output Ras - Row Address Strobe VBB - (-5V) Power Supply VCC - +5V Power Supply VDD - +12V Power Supply VSS - Ground W - Write Enable

Operation 14 Address Bits are

Required A0 – A6 are used Latched by RAS & CAS

To select Read/Write Mode Logic High – Read Mode Data i/p is disabled at Read Mode

Data is written during a Write cycle

For Reading a data

Must be refreshed at least every 2 mSec

Vbb Must be Removed LastElse dissipation in excess occurs due to internal forward bias conditions

Functional Diagram

Operation CyclesRead Cycle

Early Write Cycle

Write Cycle

Read-Write/Read-Modify-Write Cycle

Thank You