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Digital Signal Processing World Class Designs Kenton Williston with Rick Gentile Keith Jack David Katz Nasser Kehtarnavaz Walt Kester Dake Liu Robert Meddins Robert Oshana lan Poole Khalid Sayood Li Tan AMSTERDAM • BOSTON • HEIDELBERG • LONDON NEW YORK • OXFORD • PARIS • SAN DIEGO SAN FRANCISCO • SINGAPORE • SYDNEY • TOKYO Newnes is an imprint of Elsevier Newnes

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  • Digital Signal Processing World Class Designs

    Kenton Wil l iston

    with

    Rick Gentile Keith Jack

    David Katz Nasser Kehtarnavaz

    Wal t Kester Dake Liu

    Robert Meddins Robert Oshana

    lan Poole Khalid Sayood

    Li Tan

    AMSTERDAM BOSTON HEIDELBERG LONDON NEW YORK OXFORD PARIS SAN DIEGO

    SAN FRANCISCO SINGAPORE SYDNEY TOKYO

    Newnes is an imprint of Elsevier Newnes

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  • Contents

    Preface /x

    About the Editor. xv

    About the Contributors xvii

    Chapter 1: ADCs, DACs, and Sampling Theory 01 1.1 Coding and Quantizing 02 1.2 Sampling Theory 24 1.3 Data Converter AC Errors 36 1.4 General Data Converter Specifications 93 1.5 Defining the Specifications 96 References 117 Bibliography 119

    Chapter 2: Digital Filters 123 2.1 Chapter Preview 123 2.2 Analog Signal Processing 124 2.3 An Alternative Approach 125 2.4 The Complete DSP System 126 2.5 Recap 130 2.6 Digital Data Processing 131 2.7 The Running Average Filter 131 2.8 Representation of Processing Systems 134 2.9 Feedback (or Recursive) Filters 134 2.10 Chapter Summary 137 Bibliography 138

    Chapter 3: Frequency Domain Processing 139 3.1 Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT) 140 3.2 Short-Time Fourier Transform (STFT) 141

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  • vi Contents

    3.3 Discrete Wavelet Transform (DWT) 142 3.4 Signal Processing Toolset 145 References 156

    Chapter 4: Audio Coding 759 4.1 Overview : 160 4.2 Introduction 160 4.3 MPEG Audio Coding 164 4.4 MPEG Advanced Audio Coding 173 4.5 Dolby AC3 (Dolby Digital) 180 4.6 Other Standards 183 4.7 Summary 183 Bibliography 183

    Chapter 5: Video Processing 185 5.1 Rounding Considerations 186 5.2 SDTV-HDTV YCbCr Transforms 187 5.3 4:4:4 to 4:2:2 YCbCr Conversion 189 5.4 Display Enhancement 192 5.5 Video Mixing and Graphics Overlay 198 5.6 Luma and Chroma Keying 204 5.7 Video Scaling 219 5.8 Scan Rate Conversion 226 5.9 Noninterlaced-to-Interlaced Conversion 237 5.10 Interlaced-to-Noninterlaced Conversion 238 5.11 DCT-Based Compression 246 5.12 Fixed Pixel Display Considerations 250 5.13 Application Example 251 Bibliography 253

    Chapter 6: Modulation 255 6.1 Radio Carrier 256 6.2 Amplitude Modulation 256 6.3 Modulation Index 261 6.4 Frequency Modulation 261 6.5 Modulation Index and Deviation Ratio 263 6.6 Sidebands 263 6.7 Bandwidth 265

  • Contents vii

    6.8 Improvement in Signal-to-Noise Ratio 266 6.9 Frequency-Shift Keying 266 6.10 Phase Modulation 267 6.11 Phase-Shift Keying 268 6.12 Minimum-Shift Keying 270 6.13 Quadrature Amplitude Modulation 272 6.14 Spread Spectrum Techniques 274 6.15 Frequency Hopping 274 6.16 Direct-Sequence Spread Spectrum 275 6.17 Orthogonal Frequency Division Multiplexing 279 6.18 Bandwidth and Data Capacity 281 6.19 Summary 282

    Chapter 7: DSP Hardware Options 283 7.1 DSP Theory for Hardware Designers 284 7.2 Theory, Applications, and Implementations 294 7.3 DSP Applications 296 7.4 DSP Implementations 304 7.5 Review of Processors and Systems 309 7.6 Design Flow 317 7.7 Conclusions 324 References 325

    Chapter 8: DSP Processors and Fixed-Point Arithmetic 329 8.1 Digital Signal Processor Architecture 329 8.2 Digital Signal Processor Hardware Units 333 8.3 Digital Signal Processors and Manufacturers 335 8.4 Fixed-Point and Floating-Point Formats 336 8.5 Finite Impulse Response and Infinite Impulse Response Filter

    Implementations in Fixed-Point Systems 358 8.6 Digital Signal Processing Programming Examples 364 8.7 Summary 375 Bibliography 378

    Chapter 9: Code Optimization and Resource Partitioning 379 9.1 Introduction 380 9.2 Event Generation and Handling 380

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  • viii Contents

    9.3 Programming Methodology 384 9.4 Architectural Features for Efficient Programming 385 9.5 Compiler Considerations for Efficient Programming 393 9.6 System and Core Synchronization 399 9.7 Memory Architecturethe Need for Management 403 9.8 Physics of Data Movement 414 Bibliography 421

    Chapter 10: Testing and Debugging DSP Systems 423 10.1 Multicore System-on-a-Chip 423 10.2 Software Architecture for SoC 431 10.3 SoC System Boot Sequence 435 10.4 Tools Support for SoC 436 10.5 A Video Processing Example of SoC 437 Bibliography 448

    Index 457

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