topic: arithmetic circuits course: digital systems slide no. 1 chapter # 5: arithmetic circuits

Topic: Arithmetic CircuitsCourse: Digital Systems

Slide no. 1

Chapter # 5:

Arithmetic Circuits


Slide no. 2

Chapter Overview

• Binary Number Representation

Sign & Magnitude, Ones Complement, Twos Complement

• Binary Addition

Full Adder Revisited

BCD Circuits

• Combinational Multiplier Circuit


Slide no. 3

Number Systems

Representation of Negative Numbers

Representation of positive numbers same in most systems

Major differences are in how negative numbers are represented

Three major schemes:

sign and magnitude

ones complement

twos complement

Assumptions:

we'll assume a 4 bit machine word

16 different values can be represented

roughly half are positive, half are negative


Slide no. 4

Number Systems

Sign and Magnitude Representation

0000

0111

0011

1011

11111110

1101

1100

1010

1001

1000

0110

0101

0100

0010

0001

+0+1

+2

+3

+4

+5

+6

+7-0

-1

-2

-3

-4

-5

-6

-7

0 100 = + 4 1 100 = - 4

+

-

High order bit is sign: 0 = positive (or zero), 1 = negative

Three low order bits is the magnitude: 0 (000) through 7 (111)

Number range for n bits = +/-2 -1

Representations for 0

n-1


Slide no. 5

Number Systems

Sign and Magnitude

Cumbersome addition/subtraction

Must compare magnitudes to determine sign of result

Examples on Sign and Magnitude

(To be done during class)


Slide no. 6

Number Systems

Ones Complement

Shortcut method:

simply compute bit wise complement

0111 -> 1000


Slide no. 7

Number Systems

Ones Complement

Subtraction implemented by addition & 1's complement

Still two representations of 0! This causes some problems

Some complexities in addition

0000

0111

0011

1011

11111110

1101

1100

1010

1001

1000

0110

0101

0100

0010

0001

+0+1

+2

+3

+4

+5

+6

+7-7

-6

-5

-4

-3

-2

-1

-0

0 100 = + 4 1 011 = - 4

+

-


Slide no. 8

Examples on Ones Complement

(to be done during the class)


Slide no. 9

Number RepresentationsTwos Complement

0000

0111

0011

1011

11111110

1101

1100

1010

1001

1000

0110

0101

0100

0010

0001

+0+1

+2

+3

+4

+5

+6

+7-8

-7

-6

-5

-4

-3

-2

-1

0 100 = + 4 1 100 = - 4

+

-

Only one representation for 0

like 1's compexcept shiftedone positionclockwise


Slide no. 10

Number Systems

Twos Complement Numbers

Shortcut method:

Twos complement = bitwise complement + 1

1001 -> 0110 + 1 -> 0111 (representation of 7)


Slide no. 11

Number Systems

Examples on Twos Complement Numbers

(To be done during class)


Slide no. 12

Number Systems

Overflow Conditions

Add two positive numbers to get a negative number

or two negative numbers to get a positive number

5 + 3 = -8 -7 - 2 = +7

0000

0001

0010

0011

1000

0101

0110

0100

1001

1010

1011

1100

1101

0111

1110

1111

+0

+1

+2

+3

+4

+5

+6

+7-8

-7

-6

-5

-4

-3

-2

-1

0000

0001

0010

0011

1000

0101

0110

0100

1001

1010

1011

1100

1101

0111

1110

1111

+0

+1

+2

+3

+4

+5

+6

+7-8

-7

-6

-5

-4

-3

-2

-1


Slide no. 13

Number Systems

Examples on Overflow Conditions ( to be done during class)


Slide no. 14

Networks for Binary AdditionHalf Adder

With twos complement numbers, addition is sufficient

Ai 0 0 1 1

Bi 0 1 0 1

Sum 0 1 1 0

Carry 0 0 0 1

AiBi

0 1

0

1

0 1

1 0

Sum = Ai Bi + Ai Bi

= Ai + Bi

AiBi

0 1

0

1

0 0

10

Carry = Ai Bi

Half-adder Schematic

Carry

Sum A i

B i


Slide no. 15

Networks for Binary Addition

Full Adder

+

A3 B3

S3

+

A2 B2

S2

+

A1 B1

S1

+

A0 B0

S0C1C2C3

Cascaded Multi-bit Adder

usually interested in adding more than two bits

this motivates the need for the full adder


Slide no. 16

Networks for Binary Addition

Example: Full Adder

To be done during class


Slide no. 17

Networks for Binary AdditionAdder/Subtractor

A - B = A + (-B) = A + B + 1

A B

CO

S

+ CI

A B

CO

S

+ CI

A B

CO

S

+ CI

A B

CO

S

+ CI

0 1

Add/Subtract

A 3 B 3 B 3

0 1

A 2 B 2 B 2

0 1

A 1 B 1 B 1

0 1

A 0 B 0 B 0

Sel Sel Sel Sel

S 3 S 2 S 1 S 0

Overflow


Slide no. 18

Arithmetic Logic Unit Design74181 TTL ALU

S3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

S2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

S1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

S0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

Logic Function F = not A F = A nand B F = (not A) + B F = 1 F = A nor B F = not B F = A xnor B F = A + not B F = (not A) B F = A xor B F = B F = A + B F = 0 F = A (not B) F = A B F = A

Cn = 0 F = A minus 1 F = A B minus 1 F = A (not B) minus 1 F = minus 1 F = A plus (A + not B) F = A B plus (A + not B) F = A minus B minus 1 F = A + not B F = A plus (A + B) F = A plus B F = A (not B) plus (A + B) F = (A + B) F = A F = A B plus A F= A (not B) plus A F = A

Cn = 1 F = A F = A B F = A (not B) F = zero F = A plus (A + not B) plus 1 F = A B plus (A + not B) plus 1 F = (A + not B) plus 1 F = A minus B F = (A + not B) plus 1 F = A plus (A + B) plus 1 F = A (not B) plus (A + B) plus 1 F = (A + B) plus 1 F = A plus A plus 1 F = AB plus A plus 1 F = A (not B) plus A plus 1 F = A plus 1

Selection M = 1 M = 0, Arithmetic Functions


Slide no. 19

BCD Addition

BCD Number Representation

Decimal digits 0 through 9 represented as 0000 through 1001 in binary

Addition:

5 = 0101

3 = 0011

1000 = 8

5 = 0101

8 = 1000

1101 = 13!

Problemwhen digit

sum exceeds 9

Solution: add 6 (0110) if sum exceeds 9!

5 = 0101

8 = 1000

1101

6 = 0110

1 0011 = 1 3 in BCD

9 = 1001

7 = 0111

1 0000 = 16 in binary

6 = 0110

1 0110 = 1 6 in BCD


Slide no. 20

BCD AdditionAdder Design

Add 0110 to sum whenever it exceeds 1001 (11XX or 1X1X)

F A F A F A F A

F A F A

Cin

A 3 A 2 A 1 A 0 B 3 B 2 B 1 B 0

Cout S 3 S 2 S 1 S 0

0

CO CI

S

CO CI

S

CO CI

S

CO CI

S

CO CI

S

CO CI

S

1 1XX A1

A2 1X1X


Slide no. 21

Combinational MultiplierBasic Concept

multiplicand

multiplier

1101 (13)

1011 (11)

1101

1101

0000

1101

*

10001111 (143)

Partial products

product of 2 4-bit numbersis an 8-bit number


Slide no. 22

Combinational MultiplierPartial Product Accumulation

A0

B0

A0 B0

A1

B1

A1 B0

A0 B1

A2

B2

A2 B0

A1 B1

A0 B2

A3

B3

A2 B0

A2 B1

A1 B2

A0 B3

A3 B1

A2 B2

A1 B3

A3 B2

A2 B3A3 B3

S6 S5 S4 S3 S2 S1 S0S7


Slide no. 23

Combinational MultiplierPartial Product Accumulation

Note use of parallel carry-outs to form higher order sums

12 Adders, if full adders, this is 6 gates each = 72 gates

16 gates form the partial products

total = 88 gates!

A 0 B 0 A 1 B 0 A 0 B 1 A 0 B 2 A 1 B 1 A 2 B 0 A 0 B 3 A 1 B 2 A 2 B 1 A 3 B 0 A 1 B 3 A 2 B 2 A 3 B 1 A 2 B 3 A 3 B 2 A 3 B 3

HA

S 0 S 1

HA

F A

F A

S 3

F A

F A

S 4

HA

F A

S 2

F A

F A

S 5

F A

S 6

HA

S 7


Slide no. 24

Chapter Review

We have covered:

• Binary Number Representation positive numbers the same difference is in how negative numbers are represented twos complement easiest to handle: one representation for zero, slightly complicated complementation, simple addition

• Binary Networks for Additions basic HA, FA

• BCD Adders Simple extension of binary adders

topic: arithmetic circuits course: digital systems slide no. 1 chapter # 5: arithmetic circuits

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