training manual 50pq30 plasma display -...
TRANSCRIPT
Advanced Single Scan Troubleshooting
Training Manual
50PQ30 Plasma Display50PQ30 Plasma Display
720p720p
Published November 05th, 2009
2 November 2009 50PQ30 Plasma
Overview of Topics to be Discussed
• Y-SUS Board Delivers Logic Signals and FG5V to both upper and lower boards.
• Z-SUS Output Board (Also uses one Z-SUB board for bottom panel connector)
• Y-Drive Boards (2) Upper and Lower. Lower board delivers Scan to Upper
• Control Board• X Drive Boards (3)
Circuit Board Operation, Troubleshooting and Alignment of :• Switch mode Power Supply
• Main Board
Section 1
Section 2
Contact Information, Preliminary Matters, Specifications,Plasma Overview, General Troubleshooting Steps, Disassembly Instructions, Voltage and Signal Distribution
OUTLINEOUTLINE
• Main Power Switch (Version 3). Shuts off stand by 5V.
3 November 2009 50PQ30 Plasma
50PQ30 Plasma DisplaySection 1
This Section will cover Contact Information and remind the Technician of Important Safety Precautions for the Customers Safety as well as the Technician and the Equipment.
Basic Troubleshooting Techniques which can save time and money sometimes can be overlooked. These techniques will also be presented.
This Section will get the Technician familiar with the Disassembly, Identification and Layout of the Plasma Display Panel.
At the end of this Section the Technician should be able to Identify the Circuit Boards and have the ability and knowledge necessary to safely remove and replace any Circuit Board or Assembly.
Overview of Topics to be DiscussedOverview of Topics to be Discussed
4 November 2009 50PQ30 Plasma
IMPORTANT SAFETY NOTICEIMPORTANT SAFETY NOTICE
The information in this training manual is intended for use by persons possessing an adequate background in electrical equipment, electronic devices, and mechanical systems. In any attempt to repair a major Product, personal injury and property damage can result. The manufacturer or seller maintains no liability for the interpretation of this information, nor can it assume any liability in conjunction with its use. When servicing this product, under no circumstances should the original design be modified or altered without permission from LG Electronics. Unauthorized modifications will not only void the warranty, but may lead to property damage or user injury. If wires, screws, clips, straps, nuts, or washers used to complete a ground path are removed for service, they must be returned to their original positions and properly fastened.
CAUTIONCAUTION
To avoid personal injury, disconnect the power before servicing this product. If electrical power is required for diagnosis or test purposes, disconnect the power immediately after performing the necessary checks. Also be aware that many household products present a weight hazard. At least two people should be involved in the installation or servicing of such devices. Failure to consider the weight of an product could result in physical injury.
Preliminary Matters (The Fine Print)Preliminary Matters (The Fine Print)
New Training Materials on New Training Materials on the Learning Academy sitethe Learning Academy site
Customer Service (and Part Sales) (800) 243-0000
Technical Support (and Part Sales) (800) 847-7597
USA Website (GCSC) aic.lgservice.com
Customer Service Website us.lgservice.com
LG Web Training lge.webex.com
LG CS Academy lgcsacademy.com
Published November 2009 by LG Technical Support and TrainingLG Electronics Alabama, Inc.
201 James Record Road, Huntsville, AL, 35813.
http://136.166.4.200LG Learning Academy
32LG40, 32LH30, 37LH55, 42LG60, 42LG70, 42LH20, 42LH40, 42LH50, 47LG9042PG20, 42PQ20, 50PQ30, 50PG20, 50PS80, 50PS60
LCD-DV:PLASMA:
Also available on Also available on the Plasma pagethe Plasma page
Plasma PanelAlignment Handbook
Page 5Page 5
LG CONTACT INFORMATIONLG CONTACT INFORMATION
6 November 2009 50PQ30 Plasma
Today’s sophisticated electronics are electrostatic discharge (ESD) sensitive. ESD can weaken or damage the electronics in a manner that renders them inoperative or reduces the time until their next failure. Connect an ESD wrist strap to a ground connection point or unpainted metal in the product. Alternatively, you can touch your finger repeatedly to a ground connection point or unpainted metal in the product. Before removing a replacement part from its package, touch the anti-static bag to a ground connection point or unpainted metal in the product. Handle the electronic control assembly by its edges only. When repackaging a failed electronic control assembly in an anti-static bag, observe these same precautions.
Regulatory InformationRegulatory Information
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a residential installation. This equipment generates, uses, and can radiate radio frequency energy, and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate the receiving antenna; Increase the separation between the equipment and the receiver; Connect the equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the dealer or an experienced radio/TV technician for help.
ESD NoticeESD Notice (Electrostatic Static Discharge)(Electrostatic Static Discharge)
7 November 2009 50PQ30 Plasma
Safety & Handling Regulations
1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy.
2. Check the model label. Verify model names and board model matches.
3. Check details of defective condition and history. Example: Y Board Failure, Mal-discharge on screen, etc.
1. Approximately 10 minute pre-run time is required before any adjustments are performed.
2. Refer to the Voltage Sticker inside the Panel when making adjustments on the Power Supply, Y-SUS and Z-SUS Boards.
3. Always adjust to the specified voltage level (+/- ½ volt) unless otherwise specified.
4. Be cautious of electric shock from the PDP module since the PDP module uses high voltage, check that the Power Supplyand Drive Circuits are completely discharged because of residual current stored before Circuit Board removal.
4. C-MOS circuits are used extensively for processing the Drive Signals and should be protected from static electricity.
5. The PDP Module must be carried by two people. Always carry vertical NOT horizontal.
6. The Plasma television should be transported vertically NOT horizontally.
7. Exercise care when making voltage and waveform checks to prevent costly short circuits from damaging the unit.
8. Be cautious of lost screws and other metal objects to prevent a possible short in the circuitry.
9. New Panels and Frames are much thinner than previous models. Be Careful with flexing these panels. Be careful with lifting Panels from a horizontal position. Damage to the Frame mounts or panel can occur.
10. New Plasma models have much thinner cabinet assemblies and mounts. Be extremely careful when moving the set around as damage can occur.
Checking Points to be Considered
Safety and Handling, Checking PointsSafety and Handling, Checking Points
8 November 2009 50PQ30 Plasma
Basic Troubleshooting StepsBasic Troubleshooting Steps
Define, Localize, Isolate and Correct
• Define Look at the symptom carefully and determine what circuits could be causing the failure. Use your senses Sight, Smell, Touch and Hearing. Look for burned parts and check for possible overheated components. Capacitors will sometimes leak dielectric material and give off a distinct odor. Frequency of power supplies will change with the load, or listen for relay closing etc. Observation of the front Power LEDs may give some clues.
• Localize After carefully checking the symptom and determining the circuits to be checked and after giving a thorough examination using your senses the first check should always be the DC Supply Voltages to those circuits under test. Always confirm the supplies are not only the proper level but be sure they are noise free. If the supplies are missing check the resistance for possible short circuits.
• Isolate To further isolate the failure, check for the proper waveforms with the Oscilloscope to make a final determination of the failure. Look for correct Amplitude Phasing and Timing of the signals also check for the proper Duty Cycle of the signals. Sometimes “glitches” or “road bumps” will be an indication of an imminent failure.
• Correct The final step is to correct the problem. Be careful of ESD and make sure to check the DC Supplies for proper levels. Make all necessary adjustments and lastly always perform a Safety AC Leakage Test before returning the product back to the Customer.
9 November 2009 50PQ30 Plasma
This section of the manual will discuss the specifications of the 50PQ30 Advanced Single Scan Plasma Display Television.
50PQ30 PRODUCT INFORMATION SECTION50PQ30 PRODUCT INFORMATION SECTION
10 November 2009 50PQ30 Plasma
50PQ30 Specifications50PQ30 Specifications
720P PLASMA HDTV50” Class (50” diagonal)
• 720p HD Resolution• 600 Hz sub field driving• 1,500 cd/m2 Brightness• Dual XD Engine™• 2000,000:1 Dynamic Contrast Ratio • Smart Energy Saving• 3x HDMI™ V.1.3 with Deep Color (2 Rear, 1 side).• AV Mode (Cinema, Sports, Game) • Clear Voice • LG SimpLink™ Connectivity • Invisible Speaker System • 100,000 Hours to Half Brightness (Typical) • PC Input
11 November 2009 50PQ30 Plasma
(600 Hz Sub Field Driving)
• 600 Hz Sub Field Driving is achieved by using 10 sub-fields per frame process (vs. Comp. 8 sub-field/frame)
• No smeared images during fast motion scenes
600Hz Sub Field Driving600Hz Sub Field Driving
Sub Field firing occurs using wall charge and polarity differences between Y-SUS and Z-SUS signals.
Original Image 10 Sub Fields Per Frame
12 November 2009 50PQ30 Plasma
Specifications Logo Familiarization (Picture Wizard)Specifications Logo Familiarization (Picture Wizard)
Customers can customize picture performance without the need for additional expense.
Picture Wizard easily guides consumers through the calibration process using on-screen reference points.
13 November 2009 50PQ30 Plasma
50PQ30 Logo Familiarization Page 1 of 250PQ30 Logo Familiarization Page 1 of 2
Invisible SpeakerPersonally tuned by Mr. Mark Levinson for LG TAKE IT TO THE EDGE newly introduces ‘Invisible Speaker’ system, guaranteeing first class audio quality personally tuned by Mr. Mark Levinson, world renowned as an audio authority. It provides Full Sweet Spot and realistic sound equal to that of theaters with its Invisible Speaker.
HD RESOLUTION 720p HD Resolution Pixels: 1365 (H) × 768 (V)High definition television is the highest performance segment of the DTV system used in the US. It’s a wide screen, high-resolution video image, coupled with multi-channel, compact-disc quality sound.
HDMI (1.3 Deep Color) Digital multi-connectivity HDMI (1.3 Deep color) provides a wider bandwidth (340MHz, 10.2Gbps) than that of HDMI 1.2, delivering a broader range of colors, and also drastically improves the data-transmission speed.
Dual XD EngineRealizing optimal quality for all imagesOne XD Engine optimizes the images from RF signals as another XDEngine optimizes them from External inputs. Dual XD Engine presents images with optimal quality two times higher than those of previous models.
14 November 2009 50PQ30 Plasma
50PQ30 Logo Familiarization Page 2 of 250PQ30 Logo Familiarization Page 2 of 2
AV Mode "One click" Cinema, THX Cinema, Sport, Game mode.TAKE IT TO THE EDGE is a true multimedia TV with an AV Mode which allows you to choose from 4 different modes of Cinema, Sports and Game by a single click of a remote control.
Clear Voice Clearer dialogue sound Automatically enhances and amplifies the sound of the human voice frequency range to provide high-quality dialogue when background noise swells.
Save Energy, Save MoneyHome electronic products use energy when they're off to power features like clock displays and remote controls. Those that have earned the ENERGY STAR use as much as 60% less energy to perform these functions, while providing the same performance at the same price as less-efficient models. Less energy means you pay less on your energy bill. Draws less than 1 Watt in stand by.
Save Energy, Save MoneyIt reduces the plasma display’s power consumption.The default factory setting complies with the Energy Star requirements and is adjusted to the comfortable level to be viewed at home.(Turns on Intelligent Sensor).
15 November 2009 50PQ30 Plasma
50PQ30 Remote Control50PQ30 Remote Control
TOP PORTIONBOTTOM PORTION
16 November 2009 50PQ30 Plasma
50PQ30 Rear and Side Input Jacks50PQ30 Rear and Side Input Jacks
SoftwareUpgrades
Music and Photos
AC In
USB
SIDEINPUTS
REARINPUTS
HDMI 3
3-5/16"83.82mm
13-7/8"353mm
50PQ30 Dimensions
29-7/8"759.46mm
47-7/8"1216.66mm
Remove 4 screws to remove stand for
wall mount
Model No.Serial No.
Label
15-5/16"405mm
25-5/8"651mm
32-3/16"817.9mm
6-3/16"157mm
7-1/4"183.74mm2-5/16"
58.74mm
15-3/4"400mm
4-15/16"125mm
15-3/4"400mm
15-3/4"400mm
74.3 lbs with Stand68.8 lbs without StandWeight:
There must be at least 4 inches of Clearance on all sides279W (Typical)0.13W (Stand-By)
Power:
7-7/8"200mm
17 Published November 2009 50PQ30 Plasma
18 November 2009 50PQ30 Plasma
This section of the manual will discuss Disassembly, Layout and Circuit Board Identification, of the 50PQ30 Advanced Single Scan Plasma Display Panel.
Upon completion of this section the Technician will have a betterunderstanding of the disassembly procedures, the layout of the printedcircuit boards and be able to identify each board.
DISASSEMBLY SECTIONDISASSEMBLY SECTION
19 November 2009 50PQ30 Plasma
Removing the Back CoverRemoving the Back Cover
To remove the back cover, remove the 26 screws(The Stand does not need to be removed).
Indicated by the arrows.
PAY CLOSE ATTENTION TO THE TYPE, SIZE AND LENGTHOf the screws when replacing the back cover.
Improper type can damage the front.
20 November 2009 50PQ30 Plasma
Circuit Board LayoutCircuit Board Layout
Y-SUS
Z-SUS
Right “X”Left “X”
Main Board
Control
Power Supply(SMPS)
FPC
FPC
Panel ID Label
Panel Voltage LabelY-DriveUpper
KeyboardMain
Power
FPC
Invisible Speakers
FPCFPC
FPCFPC
FPC
TCPHeat Sink
AC In
Conductive Tape Under Main Board
Side Input(part of main)
Center “X”
FPC
Y-DriveLower
IR/LED
Z-SUB
Identify the Circuit BoardsIdentify the Circuit Boards
21 November 2009 50PQ30 Plasma
Switch Mode Power Supply Board Removal
Disconnect the following connectors: P811, P813, SC101.Remove the 8 screws holding the SMPS in place.Remove the board.When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.Also, re-confirm VSC, -Vy and Z-Bias as well.
Y-SUS Board Removal
Y-Drive Boards Removal
Notes: 1) All Plugs listed are from left to right Pin 1,2, 3, ETC.2) Remember to be cautious of ESD as some semiconductors are CMOS and prone to static failure.
Disassembly Procedure for Circuit Board RemovalDisassembly Procedure for Circuit Board Removal
Disconnect the following connectors: P201, P206, P101, P202.Remove the 8 screws holding the Y-SUS in place.Remove the Y-SUS by lifting slightly to clear standoff and slid it to the right.When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.Confirm VSC, -Vy and Z-bias as well.
Disconnect the following Flexible Ribbon Connectors: P101~P103 and/or P201~P203.Disconnect the following connectors: P209 and/or P108.Remove the 3 screws holding either of the Y-Drive boards in place.Remove the Y-Drive by lifting slightly and sliding the board to the left unseating P106, P107, P109 and/or P205, P206 and P208 from the Y-SUS Board.
After replacing the Y-Drive, check the connectors for solder breaks.
After replacing the Y-Drive, check the connectors for solder break.
Board Standoff
Collar
Note: Y, Z-SUS and Y-Drive boards are mounted on board stand-offs that have a small collar. The board must be lifted slightly to clear these collars.
22 November 2009 50PQ30 Plasma
Z-SUS Board Removal
Main Board Removal
Control Board Removal
Disassembly Procedure for Circuit Board Removal (2)Disassembly Procedure for Circuit Board Removal (2)
Disconnect the following connectors: P100, P101.Disconnect the following connectors: P104, P105 and P302. These are the FPC cables. Pull the locking caps to the right. Lift carefully the Flexible Printed Circuits (FPCs) and slide them out to the right.Remove the 5 screws holding the Z-SUS in place and the one holding the Z-SUB in place. Lift the Z-SUS up and remove the board. Remove the Z-SUB by pulling it off the Z-SUS.When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.Confirm VS, -Vy and Z-bias as well.
Disconnect the following connectors: P1001, P1003, P1005 and P1006.Remove the 1screws holding on the decorative plastic piece on the right side.Remove the 4 screws holding the Main board in place and Remove the board.
Disconnect the following connectors: P121 LVDS, P101, P161 Ribbon, P162 Ribbon by lifting up the locking tab. Remove the 4 screws holding the Control board in place Remove the board.
Remove the 2 screws holding the Key board in place. Remove the board by releasing the two black tabs and lifting the board upward. Disconnect P101.(Note: LED board is behind the Key board. Remove it’s 2 screws and remove. Disconnect J1 and J2.
Front Key and LED Board Removal
23 November 2009 50PQ30 Plasma
Lay the Plasma down carefully on a padded surface.Make sure AC is removed and remove the Back Cover and the Stand.Carefully remove the LVDS Cable P121 from the Control Board by pressing the Locking Tabs together and pull the connector straight back to remove the cable. (This prevents possible damage). See illustration below.
(A) Remove the Stand (4 Screws removed during back removal). (B) Remove the Stand Metal Support Bracket (5 Screws). (C) Remove connector P1001 to Front IR board and P1005 to the Speakers.(D) Remove the 4 screws from the Main Board Mounting Bracket. Carefully reposition the Main Board and Mounting
Bracket up and off to the right side. (E) Remove the metal support Braces marked “E”. Note: There is a Left and a Right brace. (3 Screws per/bracket).(F) Remove the 9 screws holding the Heat Sink. (Warning: Never run the set with this heat sink removed).
X-DRIVE LEFT, CENTER AND RIGHT REMOVAL:Disconnect all TCP ribbon cables from the defective X-Drive board. Remove the 3 screws in either the Left or Right X-Drive board or the 4 screws holding the Center X-Drive in place.Remove the board. Reassemble in reverse order. Recheck Va / Vs / VScan / -VY / Z-Drive.
X Drive Circuit Board Removal ContinuedX Drive Circuit Board Removal Continued
Press Inward
Press Inward
LVDS Cable Connector
24 November 2009 50PQ30 Plasma
Getting to the X Circuit BoardsGetting to the X Circuit Boards
A
B
Warning: Never run the TV with the TCP Heat Sink removed
Warning Shorting Hazard: Conductive Tape. Do not allow to touch energized circuits.
B
Stand should have already be removed
D
ELeft
ERight
C
FHeat Sink
ALVDS Cable
25 November 2009 50PQ30 Plasma
Left and Right X Drive RemovalLeft and Right X Drive Removal
There may be tape on the connectors P231 or P232
Peel the tape off the connectors
Remove tape (if present) and Gently pry the locking mechanism upward and remove the ribbon
cable from the connector.
Gently lift the locking mechanismupward on all TCP connectors
Left X: P101~105 Center X: P201~206 Right X: P301~305
Carefully lift the TCP ribbon up and off.It may stick, be careful not to crack TCP.
(See next page for precautions)
After removing the back cover, the Main board is lifted out of the way, the 9 screws removed from heat sink covering the TCPs and connectors to the TCPs are removed, the X-Drive boards can be removed.
Removing Connectors to the TCPs.
Disconnect connector P122
P231 P232
P122
Cushion (Chocolate)
TCP
Flexible ribbon cable connector
Va from the Y-SUS
26 November 2009 50PQ30 Plasma
TCP (Tape TCP (Tape CarrierCarrier Package) Generic Removal PrecautionsPackage) Generic Removal Precautions
TCP Connector Removal
Lift up the lock as shown by arrows.(The Lock can be easily broken.It needs to be handled carefully.)
Pull TCP apart as shown by arrow.(TCP Film can be easily damaged.
Handle with care.)
The TCP has two small tab on each side which have to be lifted up slightly to pull the connector out.Note: TCP is usually stuck downto the heat transfer material, beVery careful when lifting up onthe TCP ribbon cable.
27 November 2009 50PQ30 Plasma
Left and Right X Drive RemovalLeft and Right X Drive RemovalRemove the 3 screws for either left or right board or 4 for the center. 8 total for all three.
(The screws between the boards, secures both boards)
The Left X Board drives the right side of the screen vertical electrodes
The Center X Board drives the Center of the screen vertical electrodes
The Right X Board drives the left side of the screen vertical electrodes
28 November 2009 50PQ30 Plasma
50PQ30 Plasma Display
This Section will cover Circuit Operation, Troubleshooting and Alignment of the Power Supply, Y-SUS Board, Y-Drive Boards, Z-SUS Board, Control Board, Main Board and the X Drive Boards.
At the end of this Section the technician should understand the operation of each circuit board and how to adjust the controls. The technician should be able with confidence to troubleshoot a circuit board failure, replace the defective circuit and perform all necessary adjustments.
CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT ALIGNMENT SECTIONALIGNMENT SECTION
P102
P101
P103
P201
P202
P203
Control KeysPower Button
50PQ30 SIGNAL and VOLTAGE DISTRIBUTION DIAGRAM
Display PanelHorizontal Electrodes
P101
FloatingGround
Y-SUS Board
P209(5VFG) (FG) P201
P208 (FG)
P101
P202
P206
M5V, Vs, Va
P811
SK101
STB +5V (also AC Voltage Det)
SMPSTurn On
Commands
Power SupplyBoard
ACInputFilter
P100
SMPS OUTPUT VOLTAGES IN STBY
Set inStand By:STB +5AC Voltage Det
Drive Signals forY-SUS and Y-Drive
P1006 P1003
P1001P1005
MAIN BoardSpeakers
X-Board-RightX-Board-Left
P101 P102 P103 P104 P105 P201 P301 P302 P304 P305
Va RGB Logic
Signals
Va
CONTROL
P161
LVDS
Y DriveUpper
Z SUS Board
P200
P101
P232 P211 P311 P331
Display Panel Vertical Address (RGB Cell Address)
Horizontal Display Panel
Electrodes
M5V, 17V
Relay OnM5 OnVS On
STB5V, +5V, 17V, 12V to Main PWBVs, Va and M5V to Y-SUS
SMPS OUTPUT VOLTAGES IN RUN
17V
Z Drive Signals
IR, Power LED, Intelligent Sensor
FPCs
FPCs
5V STBY
P103
P208
P106
P209
P107
P106
P109
Drive DataClock (i2c)
X-Board-CenterP212 P211 P331
P231P122
P101P121
P121
P813
M5V, Vs, Error-ComNote:
Va not usedby Y-SUS
P101
P302
P102
P103
P301P111
Note: 17V not usedby Control
17VM5V
LVDS
3.3V
FPCs
FPCs
Y DriveLower
Z Drive Signals
5VFG indicates measured from Floating Ground
5VFG
+5V, 12VM5VAudio 17V, Va, Vs
3.3VKey Board
Pull Up
P206
P204 (FG)
P203 (FG)
Drive DataClock (i2c)
5VFG 5VFGDC/DC
P207(V Scan) (5VFG) (FG)
P208 (FG)
17VDC/DC
VSCDC/DC
-VyDC/DC
3.3VP232
Va
3.3V
P202 P203 P204 P205 P206 P303
RGB Logic
Signals
3.3V
BoardP162
3.3V
(V Scan)
P207
3.3V
29 Published November 2009 50PQ30 Plasma
30 November 2009 50PQ30 Plasma
(1) Panel Model Name(2) Bar Code(3) Manufacture No.(4) Adjusting Voltage DC, Va, Vs(5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb)(6) Trade name of LG Electronics(7) Manufactured date (Year & Month)(8) Warning
Panel Label ExplanationPanel Label Explanation
(9) TUV Approval Mark(10) UL Approval Mark(11) UL Approval No.(12) Panel Model Name(13) Max. Watt (Full White)(14) Max. Volts(15) Max. Amps
(1)(2)(3)(4)(5)(6) (7)
(8)
(9) (10)
(11)(12)
(13)(14)(15)
31 November 2009 50PQ30 Plasma
ADJUSTMENT ORDER “IMPORTANT”DC VOLTAGE ADJUSTMENTS1) POWER SUPPLY: Va Vs (Always do first)2) Y-SUS: Adjust –Vy, Vscan, 3) Z-SUS: Adjust Z-Bias (VZB)WAVEFORM ADJUSTMENTS1) Y-SUS: Set-Up, Set-Down
Adjustment NoticeAdjustment Notice
It is critical that the DC Voltage adjustments be checked when;1) SMPS, Y-SUS or Z-SUS board is replaced.2) Panel is replaced, Check Va/Vs since the SMPS does not come with new panel3) A Picture issue is encountered4) As a general rule of thumb when ever the back is removed
Remember, the Voltage Label MUST be followed, it is specific to the panel’s needs.
All label references are from a specific panel. They are not the same for every panel encountered.
-VY Z_BIAS
Panel“Rear View”
ManufacturerBar Code
Set-Up VeVscanThe Waveform adjustment is only necessary
1) When the Y-SUS board is replaced2) When a “Mal-Discharge” problem is encountered3) When an abnormal picture issues is encountered
All adjustments (DC or Waveform) are adjusted in WHITE WASH.Customer’s Menu, Select “Options”, select “ISM” select “WHITE WASH”.
32 November 2009 50PQ30 Plasma
• DC Voltages developed on the SMPS• Adjustments VA and VS.
• Always refer to the Voltage Sticker located on the back of the panel, in the upper Left Hand side for the correct voltage levels for the VA, VS, -VY, Vscan, and Z Bias as these voltages will vary from Panel to Panel even in the same size category.
• Set-Up and Ve are just for Label location identification and are not adjusted in this panel.
SWITCH MODE POWER SUPPLY SECTIONSWITCH MODE POWER SUPPLY SECTION
This Section of the Presentation will cover troubleshooting the Switch Mode Power Supply for the Single Scan Plasma. Upon completion of the section the technician will have a better understanding of the operation of the Power Supply Circuit and will be able to locate voltage and test points needed for troubleshooting and alignments.
SMPS P/N EAY58316301
Check the silk screen label on the top center of the Power Supply board to identify the correct part number. (It may vary in your specific model number).
On the following pages, we will examine the Operation of this Power Supply.
50PQ30 50G2 (SMPS) POWER SUPPLY BOARD50PQ30 50G2 (SMPS) POWER SUPPLY BOARD
EXAMPLE: Voltage Label. Use the voltage label off your specific panel for adjustments.
10) M5V 9) M5V 8) Gnd 7) VA 6) VA 5) Gnd 4) Gnd 3) N/C 2) VS 1) VS
10
F101
SC101AC In
IC701
P8131
2 24
23
F801
L602
L601
T301
P811
Hot
Gro
und
Hot
Gro
und
Hot
Gro
und
VR502Va
VR901Vs
1T901
C107
C106
L102
F3021A/
250V
1,2) 17V3,4) Gnd5,6) 12V7,8) Gnd9,10,11) +5V12) Stby 5V13,14) Gnd15) n/c16) Gnd17) 5V Det18) AC Det19) RL_On20) VS_On21) M5_On22) Auto Gnd23) Stby 5V24) Key_On
STBY 123VRUN 382V
STBY 160VRUN 382V
F8014A/250V
F10110A/250V
17V turns on with Vs On command
RL1
01
RL1
03
Hot Ground Symbol represents a SHOCK Hazard
33 Published November 2009 50PQ30 Plasma
3
5
7
9
11
13
15
17
19
21
Gnd
12V
Gnd
5V
5V
GndGnd
5V Det
RL ON
M5 ON
2
4
6
8
10
12
14
16
18
20
22
1 17V
P813
23 Stby5V 24
17V
Gnd
12V
Gnd
5V
STBY 5V
GndN/C
AC Det
VS ON
Auto Gnd
Key On
Model : PDP 50G2####Voltage Setting:5V / Va:60V / Vs:193V N.A. / -185 / 133 / N.A. / 80Max Watt : 350 W (Full White)
VS AdjustVR901
VA AdjustVR502
34 November 2009 50PQ30 Plasma
The Switch Mode Power Supply Board Outputs to the :
VAY-SUS Board
Main Board
VS
M5V
Primarily responsible for Display Panel Vertical Electrodes
Drives the Display Panel’s Horizontal Electrodes
Used to develop Bias Voltages on the Y-SUS,X Drive, and Control Boards
17V Audio B+ Supply
12V Tuner B+ Circuits
Adjustments There are 2 adjustments located on the Power Supply Board VA and VS. The 5V VCC is pre-adjusted and fixed. All adjustments are made with relation to Chassis Ground. Use “Full White Raster” 100 IRE
VA
VS
RV502
RV901
Switch Mode Power Supply OverviewSwitch Mode Power Supply Overview
5V Signal Processing Circuits
STBY 5V Microprocessor Circuits
35 November 2009 50PQ30 Plasma
PrimarySource
VS Source
VA Source
STBY 5V5V, 12VSource
IC701Sub Micon
VA VR502
Power Supply Circuit LayoutPower Supply Circuit Layout
PFC
Circ
uit
To MAIN
P813Main Fuse
F101
10Amp/250V
4Amp/250V
P811
To Y-SUS
123V Stby382V RunFuse F801
1Amp/250V
Main BridgeRectifier
160V Stby382V RunFuse F302
17V Source
VS VR901
AC InputSC 101
BridgeRectifier
36 November 2009 50PQ30 Plasma
Power Supply Basic OperationPower Supply Basic OperationAC Voltage is supplied to the SMPS Board at Connector SC101 from the AC Input assembly. Standby 5V is developed from 160V source supply (which during run measures 380V measured from the primary fuse F302). This supply is also used to generate all other voltages on the SMPS.
The STBY5V (standby) is B+ for the Controller (IC701) on the SMPS and output at P813 pins 11 and 23 then sent to the Main board for Microprocessor (IC1) operation. AC Detect is generated on the SMPS, by rectifying a small sample of the A/C Line at D102 and associated circuitry and routed to the Controller (IC701) where it outputs at pin 15 and sent to P813 pin 18 to the Main Board where it is sensed and monitored by the Main Microprocessor (IC1). The AC Det in this set works differently than most. If AC Det is missing the Microprocessor will turn off the television in about 10 seconds after turn on.This will happen each time turn on is attempted.A new feature included on the side keypad is called a Main Power Switch which opens a ground allowing the “Key On” line of P813 Pin 24 to go high, turning off the 5V STB line defeating the Micro Processor (IC1) on the Main Board and Remote Control Operation. When the Microprocessor (IC1) on the Main Board receives an “ON“ Command from either the Power button or the Remote IR Signal, it outputs a high called RL ON at Pin 19 of P813. This command causes the RelaY-Drive Circuit to close both Relays RL102 and RL103 bringing the PFC source up to full power by increasing the 160V standby to 380V run which can be read measuring voltage at Fuse F302 and F801 from “Hot” Ground. At this time the run voltages 12V, and +5V sources become active and are sent to the Main Board via P813 (12V at pins 5 and 6 and 5V at pins 9,10, and 12). The 5V detect line from the SMPS Board to the Main Board can be measured at pin 17 of P813. It is not used.The next step is for the Microprocessor (IC1) on the Main Board to output a high on M5V ON Line to the SMPS at P813 Pin 21 which is sensed by the Controller (IC701) turning on the M5V line and output at P811 pins 9 and 10 to the Y-SUS board P201 pins 9, 10. Then it is routed to the Control and Z-SUS boards. Full Power occurs when the Microprocessor (IC1) on the Main Board brings the VS-ON line high at Pin 20 of P813 of the SMPS Board. VS-ON is routed to the Controller (IC701) which turns on the 17V Audio, VA, and the VS supplies. VA and VS output at P811 to the Y-SUS board. (VA pins 6 and 7 and VS pins 1 and 2). The 17V Audio supply outputs to the Main board at P814 pins 1 and 2 and used for Audio processing and amplification.AUTO GND Pin 22 of P813: This pin is grounded on the Main board. When it is grounded, the Controller IC701 works in the normal mode, meaning it turns on the power supply via commands sent from the Main board. When this pin is floated (opened), it pulls up and turns the Controller IC701 on in the Auto mode. In this state, the Controller turns on the power supply in stages automatically. A load is necessary to perform a good test of the SMPS if the Main board is suspect.
50PQ30 POWER SUPPLY START UP SEQUENCE50PQ30 POWER SUPPLY START UP SEQUENCE
AC In
Stand By 5V
Power On IRRemote Or Key
AC Det.
MAIN Board
Relay On
12V Tuner B+ stepped down to 5V
M5V Reg
Vs Reg
Va Reg
5V/12V Regulators
5V Mnt.
1
23
5
6
8
At point TV is in Stand-By state. It is Energy Star
Compliant.Less than 1 Watt5
5
8
In Stand-By Primary side is 160V/123VIn Run (Relay On) Primary side is 386V
3
3
13
CONTROL
X PWBLeft
13
3.3V RegIC301
2
5V Mnt
Relay On
Y-SUS Z-SUS
17V 17V
5VFG
Va
Y DRIVEUpper
X PWBCenter
X PWBRight
Y DRIVELower
STBY 5V
M5V
M5V
Vs
15
9
11
11
10
8
15
15 15
4
24
Vs
Va
12
13
16 8
15
Standby 5V will not be output if the Main Power Switch is off.
Power ButtonFront IRBoard
POWER SUPPLY(SMPS)
AC Det.If missing,
the set will turn off in 10 seconds.
12V5V
17V Audio
17V
17V Reg
7
VideoProcessing
M5VOn
VsOn
FG5VFloating Gnd 5V
14
StandBy 5V Reg
PWROn
RLOn
6M5-On
Vs/Va-On
OnOff
11
917V M5V 3.3V
3.3V 3.3V
Va Va
12
16
Vs16
Vs1615
16
3.3V
Va
Power On
Microprocessor(BCM) IC1AC-Det
+5V HDMI EDID
Va10
8
12 12
37 Published November 2009 50PQ30 Plasma
38 November 2009 50PQ30 Plasma
Vs TPP811
Pin 1 or 2
Use Full White Raster “White Wash”
Power Supply Va and Vs AdjustmentsPower Supply Va and Vs Adjustments
Va TPP811
Pin 6 or 7
Important: Use the Panel LabelNot this book for all voltage adjustments.
Va Adjust:Place voltmeter on pin 6 or 7 of P811. Adjust VR502 until the reading matches your label.
Example Voltage Label
Vs Adjust:Place voltmeter on pin 1 or 2 of P811. Adjust VR901 until the reading matches your label.
50PQ30 SMPS STATIC TEST UNDER LOAD
1 2
5
or
8or4 or
Using two 100 Watt light bulbs, attach one end to Vs and the other end to ground. Apply AC to SC101. If the light bulbs turn on and VS is the correct voltage, allow the SMPS to run for several minutes to be sure it will operate under load. If this test is successful and all other voltages are generated, you can be fairly assured the power supply is OK. Note: To be 100% sure, you would need to read the current handling capabilities of each power supply listed on the silk screen on the SMPS and place each supply voltage under the appropriate load.
Note: This SMPS will run without a load, however if the Vs is not loaded, the 17V may pulsate up and down. It is always best to test the SMPS under a load using the 2 light bulbs.
Check Pins 11 or 23 for 5V SBY
Check Pin 18 for AC Det (5V)
If AC Det is missing, the TV will come on then shut off within 10 Sec.This will happen each time the TV is turned on.
Provided the Power Button is closed, any time AC is applied to the SMPS, STBY 5V and AC DET should be present.
Pins
Check Pin 9,10,12 for (+5V)
Check Pins 1 or 2 for17V
Check Pins 5 or 6 for12V
P813Check Pins 1 or 2
for Vs voltage
P811
RL1
01
F101
SC101AC In
IC701
P8131
2 24
23
F801
L602
L601
RL1
03
T301
P811
Hot
Gro
und
Hot
Gro
und
Hot
Gro
und
VR502VaVR901
Vs
1T901
C107
C106
L102
F3021A/
250V
1,2) 17V3,4) Gnd5,6) 12V7,8) Gnd9,10,11) +5V12) Stby 5V13,14) Gnd15) n/c16) Gnd17) 5V Det18) AC Det19) RL_On20) VS_On21) M5_On22) Auto Gnd23) Stby 5V24) Key_On
STBY 123VRUN 382V
STBY 160VRUN 382V
F8014A/250V
F10110A/250V
17V turns on with Vs On command
Vs
Gnd
100W100W
Check Pins 6 or 7for Va voltage
You can even pre-align the Vs and Va
voltage to the panel’s label.But you must
recheck when you can get a white
raster.
Check Pins 1~4For M5V
39 Published November 2009 50PQ30 Plasma
40 November 2009 50PQ30 Plasma
(A) Ground the Auto Ground (Pin 22) on P813.
(B) When AC Power is applied, Check AC_Det (Pin 18) and 5V Stand-By (Pins 12 and 23) are 5V.
(C) 100Ω ¼ watt resistor added from STBY 5V (Pins 12 or 23) (Note pins 9~11 are not on yet).to RL_ON (Pin 19) closes relay RL101 and RL103 turning on the 5V and 12V Supplies.
(D) 100Ω ¼ watt resistor added from 5V (Pins 9 ~ 11) to M5 ON (Pin 21) brings the M5V (P811 pins 9, 10) line high.
(E) 100Ω ¼ watt resistor added from STBY 5V (Pins 9 ~ 11) to VS ON (Pin 20) brings the • 17V (P813 pins 1 and 2) lines high.• VA and VS (P811 pins 1 and 2 Vs and Pins 6 and 7 Va) lines high.
P811 disconnected fromthe Y-SUS or the SMPS.
P1006 disconnected fromthe Main board.
Use the holes in the connector P1006 side to
insert the resistor or jumper leads.
WARNING: Remove AC when adding or removing any
plug or resistor.
Power Supply Static Test (Forcing on the SMPS in stages)Power Supply Static Test (Forcing on the SMPS in stages)
41 November 2009 50PQ30 Plasma
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
Connector P813 Identification, Voltages and Diode CheckConnector P813 Identification, Voltages and Diode Check
Open3.24V0VM5 ON21Open5V5VStby 5V23
Open3.73V0VRL On19Open5V.15V5V Det17GndGndGndGnd15GndGndGndGnd131.1V5V5Vb5V111.1V5V5Vb5V9GndGndGndGnd7Open12V0Vb12V5GndGndGndGnd32.2V17.3V0Va17V1
Diode ModeRun STBYLabelPin
OpenGndGndAuto Gnd22Open0V0VcKey On24
Open3.2V0VVS On20Open5V5VAC Det18
Not UsedGndGndGnd16GndGndGndGnd14
1.13V5V5VStby 5V121.1V5V5Vb5V10GndGndGndGnd8Open12V0Vb12V6GndGndGndGnd42.2V17.3V0Va17V2
Diode ModeRun STBYLabelPin
P813 CONNECTOR “SMPS" to “Main" P1006
cNote: If the Key On line is 4.39V, the Main Power Switch is open.Stand-By 5V will shut off.
aNote: The 17V turns on when the VS On command arrives.
bNote: The 5V/12V turns on when theRL On command arrives.
42 November 2009 50PQ30 Plasma
Connector SC101 and P811 Identification, Voltages and Diode ChecConnector SC101 and P811 Identification, Voltages and Diode Checkk
* Note: This voltage will vary in accordance with Panel Label
0.86V5V0VM5V9, 10
Gnd0V0VGnd8
Open*60V0VVa6, 7
Gnd0V0VGnd4, 5
n/cn/cn/cn/c3
Open*194V0VVs1, 2
Diode ModeRun STBYLabelPin
SC101 AC INPUT
Standby Run Diode ModeConnector Pin Number
SC101 120VAC 120VAC Open1 and 3
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
P811 CONNECTOR "Power Supply“ to Y-SUS “P201”
43 November 2009 50PQ30 Plasma
Y-SUS Board develops the V-Scan drive signal to the Y-Drive boards.
This Section of the Presentation will cover troubleshooting the Y-SUS Board for the SingleScan Plasma. Upon completion of the Section the technician will have a betterunderstanding of the operation of the circuit and will be able to locate voltage andDiode mode test points needed for troubleshooting and alignments.
OperatingOperating VoltagesVoltages
SMPS Supplied VA VS M5V
Y-SUS Developed -VY VR502VSC VR501 V SET UP VR601V SET DN VR60215V
Floating Ground FG 5VFG 15V
VA supplies the Panel Vertical Electrodes (Routed to the Left X-Board) VS Supplies the Panel Horizontal Electrodes (Also routed to the Z-SUS board)5V Supplies Bias to Y-SUS (Then Routed to the Control board and Z-SUS board)
-VY Sets the Negative excursion of the Y-SUS Drive WaveformVSC Set the amplitude of the complex waveform.SET UP sets amplitude of the Top Ramp of the Drive Waveform SET DOWN sets the Pitch of the Bottom Ramp of the Drive WaveformTo the Control Board then routed to the Z-SUS board
Used on the Y-Drive boards (Measured from Floating Gnd)Used in the Development of the V-Scan signal (Measured from Floating Gnd)
YY--SUS BOARD SECTIONSUS BOARD SECTION
• Adjustments• DC Voltage and Waveform Checks• Diode Mode Measurements
(Overview)(Overview)
44 November 2009 50PQ30 Plasma
Simplified Block Diagram of Y-Sustain Board
YY--SUS Block DiagramSUS Block Diagram
Generates Vsc and -Vyfrom M5V by DC/DC Converters
Also controls Set Up/Down
Circuits generate Y-Sustain Waveform
Distributes 15V and 5V
Logic signals needed to generate drive waveform
Distributes VA Receive M5V, Va, Vsfrom SMPS
Y-Drive BoardsReceive Scan Waveform Display Panel
Power Supply Board - SMPS
FETs amplify Y-Sustain Waveform
Left X Board
Z-SUS Board
Distributes 15V
Generates Floating Ground5V by DC/DC Converters
Logic signals needed to scan the panel
Control Board
Distributes Vs and M5V
Distributes Vs, Va and M5V
45 November 2009 50PQ30 Plasma
P204 VS, VA and M5V Input from the SMPS
P209, P204 and P203Plugs into Y-Drive upperP205, P208 and P207
Plugs into Y-Drive lower
YY--SUS Board LayoutSUS Board Layout
P101Logic Signals from the Control Board
P202Va to Left X Board
Pins 5~7
P203
P205
P207
VSC ADJ VR501
FS202 (Vs)4A 250V
SET UPVR 601
V SET DN VR 401
M5V and 17V
FS201 (M5V)10A/125V
P204, P203, P205 and P208 All Pins are Floating Ground
Floating Gnd 5VPins 8 and 9
P207 Pins 11 and 12Y-Drive signal (V Scan)
Pins 2 ~5 Logic (Drive) Signals to the Y-Drive
Lower board P202
Ribbon
P206VS to and Error Com from Z-SUS
P201
P209
VSC TPR202
FS201 (Va)10A/125V
-VY ADJ VR502
FS501 (17V)4A/125V
-VY TPR201
P208
Floating Gnd 5VPins 4 and 5
Pins 8 ~12 Logic (Drive) Signals to the Y-Drive
Upper board
46 November 2009 50PQ30 Plasma
VSC and VSC and --VY AdjustmentsVY AdjustmentsThese are DC level Voltage Adjustments
-Vy TP R201
Voltage Reads Positive
VR501
VR502
Set should run for 15 minutes, this is the “Heat Run” mode.Set screen to “White Wash”.Adjust –Vy to Panel Label voltage (+/- 1V)Adjust VSC to Panel Label voltage (+/- 1V)
Lower Center of board Just below Heat Sinks
+-
VSC TPR202
-
+
47 November 2009 50PQ30 Plasma
Y-Drive Upper Test Point (Bottom of Board)
Overall signal observed 4mS/div
Highlighted signal from waveform above observed 400uS/div
Highlighted signal from waveforms above observed
100uS/div
516V p/p
NOTE: The Waveform Test Points are fragile. If by accident the land is torn and the run lifted, make sure there are no lines left to right in the screen picture.
100uS
VR108
VR209
80VRms
There are several other test points on either the Upper or Lower Y-Drive boards that can be used.Basically any output pin on any of the FPC to the panel are OK to use.
Y-Drive Lower Test Point (Top of Board)
48 November 2009 50PQ30 Plasma
Observing (Capturing) the YObserving (Capturing) the Y--Drive Signal for Set Up AdjustmentDrive Signal for Set Up Adjustment
Fig 1:As an example of how to lock in to the Y-Drive Waveform. Fig 1 shows the signal locked in at 4ms per/div. Note the 2 blanking sections.The signal for SET-UP is outlined within the Waveform
Fig 3:At 400us per/div. the signal for SET-UP is now easier to recognize. It is outlined within the Waveform.Remember, this is the first large signal to the right of blanking.
Fig 4:At 40uSec per/division, the adjustment for SET-UPcan be made. It will make this adjustment easier if you usethe “Expanded” mode of your scope.
Fig 2:At 2mSec per/division, the waveform to use forSET-UP Is now becoming clear. Now, the two blanking signal are still present.
FIG14mS
FIG22mS
FIG3400uS
Area tobe adjusted
Area tobe adjusted
Area tobe adjusted
Outlined Area
Blanking Blanking
Blanking
FIG440uS
Set must be in “WHITE WASH”All other DC Voltage adjustments should have already been made.
Blanking
49 November 2009 50PQ30 Plasma
Observing (Capturing) the YObserving (Capturing) the Y--Drive Signal for Set Up AdjustmentDrive Signal for Set Up Adjustment
Fig 1:As an example of how to lock in to the Y-Drive Waveform. Fig 1 shows the signal locked in at 4ms per/div. Note the 2 blanking sections.The signal for SET-DN is outlined within the Waveform
Fig 3:At 400us per/div. the signal for SET-DN is now easier to recognize. It is outlined within the Waveform.Remember, this is the first large signal to the right of blanking.
Fig 4:At 20uSec per/division, the adjustment for SET-DN can be made. It will make this adjustment easier if you use the “Expanded” mode of your scope.
Fig 2:At 2mSec per/division, the waveform to use forSET-DN is now becoming clear.Now the two blanking signals are still present.
FIG14mS
FIG22mS
FIG3400uSArea to
be adjusted
Area tobe adjusted
Outlined Area
Blanking Blanking
Blanking
FIG420uS
Set must be in “WHITE WASH”All other DC Voltage adjustments should have already been made.
Blanking
Area tobe adjusted
50 November 2009 50PQ30 Plasma
Observe the Picture while making these adjustments. Normally, they do not have to be done.
Set Up and Set Down AdjustmentsSet Up and Set Down Adjustments
Y-Drive Test Point
ADJUSTMENT LOCATIONS: Top Left and Center Right
SET-UP ADJUST:1) Adjust VR601 and set the (A) portion of the
signal to match the waveform above. (150V ± 5V)
SET-DN ADJUST:2) Adjust VR401 and set the (B) time of the
signal to match the waveform above. (100uSec 5uSec)
Set must be in “WHITE WASH”All other DC Voltage adjustments should have already been made.
51 November 2009 50PQ30 Plasma
Very little alteration to the picture, the wave form indicates adistorted SET UP. The peek widens due to the SET UPpeeking too quickly.
The center begins to wash out and arc due to SET UP
Panel Waveform Adjustment
Ramp (SET UP) Too High (200V)Full Counter Clock Wise
Set Up Adjustment Too High or LowSet Up Adjustment Too High or Low
Ramp (SET UP) Too Low (80V)Full Clock Wise
Set Up swing is Minimum 80V Max 200V
52 November 2009 50PQ30 Plasma
All of the center washes out due to increased SET_DN time.
The center begins to wash out and arc due to decreased SET DN time.
Panel Waveform AdjustmentSet Down Adjustment Too High or LowSet Down Adjustment Too High or Low
Set Dn swing is Minimum 73uS Max 166uS+
NOTE: If Set DN too high, this set may go excessive bright,
then shutdown.If this happens, remove the LVDS
from Control board and make necessary adjustments. Then
reconnect LVDS select White Wash and adjust correctly.
(SET DN) Too High 166uSecFull Clock Wise
(SET DN) Too LowCounter Clock Wise
100V off the Floor
Floor
53 November 2009 50PQ30 Plasma
YY--SUS How to Check the Output FETs (1 of 2)SUS How to Check the Output FETs (1 of 2)
Name is printed on the components. Readings “In Circuit”.
Shown: 2.02V
Reverse: Open
Shown: 0.6V
Reverse: 1.64V
Shown: 0.38V
Reverse: Open
45F122Q34
Shown: 0.483V
Reverse: Open
Shown: 0.69V
Reverse: 0.67V
Shown: 1.09V
Reverse: Open
RJP4584Q32
Shown: 0.5V
Reverse: Open
Shown: 0.59V~0.6V
Reverse: Open*Reversed: 2.18V
Shown: Open*Shown: 2.2V
Reverse: Open
K3667*Q18Q31
RF2001D31D32D33D34D36D717
Shown: Shorted
Reverse: Shorted
Shown: 0.37V~0.38V
Reverse: Open0.3 Ohms
Shown: 0.37~0.38V
Reverse: Open
Blk RedBlk Red BlkRed
Blk RedBlk Red
Blk RedBlk Red
BlkRed
BlkRed
BlkRedBlk RedBlk Red
54 November 2009 50PQ30 Plasma
YY--SUS How to Check the Output FETs (2 of 2)SUS How to Check the Output FETs (2 of 2)
Name is printed on the components. Readings “In Circuit”.
Shown: 1.95V
Reverse: Open
Shown: 0.876V
Reverse: 1.56V
Shown: 0.46V
Reverse: Open
Shown: 0.392V
Reverse: Open
Shown: 0.392V
Reverse: Open
Shown: 0.668V
Reverse: 0.6V
Shown: Shorted
Reverse: Shorted(0.3 Ohm)
Shown: 0.998V
Reverse: Open
Shown: 0.392V
Reverse: Open
I4F14229Q16Q17
RF020D11
30J124Q11Q12Q13
Blk RedBlk Red BlkRed
Blk RedBlk Red BlkRed
Blk RedBlk Red BlkRed
55 November 2009 50PQ30 Plasma
YY--SUS Board P207 (Bottom Connector) ExplainedSUS Board P207 (Bottom Connector) Explained
P207
FG5V measured from Pins 7 or 8
Floating GndPins 1 or 6
P207 Pins 2, 3, 4, and 5 are Logic (Drive) Signals to the
Y-Drive lower.P209 carries the Y-Drive signals
to the upper via P108.
Y-Drive Lower Board
Y-SUS Board
Bottom Connector P207
P205
11) V Scan10) V Scan9) n/c8) 5V VF7) 5V VF6) Ground (F)5) STB4) OC13) DATA2) OC21) Ground (F)
FL201
TIP: Use P207 pins 1 or 2 or the Right Side of C213 to test for Y Scan signal if the Y-Drive boards are removed
C213
P207 Pins 1 and 2Y Scan signal
400V p/p (No Y-Drives)
440V p/p (With Y-Drives)
56 November 2009 50PQ30 Plasma
YY--SUS P207 (Drive Output Plug) Diode Mode TestingSUS P207 (Drive Output Plug) Diode Mode Testing
Checking the YChecking the Y--SUS Board P207SUS Board P207NOTE: Disconnected from the YNOTE: Disconnected from the Y--DRIVE boardsDRIVE boards
Readings from Floating Ground (Pin 1)
RED LEADBlk Lead FG
BLACK LEADRed Lead FG
12) V Scan11) V Scan10) n/c9) 5V VF8) 5V VF7) Ground (F)6) CLK5) STB4) OC13) DATA2) OC21) Ground (F)
OpenOpenOpen1.9V1.9V0V1.43V1.43V1.43V1.53V1.53V0V
OpenOpenOpen0.557V0.557V0V0.66V0.66V0.68V0.66V0.68V0V
Floating Gnd
Floating Gnd
Y-Drive SigY-Drive Sig
Meter in the Diode Mode
P207
C213
Y-Drive Board should be disconnected for this test.
P205 of the Y-Drive
Lower BoardP207 of the
Y-SUS Board
57 November 2009 50PQ30 Plasma
YY--SUS Board P209 (Top Connector) ExplainedSUS Board P209 (Top Connector) Explained
P209
FG5V (+5V F) measured from Pins 4 or 5 to
Floating GndPins 1~3, 6 or 11
P209 Pins 7, 8, 9, and 10 are Logic Signals from the Control board routed through the
Y-SUS to the Y-Drive upper.
Between the Y-Drive upper and lower is P209, P108 which carries the Y-Drive (Scan)
signals from the lower to the upper.
Y-Drive Upper Board Y-SUS Board
Top Connector P209
P10911) Ground (F)10) DATA9) OC18) STB7) CLK6) Ground (F)5) 5V VF4) 5V Vf3) Ground (F)2) Ground (F) 1) Ground (F)FL101
58 November 2009 50PQ30 Plasma
YY--SUS P209 Diode Mode TestingSUS P209 Diode Mode Testing
Checking the YChecking the Y--SUS Board P209SUS Board P209NOTE: Disconnected from the YNOTE: Disconnected from the Y--DRIVE boardsDRIVE boards
Readings from Floating Ground (Pin 1~3)
RED LEADBlk Lead FG
BLACK LEADRed Lead FG
12) Ground (F)11) DATA10) OC19) STB8) CLK7) STB6) Ground (F)5) 5V VF4) 5V VF3) Ground (F)2) Ground (F) 1) Ground (F)
01.53V1.43V1.53V1.43V1.43V0V1.94V1.94V0V0V0V
0V0.68V0.66V0.68V0.66V0.66V0V0.68V0.68V0V0V0V
Floating GndFloating GndFloating Gnd
Meter in the Diode Mode
P209
P109 of the Y-Drive
Upper BoardP209 of the
Y-SUS Board
Floating Gnd
Floating Gnd
Y-Drive Board should be disconnected for this test.
59 November 2009 50PQ30 Plasma
Voltage and Diode Mode Measurement
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
YY––SUS P201 to SMPS P812 Plug InformationSUS P201 to SMPS P812 Plug Information
* Note: This voltage will vary in accordance with Panel Label
0.86V5V0VM5V10
0.86V5V0VM5V9
GndGndGndGnd8
Open*60V0VVa7
Open*60V0VVa6
GndGndGndGnd5
GndGndGndGnd4
NCNCNCNC3
Open*193V0VVs2
Open*193V0VVs1
Diode ModeRun STBYLabelPin
P201 CONNECTOR "Y-SUS" to "Power Supply" P811
60 November 2009 50PQ30 Plasma
Voltage and Diode Mode Measurements for the Y-SUS Board
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
YY--SUS P202 to X Drive P122 Plug InformationSUS P202 to X Drive P122 Plug Information
* Note: This voltage will vary in accordance with Panel LabelOpen*60V0VVA7Open*60V0VVA6Open*60V0VVA5
ncncncnc4GndGndGndGnd3GndGndGndGnd2GndGndGndGnd1
Diode ModeRun STBYLabelPinP202 CONNECTOR "Y-SUS" to "X-Drive” Left P122
61 November 2009 50PQ30 Plasma
Voltage and Diode Mode Measurements for the Y-SUS Board
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
YY--SUS P206 to Z Drive P101 Plug InformationSUS P206 to Z Drive P101 Plug Information
* Note: This voltage will vary in accordance with Panel Label
Open*193V0VVS11, 12
ncncncnc10
Gnd*89V0VEr Com8, 9
ncncncnc7
GndGndGndGnd3~6
0.86V5V0VM5V1, 2
Diode ModeRun STBYLabelPin
P206 Connector Y-SUS to Z Drive P101 Plug Information
62 November 2009 50PQ30 Plasma
Voltage Measurements for the Y-SUS Board
P101 YP101 Y--SUS 15V and 5V to Control board P111 InformationSUS 15V and 5V to Control board P111 Information
Y-SUS Board B+ checks for the P101 connector.
FS2015V to run the Control Board.
Leaves the Control Board on P101 pins 4~7.
Can also be checked at J843 M5V TP.
FS501 and 15V Test Point15V to run the Z-SUS Board.
Routed out P101 to the Control Board.
Leaves the Control Board on P101 pins 11 and 12.
Can also be checked at J642 15V TP.
Run: 5VStandby: 0V
Diode Check: 0.86V
Run: 15VStandby: 0V
Diode Check: OpenLocation: Bottom Center Right
Location: Just below P201 Location
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Voltage Measurements for the Y-SUS Board
YY--SUS Floating Ground (15V) and (5V) ChecksSUS Floating Ground (15V) and (5V) Checks
Floating Ground checks must be made from Floating Ground. Use any pin on P204, P203, P205 or P208.
FG5V Test PointFloating Ground referenced 5V. Used for low
voltage signal processing on the Y-Drive board. Leaves the Y-SUS board on P207 pins 8
and 9. AND P209 pins 5 and 5.Checked at J795 (+5V (F) Test Point.
FG15V Test PointFG15V to develop the Y-Drive signal.
Checked at J644 (+15V (F) Test Point.
Run: 5VStandby: 0V Diode Check: 1.94V
Run: 15.2VStandby: 0V Diode Check: 1.5V
Location: Bottom Center of the two large black heat sinks.
Location: Bottom Left
Floating Ground J643
Location
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Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
YY--SUS P101 to Control P111 Plug Information (Tip)SUS P101 to Control P111 Plug Information (Tip)
“Y-SUS" P101 CONNECTOR to “Control board" P111(30 Pin Connector)
With Ribbon Cable Without Ribbon Cable
Only Odd pins are easily
accessible with Ribbon Cable
inserted
TIP: For Voltage readings,
Check Odd pins on Y-SUS board
Check Even pins on Control board
P101Connector Label
Pin 1
Pin 29
See next pageFor Voltage readings
65 November 2009 50PQ30 Plasma
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
YY--SUS P101 to Control P111 Plug Voltage ChecksSUS P101 to Control P111 Plug Voltage Checks
“Y-SUS" P101 CONNECTOR to “Control" P111
0.9V0.11VYSUS UP29
0.9V0.14VER UP27
0.9V2.6VSUS DN25
0.9V0.114VER DN23
0.9V0.17VSlope Rate Sel21
0.9V1.29VDet Level Sel19
0.9V0.5VSet On17
0.9V1.99VDelta VY Det15
GndGndGnd13
1.78V0VGnd (Y Enable)11
1.30.1VCTRL_OE9
2V5V5V7
2V5V5V5
1.37V17.04V15V3
1.37V17.04V15V1
Diode ModeRun LabelPin
GndGndGnd30
0.9V1.1VBlocking28
0.9V3.12VRamp Slope OPT 126
0.9V024VSET UP24
0.9V0.6VCLK22
0.9V1.45VSTB20
0.9V1.44VOC118
0.9V0VData16
0.9V1.82VOC214
GndGndGnd12
GndGndOE10
GndGndGnd8
2V4.95V5V6
2V4.95V5V4
1.37V17.04V15V2
Diode ModeRun LabelPin
There are No Stand By Voltages on this Connector
TIP: For Voltage readings,Check Odd pins on Y-SUS board
Check Even pins on Control board
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Y-Drive Boards work as a path supplying the Sustain and Reset waveforms which are made in the Y-Sustain board and sent to the Panel through Scan Driver IC’s.
The Y-Drive Boards supply a waveform which selects the horizontal electrodes sequentially starting at the top and scanning down the panel.
* 50PQ30 uses 8 Driver ICs on 2 Y-Drive Boards
Warning: To facilitate scope attachment, solder a small wire (Stand Off) at this point.Be very careful, these are fragile and can peal off with excessive heat or stress.
Y-Drive WAVEFORM TEST POINTS
Y-Drive (V Scan) WAVEFORM
(Y(Y--Drive Explained)Drive Explained)YY--DRIVE BOARD SECTIONDRIVE BOARD SECTION
TIP:See additional Service Tips beginning on page 131.
67 November 2009 50PQ30 Plasma
FG5V Volts from the Y-SUS board and Logic Signals from the Control through the Y-SUS board are supplied to the Upper Y-Drive Board on Connector P109.
Upper YUpper Y--Drive LayoutDrive Layout
Y-SUS SIDE
PANEL SIDE
Y-Drive signal (VSC) from the Y-SUS board through the Y-Drive lower is supplied to the Upper Y-Drive Board on Connector P108.
TIP:The connectors to the Y-SUS board are very easy to misalign and plugged in.The Connector will be below the actual pins on the Y-SUS.Look carefully.See Tip section page 133-134.
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Upper YUpper Y--Drive P109 (Top Connector) ExplainedDrive P109 (Top Connector) Explained
FG5V (+5V F) measured from Pins 4 or 5 to
Floating GndPins 1~3, 6 or 11
P109 Pins 7, 8, 9, and 10 are Logic Signals from the Control board routed through the
Y-SUS to the Y-Drive upper.Between the Y-Drive upper and lower is
P108/P209 which carries the Y-Drive (Scan) signal from the lower to the upper.
P209
Y-Drive Upper Board
Y-SUSBoard
Top Connector P109
P109FL101
11) Ground (F)10) DATA9) OC18) STB7) CLK6) Ground (F)5) 5V VF4) 5V VF3) Ground (F)2) Ground (F) 1) Ground (F)
69 November 2009 50PQ30 Plasma
Upper YUpper Y--Drive Upper P109 Diode Mode TestingDrive Upper P109 Diode Mode Testing
P209
Y-Drive Upper Board
Y-SUSBoard
P109
FL101
Checking the Upper YChecking the Upper Y--Drive BOARD P109Drive BOARD P109NOTE: Disconnected from the YNOTE: Disconnected from the Y--SUS BoardSUS Board
All Readings from Floating Ground (Pin 1~3, 6 or 12)
RED LEADBlk Lead FG
BLACK LEADRed Lead FG
12) Ground (F)11) OC210) DATA9) OC18) STB7) CLK6) Ground (F)5) 5V VF4) 5V VF3) Ground (F)2) Ground (F) 1) Ground (F)
0VOpenOpenOpenOpenOpen0V1.94V1.94V0V0V0V
0V0.52V0.67V0.54V0.54V0.54V0V0.43V0.43V0V0V0V
Floating GndFloating GndFloating Gnd
Floating Gnd
Meter in the Diode Mode
Floating Gnd
TIP: This test will check “All”scan buffers Low Voltage input
side on the Y-Drive Upper board.
Y-SUS Board should be disconnected for this test.
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FG5V Volts from the Y-SUS board and Logic Signals from the Control through the Y-SUS board are supplied to the Lower Y-Drive Board on connector P205.
YY--Drive Lower LayoutDrive Lower Layout
Y-SUS SIDE
PANEL SIDE
Y-Drive signal (VSC) from the Y-SUS board is supplied to the Lower Y-Drive Board on connector P205 pins 11 and 12. Then the Lower Y-Drive delivers the V-Scan signal to the upper via P209 to P108.
TIP:The connectors to the Y-SUS board are very easy to misalign and plugged in.The Connector will be below the actual pins on the Y-SUS.Look carefully.See Tip section page 133-134.
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YY--Drive Lower P205 (Bottom Connector) ExplainedDrive Lower P205 (Bottom Connector) Explained
P207
FG5V measured from Pins 7 or 8
Floating GndPins 1 or 6
P207 Pins 1 and 2Y Scan signal
516V p/p
P207 Pins 2, 3, 4, and 5 are Logic (Drive) Signals to the
Y-Drive lower P209 carries the Y-Drive signals to the Upper
Y-Drive boardY-Drive Board Y-SUS Board
Bottom Connector P205
P205
11) V Scan10) V Scan9) n/c8) 5V VF7) 5V VF6) Ground (F)5) STB4) OC13) DATA2) OC21) Ground (F)
FL201
TIP: Use P207 pins 1 or 2 or the Right Side of C213 to test for Y Scan signal if the Y-Drive boards are removed
C213
Reset
Sustain
Blanking
72 November 2009 50PQ30 Plasma
Lower YLower Y--Drive P205 Diode Mode TestingDrive P205 Diode Mode Testing
P205 of theY-DRIVE Lower
P207 of theY-SUS Board
P207P205
FL201
C213
Checking the Lower YChecking the Lower Y--Drive Board P205Drive Board P205NOTE: Disconnected from the YNOTE: Disconnected from the Y--SUS boardSUS board
All Readings from Floating Ground (Pin 1 or 7)
RED LEADBlk Lead FG
BLACK LEADRed Lead FG
12) V Scan11) V Scan10) n/c9) 5V VF8) 5V VF7) Ground (F)6) CLK5) STB4) OC13) DATA2) OC21) Ground (F)
OpenOpenOpenOpenOpen0VOpenOpenOpenOpenOpenOpen
1.0V1.0VOpen0.425V0.425V0V0.538V0.538V0.538VOpen0.521V0VFloating Gnd
Floating Gnd
Y-Drive SigY-Drive Sig
Meter in the Diode Mode
TIP: This test will check “All”scan buffers Low Voltage input side on the Y-Drive lower board.
Y-SUS Board should be disconnected for this test.
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YY--Drive P108 and P209 Voltage and Diode Mode CheckDrive P108 and P209 Voltage and Diode Mode Check
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
1.2V
1.2V
1.2V
0V
0V
Diode ModeBlack Lead
Open*134VY Scan5
Open*134VY Scan4
Open*134VY Scan3
0V0VFGnd2
0V0VFGnd1
Diode ModeRed LeadRun LabelPin
P108 CONNECTOR “Y-Drive Upper to Lower”
P108
P209
1.0V
1.0V
1.0V
0V
0V
Diode ModeBlack Lead
Open*134VY Scan5
Open*134VY Scan4
Open*134VY Scan3
0V0VFGnd2
0V0VFGnd1
Diode ModeRed LeadRun LabelPin
P209 CONNECTOR “Y-Drive Lower to Upper”
Y-Drive Upper
Y-Drive Lower
TIP: This test will check “All” scan buffers Input side on the board.
Voltage and Diode Mode Measurements (Taken from Floating Ground)
Note: This voltage will vary in accordance with Panel Label
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To remove the Ribbon Cable from the connector first carefully lift the Locking Tab fromthe back and tilt it forward ( lift from under the tab as shown in Fig 1).
The locking tab must be standing straight up as shown in Fig 2.Lift up the entire Ribbon Cable gently to release the Tabs on each end. (See Fig 3)Gently slide the Ribbon Cable free from the connector.
To reinstall the Ribbon Cable, carefully slide it back into the slot see ( Fig 3 ), be sure the Tab is seated securely and press the Locking Tab back to the locked position see ( Fig 2 then Fig 1).
Removing (Panel) Flexible Ribbon Cables from YRemoving (Panel) Flexible Ribbon Cables from Y--Drive Upper or LowerDrive Upper or Lower
Flexible Ribbon Cables shown are from a different model, but proFlexible Ribbon Cables shown are from a different model, but process is the same.cess is the same.
Fig 1 Fig 3Fig 2
Gently PryUp Here
Locking tab in upright position
Be sure ribbon tab is releasedBy lifting the ribbon up slightly,
before removing ribbon.
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The Ribbon Cable is clearly improperly seated into the connector. You can tell by observing the line of the connector compared to the FPC, they should be parallel.
The Locking Tab will offer a greater resistance to closing in the case.
Note the cable is crooked. In this case the Tab on the Ribbon cable was improperly seated at the top. This can cause bars, lines, intermittent lines abnormalities in the picture.
Remove the ribbon cable and re-seat it correctly.
Incorrectly Seated YIncorrectly Seated Y--Drive Flexible Ribbon CablesDrive Flexible Ribbon Cables
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Using the “Diode Test” on the DVM, check the pins for shorts or abnormal loads.
YY--Drive Buffer TroubleshootingDrive Buffer Troubleshooting
RED LEAD ON BUFFER IC FGnd
BLACK LEAD ON “ANY”OUTPUT LUG.
READING 0.798 V
BLACK LEAD ON BUFFER IC FGnd
RED LEAD ON “ANY”OUTPUT LUG.
READING “OPEN”
YOU CAN CHECK ALL 8 BUFFER ICs USING THIS PROCEDUREYOU CAN CHECK ALL 8 BUFFER ICs USING THIS PROCEDURE
• Any of these output lugs can be tested.
• Look for shorts indicating a defective Buffer IC
Indicated by white outline
Indicated by white outline
128 Output Pins per/FPC (Flexible Printed Circuit)
6 Ribbon cables (Horizontal Electrodes)
768 Total Horizontal Electrodes controlling Vertical resolution
BUFFER IC FLOATING GROUND (FGnd)
BACK SIDE OF Y-DRIVE BOARD
128 Output
Pins
42 43 43
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• DC Voltage and Waveform Test Points• Z BIAS Alignment• Diode Mode Test Points
Operating Voltages Operating Voltages Power Supply Supplied VSM5V
Control Board SuppliedBut developed on the Y-SUS 17V
Developed on Z-SUS Z Bias
This Section of the Presentation will cover troubleshooting the This Section of the Presentation will cover troubleshooting the ZZ--SUS Board Assembly. SUS Board Assembly. Upon completion of this section the Technician will have a betteUpon completion of this section the Technician will have a better understanding of the circuit and be r understanding of the circuit and be able to locate voltage and diode mode test points needed for troable to locate voltage and diode mode test points needed for troubleshooting and all alignments.ubleshooting and all alignments.
ZZ--SUS SECTIONSUS SECTION
Locations Locations
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Simplified Block Diagram of Z-SUStain Board
ZZ--SUS Block DiagramSUS Block Diagram
Circuits generate erase,sustain waveforms
Generates Z Bias 100V
Receives Logic
Signals
M5V and VS
PDP
Display
Panel
Via 3 FPC
Flexible PrintedCircuits
Control Board Y-SUS Board
NO IPMs
POWER SUPPLY Board
5V, 17V
17V Z-SUS board receives VS and M5V from Y-SUS and 17V from
the Control board
M5V and VS
Z-SUB
FET Makes Drive waveform
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P101ZZ--SUS SECTIONSUS SECTION
P104FPC
P100
Z-SUSOutput
ICs
No IPMs
Z-SUSWaveform
DevelopmentICs
P105FPC
P103
P101VS and M5VInput from the Y-SUS
Logic Signals fromthe Control board
Also +15V generatedon the Y-SUS and routed
through the Control board.
Z-SUSWaveformTest Point
J27
To Z-SUB
No IPMs
FS100M5V
10A/125V
FS102VS
4A/250V
Z-BiasVR200
Z-Bias TP Top of R271 or R272
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The Z-SUS (in combination with the Y-SUS) generates a SUSTAIN Signal and an ERASE PULSE for generating SUSTAIN and DISCHARGE in the Panel.
This waveform is supplied to the panel through FPC (Flexible Printed Circuit) P104, P105 and also P103 to the Z-SUB which connects to the panel via P302.
Oscilloscope Connection Point.
J27 to check Z Output waveform.
Right Hand side Center.
ZZ--SUS WaveformSUS Waveform
This Waveform is just for reference to observe the effects of Zbz adjustment
Vzb voltage+- 1V80 V
Z DriveWaveform
(Vzb) Z Bias VR200
400uS/div50V/div
TIP: The Z-Bias (VZB) Adjustment is aDC level adjustment.
This is only to show the effectsof Z-Bias on the waveform.
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VZBVZB (Z(Z--Bias) AdjustmentBias) Adjustment
VZB (Z-Bias) TP Top Side R271 or R272
Read the Label on the back of the upper left handside of the panel when adjusting VR200.
Set should run for 15 minutes, this is the “Heat Run” mode.Set screen to “White Wash” mode or 100 IRE White input.
Adjust VZ (Z-Bias) to Panel Label (± 1V)
Top of Z-SUS Board
Measured from Chassis Ground
Chassis Ground or the Top of C239
or J125
Note: You can also measure across C239
for the VZB (Zbias) adjustment.
Z Bias
VZB (Z Bias)VR200
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Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
Connector P101 to YConnector P101 to Y--SUS P206 Voltages and Diode ChecksSUS P206 Voltages and Diode ChecksVoltage and Diode Mode Measurements
Open*193VVS11, 12
Openn/cn/c10
Open*94.9VER COM8, 9
n/cn/cn/c7
GndGndGnd3~6Open5VM5V1, 2
Diode ModeRun LabelPin
* Note: This voltage will vary in accordance with Panel Label
P101 CONNECTOR “Z-SUS" to “Y-SUS" P206
Pin 1
Location: Top Left
There are no Stand-By voltages on this connector
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Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
Connector P100 to Control P101 Voltages and Diode ChecksConnector P100 to Control P101 Voltages and Diode ChecksVoltage and Diode Mode Measurements
Open0.2VZ-SUS UP8
Open0.8VZ-SUS DN9
GndGndGnd10
Open17V+15V11
Open17V+15V12
Open0.4VZ ER DN7
Open0.3VZ ER UP6
GndGndGnd5
Open1.7VZ Ramp4
Open1.8VZ Bias3
Open0.05VZ Enable2
GndGndGnd1
Diode ModeRun LabelPin
Location: Bottom Left hand side
Pin 1
P100 CONNECTOR “Z-SUS" to “Control" P101
There are no Stand-By voltages on this connector
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ZZ--SUS How to Check the Output FETs 1 of 2SUS How to Check the Output FETs 1 of 2
Name is printed on the components. Readings “In Circuit”.
Shown: 0.52V
Reverse: Open
Shown: Short
Reverse: Short20NF20Q311
Shown: 0.52V
Reverse: Open
Shown: 0.678V
Reverse: Open33N25TQ312
D305D306D311D312
Shown: Short
Reverse: Short
Shown: 0.36V
Reverse: Open
0.1 Ohms
D301D302D303D304
RF2001Shown: 0.36V
Reverse: Open
Shown: Open
Reverse: Open
Shown: Open
Reverse: Open
0.1 Ohms
Blk RedBlk Red Blk Red
Blk RedBlk Red Blk Red
Blk RedBlk Red Blk Red
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ZZ--SUS How to Check the Output FETs 2 of 2SUS How to Check the Output FETs 2 of 2
Name is printed on the components. Readings “In Circuit”.
Shown: 1.496VA 0.6V
Reverse: 0.782V
Shown: 0.364V A 0.49V
Reverse: Open
AQ302AQ304BQ313BQ314
Shown: 0.536V
Reverse: Open
Shown: 1.22V
Reverse: Open5N50CQ321
Q315Q317Q318
45F122 Shown: OpenReverse: 1.14V
B0.95V
Shown: Open
Reverse: Open
Blk RedBlk Red Blk Red
Blk RedBlk Red Blk Red
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ZZ--SUS How to Check the ZSUS How to Check the Z--SUS if the YSUS if the Y--SUS Has FailedSUS Has FailedJump Vs toPin 11 or 12
Jump M5V to Pin 1 or 1
Jump STBY 5V to any 5V
location
Leave P101 to P100 Connected
When you apply AC to the SMPS, check the Z-Bias
waveform TP for 100V P/P signal
All this assumes the Power supply and
Control board are working correctly.
Jump 17V to any FS101
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CONTROL BOARD SECTIONCONTROL BOARD SECTION
• DC Voltage and Waveform Test Points• Diode Mode Test Points
Signals Signals
+5V (M5V) Developed on the SMPS+17V (Routed to the Z-SUS)
+1.8V for internal use+3.3V for internal use+3.3V for the X-Boars (TCPs)
This Section of the Presentation will cover troubleshooting the Control Board Assembly. Upon completion of this section the Technician will have a better understanding of the circuit and be able to locate voltage and diode mode test points needed for troubleshooting.
Main Board Supplied Panel Control and LVDS Signals
Operating Voltages Operating Voltages
Control Board Generated Y-SUS and Z-SUS Drive Signals (Sustain)X Board Drive Signals (RGB Address)
Y-SUS Supplied
Developed on the Control Board
88 November 2009 50PQ30 Plasma
D201Temp LED
P162P161
P111
To X Drive Cent To X Drive Cent
P131 P121 LVDS
IC231
AUTO GEN TESTPATTERN
Control Board Component IdentificationControl Board Component Identification
Waveform Generation Software Download Connection
To P101Y-SUS
Part NumberLabel
n/c
5V
1.8V
Gnd4.8VGnd
3.3V
5V
To P100Z-SUS
P101
To P1003 Main
EEPROMIC101
Vs DA3.2V
FL111FL112
M5VIC141
DRAMIC251
3.3V
IC211
IC201MCM
IC241
IC221
Pin 1
Gnd
1) 3.3V2) 0V3) 3.3V4) Gnd5) 3.3V6) 0V7) 3.3V8) 0V
IC2411) 0.8V2) Gnd3) 4.96V4) 5.74V5) 4.91V6) Gnd7) Gnd8) 4.95V
Pin 1
Pin 1
X101Crystal 25Meg
3.3V
LVDS Cable
17VPins 11, 12
17VPins 1~3
M5VPins 4~7
Short across the two points labeled Auto Gento generate a test pattern.
(LVDS Cable Must Be Removed)
* If the complaint is no video and if shorting the two points (AutoGen) causes video to appear suspect the Main board or LVDS cable.
With the unit on, if D201 does not blink on/off, check 5V supply. If present replace the Control PCB
Unplug all connectors. Jump 5V from SMPS (P813 pins 9~12) to pin 1 of IC211. Observe LED. If it blinks, most likely Control PWB is OK. FL111 and FL112 should be checked.
Disconnect P201 from the Y SUS Board and connect a Jumper from Pin 10 of P812 (M5V) to Pin 10 P201 (5V). The 5V will be routed to the Control Board via FS201, Ribbon Cable P101 on the Y SUS Board to P111 on the Control board. Then through FL111 and FL112 to all regulators on the Control Board. For Control Board operation verification, watch D201 for blinking.
Note: IC221 (3.3V Regulator)routed out P162
(56~60)to X-PWBs
89
50PQ30 CONTROL BOARD (Troubleshooting Tips)50PQ30 CONTROL BOARD (Troubleshooting Tips)
No Connection
FL111 FL112 M5V Fuses (EMI Filters)
Used for ROM UpdatesPin 1 (Gnd)Pin 2 (3.3V)Pin 3 (4.95V)
IC221
LVDS
To Z-SUSPin 11/12 (17V)
To Left X Board To Right X Board
Data and Clocks to Y-SUS and Y-Drive
P111 Ribbon Cable
P121
Auto Gen
P161 P162D201
CONTROL BOARD
P131
IC221
IC231
X10125 Meg
Pin 1 (5V)Pin 2 (1.8V)Pin 3 (Gnd)
IC211
Pin 1 (Gnd)Pin 2 (3.3V)Pin 3 (4.95V) P101P111
IC241
IC201MCM
2
IC141
IC141
From Pin 2 IC221 (3.3V)P162 Pins 56~60
Pin 1~3 (17V) Pin 4~7 (M5V)
Pin 1 (3.3V)Pin 2 (0V)Pin 3 (3.3V)Pin 4 (Gnd)Pin 5 (3.3V)Pin 6 (0V)Pin 7 (3.3V)Pin 8 (0V)
M5V
M5V
GndGnd
Pin 8 (3.3V)Pin 7 (3.3V)Pin 6 (Gnd)Pin 5 (3.3V)
IC241Pin 1 (3.3V)Pin 2 (3.3V)Pin 3 (Gnd)Pin 4 (3.3V)
P101
Published November 2009 50PQ30 Plasma
90 November 2009 50PQ30 Plasma
Control Board Additional Troubleshooting TipsControl Board Additional Troubleshooting Tips
For quick Control board test. (All connectors Disconnected).
Jump 5V from PowerSupply to IC201 Pin 3.(Bottom Pin)If the LED blinks,Pretty muchguaranteed,Control Board is OK.
Quick observationOf LED blinkingTell if the ControlBoard is running.
When the Television has a problem related to;1) Shutdown caused by Main Board.2) No Video (No Picture) Sound OK.This can be checked by the following. (1) Disconnect the Main board from all connectors. Apply AC power. Since P813 is not connected to the SMPS, the set will come on. Short the two pins on the Auto Test Pattern lands. If there is a picture of cycling colors and patters, the Y-SUS, Y-Drive, Z-SUS, Power Supply, Control board,X-Boards, TCPs and Panel are all OK. Use the same test for problem (2) above to tell if the No Video is caused by the Main board or failed LVDS cable.
Confirm B+ to Control the Control BoardVS_DA3V ~ 3.3V(Note, this TP can also beUsed as an External TriggerFor scope when locking onto the Y-Drive signal).
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Check the output of the Oscillator (Crystal). The frequency of the sine wave is 25 MHZ.Missing this clock signal will halt operation of the panel drive signals.
Osc. Check: 25Mhz
Checking the Crystal X101Checking the Crystal X101““ClockClock”” on the Control Boardon the Control Board
DC Voltage Check1.5V ~ 1.8V
CONTROLBOARD
CRYSTALLOCATION
X101
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LVDSVideo Signals from the Main Board to the Control Board are referred to as Low Voltage Differential Signals or LVDS. Their presence can be confirmed with the Oscilloscope by monitoring the LVDS signals with no input signal selected while pressing the Menu Button “on” and “off” with the Remote Control or Keypad. Loss of these Signals would confirm the failure is on the Main Board!
Example of Normal Signals measured at 200mv/cm at 5µs/cm.
Menu Off Menu ON
LVDS CableP121 on Control board shown.Press two outside tabs inward to release.
Control Board LVDS SignalsControl Board LVDS Signals
Connector P1002 Configuration - indicates signal pins.
On Main Board
1
3
5
7
9
11
13
15
17
19
21
23
25
2
4
6
8
10
12
14
16
18
20
22
24
26
Pins are close together,Use Main board side.
Main board P1002
Pin
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This Picture shows Signal Flow Distribution to help determine the failure depending on where the it shows on the screen.
The Control Board supplies Video Signals to the TCP (Tape Carrier Package) ICs.
If there is a bar defect on the screen, it could be a Control Board problem.
MCM
16 bit words
Resistor Array
256 Lines output Total
Basic Diagram of Control Board Control Board to X Board Address Signal Flow
IC201
Control Board Signal (Simplified Block Diagram)Control Board Signal (Simplified Block Diagram)
MCM
IC201DRAM
2 Buffer Outputs per TCP
CONTROL BOARD
X-DRIVE BOARD
PANEL
128 Lines per Buffer
To Center X-Board
EEPROM
There are 16 total TCPs.
4096 Vertical Electrodes
1365 Total Pixels (H)
94 November 2009 50PQ30 Plasma
The LVDS Cable has two “Interlocks” that must be disengaged to remove the LVDS Cable.
To Disengage, press the two Locking Tabs Inward and pull the plug out.
Removing the LVDS Cable from the Control BoardRemoving the LVDS Cable from the Control Board
Press Inward
Press Inward
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Control Board Connector P111 to YControl Board Connector P111 to Y--SUS P101 Voltages and Diode Mode ChecksSUS P101 Voltages and Diode Mode Checks
P111 These pins are very close together. When taking Voltage measurements use Caution.
Pins 3, 4, 5, 6, and 7 Receive +5V from the Y-SUS.
FL111 and FL112 +5V Fuse
Pins 1, and 2 Receive +15V from the Y-SUS.
Pins 9, 10, 11 and 30 Are Ground
All the rest are deliveringY-SUS Waveform development and Y-Drive logic signals to the Y-SUS Board (Y-Drive logic signals are simply routed right through the Y-SUS to the Y-Drive boards).
The +17V is not used by the Control board, it is routed to the Z-SUS leaving on P101 Pins 11 and 12.
Pin
Odd Pins
EvenPins
Tip: For Checking Voltages, Check the Odd pins on the Control board and the Even pins on theY-SUS board.
96 November 2009 50PQ30 Plasma
Control Board Connector P111 Silkscreen Can Be MisleadingControl Board Connector P111 Silkscreen Can Be Misleading
P111 The silkscreen indicates that taking voltage or signal readings on P111 show Odd pins on the Left and Even pins on the Right.
P111 Example:If there were room
for Labeling
Odd Pins Even
Pins
Silkscreen Label:The pin numbers are correct. Remember Odd pins on the left
and even pins are on the right.
Silkscreen Label:The pin numbers are correct.
Remember Odd pins on the left and even pins are on the right.
97 November 2009 50PQ30 Plasma
Open0.11VY_SUS_UP29
Open0.14VY_ER)_UP27
Open2.6VYO_SYS_DN25
Open0.114VY_ER_DN23
Open0.17VSLOPE_RATE_SEL21
Open1.29VDET_LEVEL_SEL19
Open0.57VDELTA_VY17
Open1.99VSET_ON15
GndGndGND13
1.76V0VY_ENABLE11
Open0.1VGND09
0.97V5V+5V07
0.97V5V+5V05
Open17.04V+15V03
Open17.04V+15V01
Diode ModeRun LabelPin
GndGndGND30
Open1.1VY_PASS_TOP28
Open3.12VSET_UP26
Open024VSLOPE_OPT24
Open0.6VCLK22
Open1.45VSTB20
Open1.44VOC118
Open0VDATA16
Open1.82VOC214
GndGndGND12
GndGndGND10
GndGndGND08
0.97V4.95V+5V06
0.97V4.95V+5V04
Open17.04V+15V02
Diode ModeRun LabelPin
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
Control P111 to YControl P111 to Y--SUS P101 Plug InformationSUS P101 Plug Information
P111 CONNECTOR “Control Board" to “Y-SUS" P101
There are no Stand-By voltages on this connector
Tip: For Checking Voltages, Check the Odd pins on the Control board and the Even pins on the Y-SUS board.
98 November 2009 50PQ30 Plasma
Open17V15V12
Open17V15V11
GndGndGnd10
Open0.8VZO_SUS_Dn9
Open0.2VZO_SUS_Up8
Open0.4VZO_ER_Dn7
Open0.3VZO_ER_Up6
GndGndGnd5
Open1.7VSLOPE_CTRL4
Open1.8VZ_Bias3
Open0.05VZ_ENABLE2
GndGndGnd1
Diode ModeRun LabelPin
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
Control Board P101 to ZControl Board P101 to Z--SUS P100 Plug InformationSUS P100 Plug Information
P101 CONNECTOR “Control Board" to “Z-SUS" P100
Pin 1 at the bottom of the connector
99 November 2009 50PQ30 Plasma
P161 and P162 Connectors from the "Control Board" to "X Drive Center”.
These pins may be covered with tape for transportation issues. (Tape can be removed).
Control Board Connector P161 and P162 to XControl Board Connector P161 and P162 to X--Drive BoardsDrive Boards
Tape removed 3.3VTP
The rest of the pins are much tooclose together for a safe test.
3.3V created by IC221
Delivers only RGB drive
signals3.3V TP
P161 P162
Delivers only RGB drive signals and
3.3V
Note: In this set, both connectors go to the
Center X-Board
100 November 2009 50PQ30 Plasma
X BOARDS SECTIONX BOARDS SECTION
The X Drive Boards deliver the Color drive signals to the Vertical Grids via TCPs.The 50PQ30 has a Left, Center and a Right X-Drive board. The Center X-Board has 6 connectors to a TCPs. The Left and Right have 5 connections to TCPs.Each TCP has 2 internal buffers.Each buffer controls 128 vertical grids lines (256 per/TCP).
Generally speaking, there isn’t many active components on the X-Drive Boards. So they are not very prone to failure.
In this section the X-Drive will be discussed and information given allowing theservice technician to determine if a failure has occurred in the X-Drive section.
X-BOARDS CONTROL THE VERTICAL ELECTRODES WHICH DETERMINE THE HORIZONTAL PIXEL COUNT.TOTAL VERTICAL ELECTRODES 4096. TOTAL HORIZONTAL PIXELS 1365.
Total Buffer Count = 36(TCPs = 16 @ 2 buffers per/TCP)
Total Output Pins = 4096 (128 per buffer X 36 total)
Total Pixels (Horizontal) 1365(4096 / 3) Three cells per pixel (Red, Green and Blue)
X Board Left, Center and Right (Commonly known as AX Board Left, Center and Right (Commonly known as A--BUS)BUS)
101 November 2009 50PQ30 Plasma
Left, Center and Right X Boards (Commonly known as ALeft, Center and Right X Boards (Commonly known as A--BUS)BUS)
RIGHT X BOARD TCP IC’s shown are part of the Ribbon Cable
Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed. After a very short time, these ICs will begin to self destruct due to overheating.
CENTER X BOARD TCP IC’s shown are part of the Ribbon Cable
LEFT X BOARD TCP IC’s shown are part of the Ribbon Cable
P231 P232
P122P121
P211P212
P331
102 November 2009 50PQ30 Plasma
TCP ICs receive RGB 16 bit signal and deliver it to the PDP by connecting the PAD Electrode of the PANEL with the X Board.
TCP
Connector
Fram
e
X_B/D
Front panel H
orizontal A
dd
ressRear pa
nel Vertical A
dd
ress
TCP (Tape TCP (Tape CarrierCarrier Package)Package)
Control Board
Back side of TCP Ribbon
TCP
Taped Carrier Package
Flexible Cable
Y-SUS BoardVa
Logic
Connector
X Drive
Board
Heat Sink
103 November 2009 50PQ30 Plasma
TCP TestingTCP TestingTypical Reading 0.56~0.65VForward biased
5 10 15 20 25 30 35 40 45 501
On any Gnd
On any Va4,5,6,7,44,45,46,47
10,11,12,13,14,27,28,29,30,37,38,39,40,41
Look for any TCPs being discolored.Ribbon Damage. Cracks, folds Pinches, scratches, etc…
Va VaGnd Gnd
-
+
Reverse Leads Reads OpenReversed biased
On 3.3V32 or 33
On any signal15,16,18,19,21,22,24,26,31,36
104 November 2009 50PQ30 Plasma
TCP 3.3V B+ CheckTCP 3.3V B+ Check Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed.
Checking IC221 for 3.3V use center pin.
IC2215V 3.3V 0V
3.3V
3.3V in on Pins 1~5
P232
105 November 2009 50PQ30 Plasma
TCP Visual Observation. Damaged TCPTCP Visual Observation. Damaged TCP
This damaged TCP can,a) Cause the Power Supply to shutdownb) Generate abnormal vertical barsc) Cause the entire area driven by the TCP to be “All White”d) Cause the entire area driven by the TCP to be “All Black”e) Cause a “Single Line” defect
Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed. After a very short time, these ICs will begin to self destruct due to overheating.
106 November 2009 50PQ30 Plasma
Voltage and Diode Mode Measurements for the Left X Drive Board
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
X Drive Left Connector P122 Voltages and Diode CheckX Drive Left Connector P122 Voltages and Diode Check
Open*60VVA7
Open*60VVA6
Open*60VVA5
n/an/an/c4
GndGndGnd3
GndGndGnd2
GndGndGnd1
Diode ModeRun LabelPin
* Note: This voltage will vary in accordance with Panel Label
P122 CONNECTOR "X Drive Left" to “Y-SUS" P202
107 November 2009 50PQ30 Plasma
Voltage and Diode Mode Measurements for the X Drive Board
X Drive Left and Right Connector P232 and P331X Drive Left and Right Connector P232 and P331
Voltage and Diode Mode Measurements for these connectors are difficult to read.They are too close together for safe test.
The pins are also protected by a layer of tape to prevent the tab from being released causingseparation from the Cable and the connector.
108 November 2009 50PQ30 Plasma
OperatingOperating VoltagesVoltages SMPS Supplied
This Section of the Presentation will cover troubleshooting the Main Board. Upon completion of this Section the technician will have a better understanding of the operation of the circuit and will be able to locate voltage and diode mode test points needed for troubleshooting and for all alignments.
5V (MST)3.3V (MST)3.3V (PVSB)1.8V (MST)1.2V (VDDC)9V (TU)
5V Stand-By5V
Developed on the Main Board
• DC Voltage and Waveform Checks• Diode Mode Measurements
MAIN BOARD SECTIONMAIN BOARD SECTION
3.3V (VST)3.3V (DVDD)2.5V
1.2V (PVSB)5V (TU)
12V (Tuner B+)16V (Audio B+)
109 November 2009 50PQ30 Plasma
Tuner
IC1Micro.
Component inputs
LVDS (Video)To Control
RGB/PC
P1006
P1001
P1005
AVIn 3
To Power Supply
HDMI inputs
RS232
SPK Out
To Front
Controls
Main Board Layout and IdentificationMain Board Layout and Identification
TunerX501
25 Mhz
X112 Mhz
Audio
Audio RGB/DVI
ResetSW100
OpticalAudio
USB
HDMI 3
Wired Remote
A/V Composite inputs
P1003
Pin 1
Pin 19
S-In
IC503IC203
IC204
IC1001
IC805
IC504
RF
IC302
50PQ30 MAIN PWB (Front Side) COMPONENT LAYOUT50PQ30 MAIN PWB (Front Side) COMPONENT LAYOUT
MAIN (Digital) BoardSW301
P1005 IC504Tuner Ctrl
US
BH
DM
I4
Video
Aud L
Aud RHDMI1
HDMI2
Y Pr/Pb 2
Y Pr/Pb 1
AV InRemote
Optical RGB Audio
Audio
Resets IC1
1
16 SIF
19 Video
4 (5V)
12 DIF +13 DIF -
15 (5V)
TUNERTU501
TDVW-H103F
IC805
A
C
A
IC204Memory
P1006 to SMPS P1003 LVDS
P1001
SP
K
IC1001AudioL1013
L1012
B
C
E
Q301
IC1
X10012Mhz
E
CB
ACA
D303
Q1002
Q801
ACA
D805
IC503
IC302
L318
JK603
S-Video
Audio
IC203
X50125Mhz
LVDS Driver
MicroprocessorVideo Processor
RS232 RGB In
9V Reg
+1.2V_VDDC regulator
5V MSTSwitch Ctl
Reset Route
HDMI CEC
IC804USB Power
D502
ACA
D804
D806
C AZD601
110 Published November 2009 50PQ30 Plasma
For component voltages, see the 50PQ30 Interconnect Section page 3.
X501Only runs when tuned to a Digital Channel.
50PQ30 MAIN PWB (Back Side) COMPONENT LAYOUT
P1002
IC2023 12
IC304
IC201
2 13
2
B
C
E
Q891
Q502
Q503
IC502 GS
B
C
E
2
B
C
E
B
C
E
IC305
CA
D1001Q302
Q1001
IC601
A
C
A
D802
IC803
IC802
Q892D628
Q601 D627 B
C
EQ890
Q504
Q501
21 3
2
IC505
50PQ30 MAIN PWB (Back Side) COMPONENT LAYOUT
C
BE
C
BE
Q303
IC301P1006
D633
IC602
1
3
2
Out
OutGnd In
D
D
GS
A
C
A
A
C
A
A
C
A
B E
C
B E
C
1
SIF 16
Video 19
(5V) 4
DIF + 12DIF - 13
TUNER
111 Published November 2009 50PQ30 Plasma
For component voltages, see the 50PQ30 Interconnect Section page 3.
112 November 2009 50PQ30 Plasma
Video Pin 19 Video Test Point
SIF Pin 16 Audio Test Point
Pin 4 Tuner B+ (5V)
Pin 1
DIG IF (-) Pin 13DIG IF (+) Pin 12Digital Channel Test Point
Pin 15 Tuner B+ (5V)
Data Pin 9 Clock Pin 8
TU501
MAIN BoardTuner Location
Main Board Tuner Check (Shield Off, Pins Exposed)Main Board Tuner Check (Shield Off, Pins Exposed)
113 November 2009 50PQ30 Plasma
MAIN BoardTuner Location
Main Board Tuner Video Main Board Tuner Video and SIF Output Checkand SIF Output Check
450mVp/p
Pin 19 “Video”Signal
Pin 16 “SIF”Signal
2.24Vp/pUSING COLOR BAR SIGNAL INPUT
Pin 12 and Pin 13“Dig IF” Signal
Note:“Dig IF” Signal only when receiving a Digital Channel.100mV / 1uSec
Pin 1
Note:“Video Out” Signal only when receiving an analog Channel.
700mVp/p
200mV / 2uSec
500mV / 10uSec
114 November 2009 50PQ30 Plasma
Main PWB Tuner Clock and Data LinesMain PWB Tuner Clock and Data Lines
Pin 8 SDA
100uS1V per/div 5V p/p
Pin 9 SCL
100uS1V per/div 5V p/p
Note:SCL and SDA only active
during an actualChannel Change.
115 November 2009 50PQ30 Plasma
MAIN Board Crystal
Location
Main Board Crystal X1 and X501 CheckMain Board Crystal X1 and X501 CheckLeft Side (1.576V DC) / (2.5V p/p)
Right Side (1.6V DC) / (3V p/p)12Mhz
Top (1.49V DC)/(3.84V p/p)Bottom (1.58V DC)/(5.27V p/p)
25Mhz
Runs all the time
X1
X501
Runs only on Digital Channels
116 November 2009 50PQ30 Plasma
MAIN BOARD
Main Board P1002 LVDS Video Signal CheckMain Board P1002 LVDS Video Signal Check
P1003 Location
Pin 115uSec per/Div
Pin 185uSec per/Div
Using a SMPTE Color Bar Signal
700mVp/p
Pin 1Pin 11
2uSec per/Div
Pin 182uSec per/Div
P1003 LVDS (Pin 11) 2uSec / 718mV
P1003 LVDS (Pin 11) 5uSec / 718mV
P1003 LVDS (Pin 11) 2uSec / 642mV
P1003 LVDS (Pin 11) 5uSec / 642mV
See Interconnect Diagram (Page 2) for all LVDS See Interconnect Diagram (Page 2) for all LVDS cable video signal Waveforms.cable video signal Waveforms.
117 November 2009 50PQ30 Plasma
Voltage and Diode Mode Measurements
Diode Mode Readings with all Connectors Disconnected. DVM in the Diode mode.
Open3.3V0VM5 ON211.36V5V5VStby 5V23
Open3.3V0VRL On19Open4.6V0V5V Det17GndGndGndGnd15GndGndGndGnd131.1V5V5V5V111.1V5V5V5V9GndGndGndGnd7Open12V0V12V5GndGndGndGnd3Open17.3V0V17V1
Diode ModeRun STBYLabelPin
P1006
Pin front
GndGndGndAuto Gnd22Open0V0V*Key On24
Open3.3V0VVS On20Open4.5V4.6VAC Det18GndGndGndGnd16GndGndGndGnd141.1V5V5VSTBY5V121.1V5V5V5V10GndGndGndGnd8Open12V0V12V6GndGndGndGnd4Open17.3V0V17V2
Diode ModeRun STBYLabelPin
P301 CONNECTOR "Main" to “Power Supply" P813
*Note: If the Key On line is 5V, the Main Power Switch is open. Stand-By 5V will shut off.
Main Board Plug P1006 to Power Supply Voltages and Diode CheckMain Board Plug P1006 to Power Supply Voltages and Diode Check
118 November 2009 50PQ30 Plasma
P1003 CONNECTOR "Main" to P121 "Control"
Diode Mode Readings with all Connectors Disconnected. DVM in the Diode mode.
Main Board Plug P1003 Main Board Plug P1003 ““LVDSLVDS”” Voltage and Diode CheckVoltage and Diode Check
DISP_EN
PC_SER_CLK
RA2+
RB2+
RC2+
RCCLK2+
RD2+
RE2+
Module_SCL1
Gnd
Gnd
ROM_RX1
n/c
Label
0.495V2.82V25
1.02V0V23
0.98V1.37V21
0.78V1.27V19
0.88V1.3V17
0.78V1.3V15
0.96V1.3V13
0.78V1.3V11
Open3.3V9
GndGnd7
GndGnd5
Open3.3V3
n/cn/c1
Diode ModeRunPin
GndGndGnd26
1.37V3.29VPC_SER_DATA24
0.869V1.12VRA2-22
0.78V1.21VRB2-20
0.849V1.26VRC2-18
0.78V1.24VRCCLK2-16
0.847V1.21VRD2-14
0.85V1.23VRE2-12
0.889V3.29VModule_SDA110
GndGndGnd8
GndGndGnd6
Open3.29VROM_TX14
n/cn/cn/c2
Diode ModeRunLabelPin Pin
This line is held low if the Main board has no power. Auto Gen on Control board will not work unless LVDS cable is removed.
119 November 2009 50PQ30 Plasma
Voltage and Diode Mode Measurements for the Main Board
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
Main Board Plug P1001 to Ft IR Voltages and Diode ChecksMain Board Plug P1001 to Ft IR Voltages and Diode Checks
P1001 CONNECTOR "MAIN Board" to "Front IR“ J1
PWM
LED-W
LED-R
Gnd
3.3VST
5VST
Gnd
EYE-SDA
EYE-SCL
Gnd
P Key
Key2
Key1
Gnd
IR
Label
GndGndGnd12
Open0V3.3V13
Open03.250V14
0.961VGndGnd15
0.629V5.13V0V11
1.3V5V5V10
GndGndGnd9
Open3.3V0V8
Open3.3V0V7
GndGndGnd6
Open0V0V *(5V)5
1.9V3.3V0V4
1.9V3.3V0V3
GndGndGnd2
Open5V5V1
Diode ModeRun STBYPin
* Pin 5 (Power Key) This pin is 0V when the button is lock “On” (In) and 5V when Locked “Off” (Out)
Pin
Stand By 5V
120 November 2009 50PQ30 Plasma
Main Board Speaker Plug P1005 Voltages and Diode ChecksMain Board Speaker Plug P1005 Voltages and Diode Checks
P1005Speaker
Connector
Diode Mode Readings with all Connectors Disconnected. DVM in the Diode mode.
L-L+R-R+
Label
Open8.65V0V4Open8.65V0V3Open8.65V0V2Open8.65V0V1
Diode ModeRunSBYPin
MAIN BOARD
P1005 CONNECTOR "Main" to "Speakers"
R+R-L+L-
Speakersare
8 Ohms
121 November 2009 50PQ30 Plasma
The Key Board (with Power Switch) is located (as viewed from the rear) in the lower left hand section.
REMOVAL: Remove the 2 screws, push tabs inward while lifting upward on the board. Unplug the connector P101.
FRONT CONTROL BOARD (IR and LED) KEY BOARD SECTIONFRONT CONTROL BOARD (IR and LED) KEY BOARD SECTION
Front Key Board
Screw Screw
P101
Master Power SwitchSet will not functionwith this “Mechanical”switch down in the open position. “Disengaged”
Button Assembly (Removed)
Key Board RemovalKey Board Removal
GndStrap
Key Board
Ft IR Board
To left screw
Tab
Tab
122 November 2009 50PQ30 Plasma
The (IR, LED and Intelligent Sensor) board is located (as viewed from the rear) in the lower left hand section.
REMOVAL: Remove the 2 screws, pay attention to the Ground Strap on the left screw. Be sure to return this strap and IR problems may occur without it. Unplug the connectors J1 and J2.
Front IR and Power LED Board RemovalFront IR and Power LED Board Removal
Front IR Board
Screw Screw
GndStrap
With GndStrap
J2J1
J2 Pin
123 November 2009 50PQ30 Plasma
The Ft Power LED board includes the IR Receiver and the Intelligent Sensor. The Front POWER LED is also located on this board.
Ft Power LED (IR) Board LayoutFt Power LED (IR) Board Layout
Back View
Front View
IR Sensor
INTELLIGENT SensorFRONT POWER
LEDs
J2
To Main Board
To Front Keys
J1
124 November 2009 50PQ30 Plasma
Ft Power LED (IR) Board Component ChecksFt Power LED (IR) Board Component Checks
Back View
Front View
IR Sensor
Intelligent Sensor
Front Power LEDs
ZN1 0.653V
ZN3 0.7V
ZN2 0.687V
Leads opposite = Open 0.652V
Place Voltmeter in Diode Mode,Red on bottom of either LED black lead
on top and they light.
Blue LED
Red LED
0.652VGnd
Place Voltmeter in Diode Mode.
Place Voltmeter in Diode Mode.
Black on Gnd.
125 November 2009 50PQ30 Plasma
Voltage and Diode Mode Measurements for the Main Board
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
Front LED Board Plug J1 to Main VoltagesFront LED Board Plug J1 to Main Voltages
J1 CONNECTOR “FRONT IR” to "MAIN” P1001
PWM
LED-W
LED-R
Gnd
3.3VST
5VST
Gnd
EYE-SDA
EYE-SCL
Gnd
P Key
Key2
Key1
Gnd
IR
Label
GndGndGnd12
3.22V0V3.23V13
Open03.230V14
1V0V0V15
1.1V5V0V11
1.06V5V5V10
GndGndGnd9
2.5V3.3V0V8
2.5V3.3V0V7
GndGndGnd6
Open0V0V *(5V)*5
1.6V3.3V0V4
1.6V3.3V0V3
GndGndGnd2
3.2V5V4.8V1
Diode ModeRun STBYPin
* Pin 5 (Power Key) This pin is 0V when the Main Power button is locked “On” (In) and 5V when it is locked “Off”(Out)
J1 Pin
Stand By 5V* Pin 5 (Power Key) When this switch is out, Stand-By 5V turns off.
126 November 2009 50PQ30 Plasma
Voltage and Diode Mode Measurements for the Main Board
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
Front IR Board Plug J2 to Key Board Voltages and Diode CheckFront IR Board Plug J2 to Key Board Voltages and Diode Check
J2 Pin
*STBY2 Main Power Switch “IN” Normal
*STBY1 Main Power Switch “OUT”
Vacation
Gnd
PWR SW
KEY 2
KEY 1
LABEL
Gnd
Gnd
0V
0V
*STBY2
*OpenGndGnd*1
OpenGnd4.38V2
Open3.3V0V3
Open3.3V0V4
Diode ModeRun *STBY1Pin
J2 CONNECTOR “Ft LED Board" to "Ft Key Board"
* This pin is open in reference to
Chassis Ground.
* Use this pin for all readings.
* Use this pin for
Diode Mode readings.
127 November 2009 50PQ30 Plasma
SIDE KEY BOARD SECTIONSIDE KEY BOARD SECTION
To Ft IR J2P101
SW102
SW104
SW106
SW105
SW108
SW107
SW103
Main Power ButtonIn (On) Out (Off)
Side Key Board Layout (Component Identification)Side Key Board Layout (Component Identification)
SW101
128 November 2009 50PQ30 Plasma
The Ft Key board contains the Master Power Switch, Volume Up/Down and Channel Up/Down keys. Also the Menu and Select keys.
Side Key Board LayoutSide Key Board Layout
Front View
Rear ViewTo Front LED Board
Pin
P101
Main Power Switch
P101
P101
129 November 2009 50PQ30 Plasma
Side Key AssemblySide Key Assembly P101 Resistance Measurements with Key pressed.
Menu
Enter
Volume (-)
Volume (+)
KEY
9K Ohms
22K Ohms
0.62K Ohms
3.54K Ohms
Pin 3 measured from Pin 1
3.5K Ohms
9K Ohms
6K Ohms
Pin 4 measured from Pin 1
Input
CH (Dn)
CH (Up)
KEY
P101 Voltage Measurements with Key pressed.
P101 Connector “Side Key" to “IR/LED Control Board“ J2 (No Key Pressed)
STBY 1Main Power Switch Out
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
Menu
Enter
Volume (-)
Volume (+)
KEY
1.56V
2.2V
0.19V
0.86V
Pin 3 measured from Pin 1
0.88V
1.57V
0.19V
Pin 4 measured from Pin 1
Input
CH (Dn)
CH (Up)
KEY
STBY 2Main Power
Switch In
PinP101
Open3.3V0V0VKEY 14
OpenGndGnd4.38VPWR SW2
*OpenGndGndGndGnd*1
KEY 2
LABEL
0V
*STBY2
Open3.3V0V3
Diode ModeRun *STBY1Pin* This pin is open
in reference to Chassis Ground.
* Use this pin for all readings.
130 November 2009 50PQ30 Plasma
The Invisible Speaker System keeps the speaker grills off the front of the TV.The speakers actually point downward.
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
INVISIBLE SPEAKER SECTIONINVISIBLE SPEAKER SECTION
The picture above shows the additional “plastic support”
Housing Under the speaker.
Speaker
Housing Housing
At the top of the speaker is a rubber cushion.Be sure to return this to its proper position to prevent vibrations.
Speaker
Bottom of TV
Cushion Cushion
Screw Screw
Bottom of TV
p/n: EAB58534501Full Range 10W 8OHM 83DB 100HZ 160 X 55 X 31)
131 November 2009 50PQ30 Plasma 131
50PQ30 SERVICE TIP SECTION50PQ30 SERVICE TIP SECTION
Floating Ground checks must be made from Floating Ground. Use any pin on P204, P203, P205 or P208.
TIP:SYMPTOM: The panel indicates a brief flash during start up, then “No Picture” symptom.
CHECKS: 1. Z-SUS does not produce a correct signal. (All voltages check normal except 17V).2. Y-SUS does not produce a correct signal. (No negative portion).3. On Y-SUS: 17V starts off at 17V then very quickly drops to 5V.4. Floating Ground 5V and 15V are not produced. (See pages 60~61 for more details).5. Removing all connectors on the Z-SUS board (Except the panel connectors) does
not change test results.6. Removing Y-Drive boards cause all voltages to return to normal.
Including the Y-Drive signal checked on the right side of C213.7. Reconnecting all connectors on the Z-SUS board shows it is not creating a
correct waveform. Just spikes. (17V now stays up).8. Using the Diode Checks for the Y-Drive boards do not indicate a problem.
(See pages 67, 70, 71 and 74 for more details).
FIX:Replacing the Z-SUS board fixed the problems.
132 November 2009 50PQ30 Plasma
No Remote Function Service Tip:No Remote Function Service Tip:
TIP:SYMPTOM:
When the set turns on and a picture appears, the bottom of the picture shows the Input selection screen.
The Remote did not work.
The Front Function Keys did not work. (Except the Main Power Switch).
CHECKS: 1. Main Board: Reading the Key 1 and Key 2 lines found that Key 2 was at 0.8V.
Key 1 read normal at 3.3V. (See page 124 for more details).2. Feeling the Function buttons found that the right hand button (as viewed from the
rear) did not feel the same as the others. It was stuck.
FIX:1. Removing and repositioning the button assembly freed up the button. The set
return to normal function. (See page 116 for more details).
133 November 2009 50PQ30 Plasma
Checking the YChecking the Y--Drive Upper or Lower Board Tip:Drive Upper or Lower Board Tip:
TIP:SYMPTOM:
Set shuts down at turn on.
CHECKS: (See pages 67, 70, 71 and 74 for more details).1. V-Scan signal input to Lower Y-Drive board low ohms or low volts (Diode Mode).2. Output from any buffer shows low ohms or low volts (Diode Mode).
FIX: Found Defective Y-Drive Upper or Lower (See the Y-Drive section for checks)
1. After determining which Y-Drive board is defective using the checks shown in the Y-Drive section, the other board can be tested separately.
• If the Upper Y-Drive is found defective, the Lower Y-Drive board can be tested. Remove the Upper Y-Drive. Disconnect the Connector P209. Turn on the set and confirm that the bottom half of the picture looks normal.
• If the Lower Y-Drive is found defective, the Upper Y-Drive board can be tested. Remove the Lower Y-Drive. Disconnect the Connector P209.
• Jump either Pin 1 or 2 of P207 (V-Scan from the Y-SUS) to pin 4 or 5 of connector P108 on the Upper Y-Drive board.
• Turn on the set and confirm that the top half of the picture looks normal.
134 November 2009 50PQ30 Plasma
½½ of the Picture is missing Top or Bottom Tip:of the Picture is missing Top or Bottom Tip:
TIP:SYMPTOM: When the set turns on, either the Top or Bottom ½ of the picture is black. It is
possible that the whole picture could be black if P207 or P207(Y-SUS) is involved.
CHECKS: 1. Look careful the connections between the Y-SUS and Upper and Lower Y-Drive
boards. It is very possible that the can be improperly seated.
FIX:1. Remove and reseat the board correctly. 2. Note: This can happen if either the Y-SUS or Y-Drive boards are replaced or
pulled off to perform checks.
Improperly Seated Connector
Note the pins are visible across the top inside of the
connector.
Properly Seated Connector
Note now the pins are not visible across the
top inside of the connector.
135 November 2009 50PQ30 Plasma 135
This section shows the 11X17 foldout thatThis section shows the 11X17 foldout that’’s available in the Adobe s available in the Adobe version of the Training Manual.version of the Training Manual.
11 X 17 Foldout Section11 X 17 Foldout Section
50PQ30 INTERCONNECT DIAGRAM SECTION50PQ30 INTERCONNECT DIAGRAM SECTION
For Printing purposes, choose the 11X17 paper size.For Printing purposes, choose the 11X17 paper size.
The Interconnect Diagram has a great deal of quick reference The Interconnect Diagram has a great deal of quick reference servicing aids. Use this in conjunction with the Training Manualservicing aids. Use this in conjunction with the Training Manual..
NOTE: Diode tests are conducted with the PWB disconnected.
P1213.3V in onPins 10~11
Va in onPins 47~50
3.3V outOn Pins 12, 5~6
Va outon
Pins 1~4
P101 P102 P103 P104 P105 P301 P304 P305P201 P202 P203 P204 P205 P206
X-Board RightX-Board Center
P121
Auto Gen
P161 P162
D201
CONTROL PCB
P131IC221
IC231
X10125 Meg
Pin 1 (5V)Pin 2 (1.8V)Pin 3 (Gnd)
IC211
Pin 1 (Gnd)Pin 2 (3.3V)Pin 3 (4.95V)
P101
P111 IC241
IC201
2
FL111FL112
P811
VS Adj
VA Adj
P813
SMPS Test – Unplug P813, ground pin 24.If all supplies do not run when A/C is reapplied, disconnect P811 to isolate the excessive load. Use two (100W) light bulbs in series connected between Vs and Gnd to test under a load.
Y-SUSTAIN
Waveform TPOn Y-Drive PWB
SMPS POWER SUPPLY
To Ft IR J1
IR J2 goes to
Keys P
101
To Speakers(All Pins
8.5V)
A/C IN
Short across the two points labeled Auto Gen to generate a test pattern. (Note: Must Remove LVDS Cable).
* If the complaint is no video and shorting the points (AutoGen) causes video to appear suspect the Main board or LVDS cable.
With the unit on, if D201 does not blink on/off, check 5V supply. If present replace the Control PCB.If missing, see (To Test Control Board)
Software Upgrades n/c
SC101
R901
R502
To Test Control board: Unplug all connectors. Jump 5V from SMPS (P813 pin 23) to pin 1 of IC211. Observe LED. If it blinks, most likely Control PWB is OK. FL111 and FL112 should be checked. To check M5V route, disconnect P201 from the Y-SUS Board and connect a Jumper from Pin 1 of P811 (M5V) to Pin 10 P201 (5V).
The 5V is then routed to the Control Board via FS201, Ribbon Cable P101 on the Y-SUS to P111 and FL111 and FL112 on the Control Board for Control Board operation verification. Watch D201 for blinking to confirm.
Grayed Out ICs are located on Back
50PQ30 (50G2 Panel) CIRCUIT INTERCONNECT DIAGRAM50PQ30 (50G2 Panel) CIRCUIT INTERCONNECT DIAGRAM
FL111 FL1125V Fuses
To Check FG5V to the Y Drive, measure across capacitor C205 The voltage is supplied thru FL201.All Y-Drive voltages measured from FGnd.
Label STBY Run No Load17V 0V 17V 17VGnd Gnd Gnd Gnd12V 0V 12V 12VGnd Gnd Gnd Gnd5V 5V 5V 5V
Stby 5V 5V 5V 5V13, 14 Gnd Gnd Gnd15, 16 Gnd Gnd Gnd/nc5V Det 0V 4.8V 5VAC Det 4.6V 4.5V 5VRL On 0V 3.3V 0VVs On 0V 3.3V 0V
0V 3.3V 0V0V 0V 5V
P813
Pin 1 (Gnd)Pin 2 (3.3V)Pin 3 (4.95V)
IC221LVDS
Pin1, 23, 45, 67, 89~1112
13, 1415, 16
171819202122
Stby5V 5V 5.1V 5VKey On 0V
5.1V
5V2324
Auto GndM5 On FP
CFP
C
15V and 5V
FPC
FPC
FPC
FPC
FPC
Z-SUS Signal
Ribbon C
able
Ribbon C
able
LVDS
VaP122
17V
3.3VX-Drive RGB Signals
Z-Drive SignalsNote: IC221 (3.3V Regulator) routed out P162 (56~60) to Center X Board
400us 220Vp/p39V (AC) rms
To Z-SUBP301
Connect Scope between Waveform TP on Z board and GndUse RMS information just to check for board activity.
Main Power SW OutStand-By 5V shuts off
0V
1
TUNER
SIF 16
19 Video
(5V) 4
DIF + 12DIF - 13
(5V) 15
D502
IC302
IC5039V Reg
X1
X501IC1001
P1006 P1003LVDS
P1001
P1005
IC1
IC504HDMI
USB
IC805
A=5VA=0V
K=4.7V
D303
Q1002
Q303
IC203
D805
D804
Q801
K AZD601
IC202
IC304
IC201
21 3
2
B
C
EB
C
E
Q891
Q503
C A
D1001
Q302
Q1001
IC601
A
K
AD802IC803
IC802
Q892
A
K
A
D628
Q601
D627A
K
AB
C
EQ890
B
C
E
B
C
E
IC602
A
K
A
Q502
B
C
E
IC204
IC301
Q301
G
D
S
B
C
E
1
3
2
B
C
E
B CE
D633
3
21
4
1) 5.1V2) Gnd
5) 0V6) 5.1V
3) 3.2V4) 0V
IC804 USB
D806AK A
AK A
B
C
E
CA
A-C
8V
5V Reg
AnalogS (0V)G (3.3V)D (3.3V)
S (3.3V)G (0V)D (3.3V)
Q504Digital
12 3.3V3 5V
1.85V3.3V
0.6VIn
OutGnd8V
Reg 9V Reg
12VGndGnd
5.0V
3.8V
IC301 IC304 IC502 IC503 IC5051.8VMST
Reg3.3VST
On = Digital CH1.2VPVSB Reg
0V/3.3V0V/1.2V
IC502
Q504
Q501C
B E
GndOutIn
Out
D
G S
3
IC505
AudioAmp
L1013
L1012
SW301Reset IC1
12Mhz
25Mhz
L318
IC804
P206
VR401SET-DN
VR601SET-UP
P209
P205
P202
FS501 (17V)125V/4A
VR502-Vy+-
VSC TPR202
P208
P207
+
-Vy TPR201
-
FS2024A/250V
P201
VR501VSC
C214C213
IC503
IC502
IC303
T502
T501
FS20110A/125V
D502D503
D501
Q503
FS20110A/125V
M5V
17V
Va
Floating Gnd
Floating Gnd
Floating Gnd
Floating Gnd
P107
P109
P106
P201
P202P
203
Y-DriveLower
P101
P102
P103
Y-Drive Upper
P108
P209
C105+-
C205
+-
FL201FG5V
P208
P206
P109
P106
P107
12) Vscan (134V)11) VScan (134V)10) n/c9) FG5V (5V)8) FG5V (5V)7) FGnd6) Clk (0.9V)5) STB (2.3V)4) OC1 (2.2V)3) DATA (0V)2) OC2 (2.9V)1) FGnd
12) F
Gnd
11) O
C2
10) D
ATA
9) O
C1
8) S
TB7)
Clk
6) F
Gnd
5) F
G 5
V4)
FG
5V
3) F
Gnd
2) F
Gnd
1) F
Gnd
Y-DRIVE WAVEFORM
0VA
B
V Set-Up (Ramp)
Connect Scope between Waveform TP on Y-Drive and GndUse RMS information just to check for board activity.
VR601
V Set-Down
P101
P100
Z-SUS PWB
VZB AdjVR200
P101
FS102250V/4A
Vs fuseJ125
J27
FS100
FS100125V/10A
(M5V)
L200
P103
P105
P104
Z BiasWaveform
1~2) +5V (5.1V) 3~6) Gnd 7) n/c 8~9) ER_COM (90) 10) n/c11~12) +Vs
P101
VZB TP Top SideR271 or R272 To J125
FS101125V/4A
(15V)
31 2
2
IC305
P209
6) FGnd5) FGnd4) FGnd3) n/c2) VScan1) VScan
1) FGnd2) FGnd3) FGnd4) n/c5) VScan6) VScan
P209
P108
Note: Test points are not identified
on the board.Just above P108Just below P109
Micro/Video Processor
LVDS Processor
TUNER TU501TDVW-H103F
MAIN BOARD
3.0V
Gnd
4.9V
IC305
Reg3.3VMST
Tuner5V Reg
2
2 1
Tuner Tuner
VS to Z-SUS and Error Com from the Z-SUS
*Varies according to Panel Label
P201 Y-SUS
4mS
FG5V+ sideC105
1~3) 17V4~7) 5V
Vscan (*134V)
From FG
Pin Label Run 123456 0.3V
P100
7 0.4V
Z Enable
Z Ramp
8
1.7V
0.05V1.8V
91011
Gnd
17V+15V12 17V+15V
0.8V
Gnd
Z Bias
Z ER DnZ ER Up
Z SUS DnZ SUS Up
Gnd
Gnd
Gnd
0.2V
Gnd
* (Vs) Variable according to Panel
Label
Ribbon Cable
* (Vs) (Va) Varies according to Panel Label
5us150us -+
+-150V 5V
VR401
Va
3.3V 3.3V
Va
From Pin 2 IC221 (3.3V)P162
Pins 56~60
80VAC rms
1) 5.4V2) 4.95V3) 1.3V4) Gnd
IC302 1.3V VDDC REG
1) 5V2) Gnd3) 3.3V
5) 0.9V6) 0.9V7) 4.9V8) 3.6V
IC602, IC8021) 5V2) 4.6V3) 4.6V4) 3.3V5,6,7,8) Gnd
1,2) Gnd3,4) Gnd5,6) 3.29V7) Gnd8) 3.29V
IC201 NV RAM IC202 HDCP
Main Back Side RegulatorsMain Front Side Regulators
4) 0V5) 0V6) 5V
IC804 USB POWER 1,2) Gnd
3) 3.29V4) Gnd5,6) 3.29V7) Gnd8) 3.3V
To run the Z-SUS without the Y-SUS, jump VS from the SMPS to pin 11 or 12 P101.Jump M5V to pin 1 or 2 P101.Jump Audio 17V from SMPS to pin 11 or 12 of P100.Jump M5V to the Control Board.
P211Va out onPins 1~4
P3313.3V inon Pins
38, 43, 443.3V outPins 39~40
P212Va in
Pins 46~50
3.3V in onPins 1~5
516V P/P
Pin 1 (0.8V)Pin 2 (Gnd)Pin 3 (4.96V)Pin 4 (5.74V)
Pin 8 (3.3V)Pin 7 (Gnd)Pin 6 (Gnd)Pin 5 (4.91V)
IC241
Pin 1 (3.3V)Pin 2 (0V)Pin 3 (3.3V)Pin 4 (Gnd)Pin 5 (3.3V)Pin 6 (0V)Pin 7 (3.3V)Pin 8 (0V)
IC141
Pin 1~3 (17V)Pin 4~7 (M5V)
3.3V is not routed through this connector
X-Drive RGB Signals
*Varies according to Panel Label
Pin Label Run 1~3 Gnd Gnd4 n/c n/c
5~7
P202 / P122
*Va 60V
30
X-Drive RGB Signals
P121P212
P231 P232 P211P331
Diode CheckGndn/c
Open
*Vs
Gnd
M5V
nc
*VaGnd
Label9,10
86-74-53
1~2
P811 SMPSPin
Open
Gnd
2V
nc
OpenGnd
Diode
Diode CheckOpen
Diode Check1.33V
Diode Check0.79V (In Circuit)
1.2V (No Connectors)
Diode CheckOpen
(In Circuit)
Diode Check1.354V
(In Circuit)
Diode CheckOpen
(In Circuit)
Pin Label Run 1-2 Vs *193V3 nc nc
Gnd6-7 Va *60V
8 Gnd9,10 M5V 5.1V
Gnd
Gnd0.86V
Open
Open
4-5
Gnd
Gndnc
Diode
Pin Label Run 1~2
Vs *193V
3~6n/c
8~9 ER_COM *90V10
11~12
M5V 5.1VGnd
0.86V
Open
Open
7
Diode
Gnd Gndn/c n/c
n/c n/c n/c
P206 Y-SUS
17V turns on with Vs On command
12V turns on with RL On command
5V turns on with RL On command
5V Det from SMPS when 5V (9~11) turns on
Step 1
Step 3
Step 2
P303P302
X-Board Left
P205
P203
P204
400uS
FL101FG5V
Y-SUS and Y Drive Signals
M5V
M5V
GndGnd
P1001 Pin Label STBY123
Gnd Gnd0V
IR
Key 1
4.8VRun
Gnd3.3V
4.8V
4 0VKey 2 3.3V
Pin Label STBY567
Gnd Gnd0V
*PKEY
EyeSCL
0VRun
Gnd3.3V
0V
8 0VEyeSDA 3.3V
Pin Label STBY9
1011
5VST 5V0V
Gnd
3.3VST
GndRun
5V5V
Gnd
12 GndGnd Gnd
Pin Label STBY131415
LED W 0V0V
LED R
PWM
3.23VRun
3.23V0V
0V
*PKEY (pin 5) Normal 0V.If 5V Main Power Switch is Open. STBY5V turns off.
Pin Label Run 1 Gnd Gnd2 Gnd Gnd
3, 4
P101 (Side Key) to J2 (Ft IR)
Key 3.3V
GndGnd
Open
Diode Check
50PQ30 LVDS P1003
WAVEFORMS
WAVEFORMS:Waveforms taken using SMTP Color Bar input. All readings give their Time Base related to scope settings. All waveforms taken from the P1003.
NOTE: LVDS P1003 InformationThere are actually 12 pins carrying Video 2 pins are carrying clock signals (17 and 18) to the Control board. With high activity video, pins 21 and 22 would have signals present.
1
3
5
7
9
11
13
15
17
19
21
2
4
6
8
10
12
14
16
18
20
22
Connector P1003 Configuration
indicates signal pins.
23
25
24
26
P1003 LVDS (Pin 11) 2uSec / 718mV
P1003 LVDS (Pin 11) 5uSec / 718mV
P1003 LVDS (Pin 12) 2uSec / 565mV
P1003 LVDS (Pin 12) 5uSec / 565mV
P1003 LVDS (Pin 13) 2uSec / 479mV
P1003 LVDS (Pin 13) 5uSec / 479mV
P1003 LVDS (Pin 14) 2uSec / 594mV
P1003 LVDS (Pin 14) 5uSec / 594mV
P1003 LVDS (Pin 15) 2uSec / 648mV
P1003 LVDS (Pin 15) 5uSec / 648mV
P1003 LVDS (Pin 16) 2uSec / 414mV
P1003 LVDS (Pin 16) 5uSec / 414mV
P1003 LVDS (Pin 17) 2uSec / 717mV
P1003 LVDS (Pin 17) 5uSec / 717mV
P1003 LVDS (Pin 18) 2uSec / 624mV
P1003 LVDS (Pin 18) 5uSec / 624mV
P1003 LVDS (Pin 19) 2uSec / 702mV
P1003 LVDS (Pin 19) 5uSec / 702mV
P1003 LVDS (Pin 20) 2uSec / 563mV
P1003 LVDS (Pin 20) 5uSec / 563mV
P1003 LVDS (Pin 21) 2uSec / 82mV
P1003 LVDS (Pin 21) 5uSec / 82mV
P1003 LVDS (Pin 22) 2uSec / 140mV
P1003 LVDS (Pin 22) 5uSec / 140mV
50PQ30 MAIN (BACK SIDE) SIMICONDUCTORS
IC201 NVRAM IC304 1.8VMST IC505 5V (Tuner) IC602 RS232 RAM Q1001 Pow Down Q502 Video Buffer Q890/2 HDMI1/2Pin Pin Reg Pin Reg Pin Pin IC1001 Pin Pin Hot Swap[1] Gnd [1] 0.6V [1] 3.8V [1] Gnd [B] 0V [B] 0.6V [B] 0V[2] Gnd [2] 1.85V [2] 5V [2] Gnd [E] Gnd [E] 2.1V [E] Gnd[3] Gnd [3] 3.28V [3] 8V [3] Gnd [C] 3.3V [C] Gnd [C] 0V[4] Gnd [4] Gnd[5] 3.28V [5] 4.5V Q302 Reset Q503 SIF Buffer Q891 HDMI3/4[6] 3.28V IC601 RS232 Control [6] 4.5V Pin Pin Pin Hot Swap[7] 0V IC305 3.3VMST Pin [7] 3.3V [B] 3.3V [B] 2.3V [B] 0V[8] 3.28V Pin Reg [1] 3.3V [8] 4.5V [E] 3.2V [E] 3.0V [E] Gnd
[1] Gnd [2] 5.4V [C] 0V [C] Gnd [C] 0VIC202 HDCP [2] 3.3V [3] 0V IC802/3 HDMI1/2
Pin [3] 5V [4] 0V Pin Q303 5V MST Switch Q504 3.3V PVSB[1] Gnd [5] (-5.57V) [1] Gnd Pin Pin Switch[2] Gnd [6] (-5.56V) [2] Gnd [S] 4.9V [S] 3.3V[3] 3.28V [7] (-5.56V) [3] Gnd [G] 0V/4.9V [G] 3.3V/0V[4] Gnd IC502 1.2V PVSB [8] 0V [4] Gnd [D] 5V/0V [D] 0V/3.27V[5] 3.28V On Digital CH / Off Analog [9] 3.3V [5] 4.6V On Digital CH / Off Analog On Digital CH / Off Analog[6] 3.28V Pin Reg [10] 3.3V [6] 4.6V Q501 3.3V VMST[7] 0V Gnd Gnd [11] n/c [7] 3.3V Pin Switch Ctl Q601 RS232 TX[8] 3.28V In 0V/3.3V [12] n/c [8] 4.6V [B] 0V/0.6V Pin Buffer
Out 0V/1.2V [13] n/c [E] 0V [B] 0.6VIC301 5VST to [14] 5.6V [C] 3.3V/0V [E] Gnd
3.3V VST [15] 0V On Digital CH / Off Analog [C] 0VPin Reg [16] 3.3V[1] Gnd D1001 For IC1001 3.3V D627 RS232 TX Noise D628 RS232 RX Noise D633 RGB B+[2] 3.3V Pin Speedup Pin Suppression Pin Suppression Pin[3] 5.0V A 3.27V A (-5.3V) A 0V A 0V
C 3.3V C 0.1V C 0V C 4.5VA Gnd A Gnd A 5.0V
50PQ30 MAIN (FRONT SIDE) SIMICONDUCTORS
IC302 1.3V VDDC IC804 USB 5V Q301 Turns on D303 Reset D805 HDMI2 PWRPin Pin Pin Q303 Pin Pin[1] 5.47V [1] 5.0V [B] 0.54V A 3.18V A 5.1V[2] 4.89V [2] Gnd [E] Gnd AC 3.28V C 4.65V[3] 1.3V [3] 3.2V [C] 0V C 3.28V A 0V[4] Gnd [4] 0V[5] 0.9V [5] 0V Q801 HDMI CEC[6] 1.19V [6] 5.1V Pin Amp[7] 4.85V [1] 0V ZD601 Wired Remote TXD806 HDMI3 PWR[8] 3.55V [2] 3.16V Pin Protect Pin
[3] 3.27V A 3.27V A 5.1VIC503 9V Reg IC805 HDMI3 EDID [4] 3.28V C 3.3V C 4.65V
Pin Pin A 0V[1] 12V [1] Gnd Q1002 Pow Down[2] Gnd [2] Gnd Pin IC1001[3] 8V [3] Gnd [B] 0.6V
[4] Gnd [E] Gnd[5] 4.65V [C] 0V[6] 4.65V[7] 3.31V[8] 4.65V
134 Preliminary Information 50PQ30
This concludes the Presentation
Thank You
End of PresentationEnd of Presentation