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Milano – Sept. 11th 2014
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Tutorial:
PREESM - Dataflow Programming of
Multicore DSPs
Karol Desnos, Clément Guy, Maxime Pelcat
EDERC 2014 Conference, Milan, September 11th
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PREESM
http://preesm.sourceforge.net/website
• Eclipse-based Tool
• Written in Java and Xtend
• Using
– Eclipse Modeling Framework,
– Eclipse Graphiti,
– Eclipse CDT
• Compatible and tested on Linux and Windows
• Release 2.0.0 on sept 2014
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PREESM
• Started in 2007
• In collaboration with Texas Instruments France
• 16 contributors
• Academic collaborations
– LAAS
– University of Maryland
– ENIS
– Abo Akademi
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PREESM Workflow
• Preesm offers Editors
– Algorithm
– Architecture
– Scenario
• And can run a Workflow
– Transformations of models
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PREESM Workflow
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PREESM Workflow
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PREESM Workflow
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PREESM Workflow
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PREESM Workflow
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PREESM Workflow
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PREESM Workflow
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PREESM Workflow
• A workflow runs typically within a few tens of seconds
• Algorithm: typically 10-1500 actors
• Architecture: typically 1-20 cores
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Examples for the tutorial
Algorithms
Sobel filter: edge detection
Stereo matching: disparity map
Architectures
Intel i7 quad-core
TI Shannon (C6678)
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Rapid prototyping process
Algorithm
modeling
Architecture
modeling
Scenario
selection
Workflow
composition
Workflow
execution
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Algorithm modeling
PiSDF
Parameterized
Dynamism
interfaced
Hierarchy & Composition
Synchronous Data-Flow
Actors & Fifos
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Algorithm examples
Sobel filter
Stereo matching
Read Display Filter
Size
1 Size Size
Size
Size
Size
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Arcitecture modeling
S-LAM
System-Level Architecture Model
Processing elements
Communication nodes
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Architecture examples
Intel i7 quad-core
TI Shannon (C6678)
DDR3
core1
core2
core3
MSMC
core5
core6
core7
5.3 GB/s
16 GB/s
core4 core8
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Scenario selection
Link between algorithm & architecture
Execution times
Execution constraints
Simulation information
Enables separation of concerns
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Scenario example
Sobel filter on Intel i7 quad-core
Read 1
core1
Size
190000
cycles = 101376
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Workflow composition
Rapid prototyping tasks
Scheduling
Code generation
Memory optimization
Vizualization tools
…
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Workflow examples
2 workflows
Scheduling
Scheduling + code generation
Single-rate
transformation Hierarchy
flattening
Mapping &
scheduling
Algorithm
Architecture
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Let’s complicate things
Small application on CPU
What about more realistic cases? Execution on DSP (C6678)
Stereo matching algorithm
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PREESM for the DSP Programmer
Rapid prototyping for multicore DSPs High-level modeling of parallelism
Automatic mapping
Automatic scheduling
Automatic code generation
Advanced memory optimization
Bridges to UML MARTE, SDF3 & Orcc
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PREESM is constantly improving
Research tool
New models & features
Regular enhancements
Incoming features Parameter-dependent timings
Distributed memory management
Bridge to DIF from Univ. of Maryland
GUI enhancements (workflow scripts)
…
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preesm.sourceforge.net/website/ Twitter: @PreesmProject
Multi-Core Scheduling
Static Code Generation
Program Program Program
Program
Hierarchical Algorithm Model
Multi-core Heterogeneous Model
ScenarioA
D B
E
C
Simulationo1
o2
A B C
D E
Deployment
Thank you for your attention