uli schäfer 1 production modules status plans jem: status and plans
Post on 21-Dec-2015
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Uli Schäfer 2
88 pair
V M E
each 165 pins FIO 60 bit @ 80Mb/s
TTCDec
System ACE
3 x 40 bit @ 40 Mb/s
DES
DES
DES
DES Input 2 B 1 A 0 V
60
60
40
Input 5 E 4 D 3 C
Input 8 H 7 G 6 F
Input --
10 X 9 W
DAQ/VME
To JMM
TX
Jet
R
S
T
U
Sum
DAQ
To SMM
ROI
Opto
clock mirror
TX Opto
CAN
CM
RM
4 IMs • Sum processor
XC2V2000• Jet processor
XC2V3000• 4 input modules (IM)
v1.1 (XC2V1500, SCAN921260)
• TTCdec module• Control Module (CM)
v1.3• CAN• VME control• Fan-out of
configuration lines• G-link readout module
(RM) v1.2
JEM1.3 (production)
Uli Schäfer 3
• Minor modifications of JEM wrt pre-production modules: silk screen, pads for CLKdes2 terminators, reduced bypass capacitance on 3.3V supply due to crate supply oscillations
• 4 pre-production + 41 production = 45 fully functional modules to be used on ATLAS
• 32 in JEP crates + 13 spares !
Yield so far:• 2 defective JEMs found : NO BGA issues, just one short on
connector and one chip mounted in wrong orientation• 8 input modules with BGA issues (replace?)• 7 input modules with minor issues (rework?)• small numbers of defective control and G-link modules
From pre-production to production
Uli Schäfer 4
• Many production issues with prototypes and pre-production
• All production steps have taken far longer than scheduled, minimum a factor of two
• Problems were reported only shortly before delivery dates, even if they were known for quite a while
• 3 iterations of input module PCB (impedance issues and others)
• 2 iterations of JEM PCB (impedance)• Wrong component (SMB voltage sensor) mounted on
control module• Inverted tantalum on control module rework• Insufficient cleaning and drying of input modules leading
to malfunction rework
Module production story
Uli Schäfer 5
• Record electronic serial number• JTAG B/Scan
• Input modules• Control modules• JEM main boards
• Flash and check CPLDs and CAN controller• Basic LVDS link tests : lock / no lock to 40MHz square
Acceptance tests (Bruno)
Uli Schäfer 6
Interface tests only, using counter patterns (linear ramp)• Error detection mainly in firmware• Basically using features built into production firmware for timing
calibration
Interfaces tested:• LVDS inputs - ramp pattern required for timing calibration (PPM!)• FIO - pattern detection required for timing calibration (not yet
included in jet production firmware)• DAQ and ROI links - software error detection• CMM - parity detection, pattern generation (so far) in dedicated
firmware
For details see Markus / Andrea
Full system tests with ROD readout at CERN only…
“System” tests, Mainz trigger lab
Uli Schäfer 7
• ship 8 crate-tested JEMs on March 19 to make a full crate of JEMs available for system tests at CERN
• continue production tests in Mainz (~ 2 weeks)• delay further module shipment until crate situation at
CERN becomes clear• full JEP system tests at CERN as soon as infrastructure
complete
Meanwhile: cabling, crate issues, firmware, software…
Plans