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TM

Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009.

Ultra-Low Voltage DC-DC Converter Capability

July, 2009

John Pigott, Analog IC DesignKevin Parmenter, Applications Engineering Manager

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009. 2

Agenda

►Introduction – what challenges are we solving?►Applications

• Solar, Thermal, Chemical …►Issues of parallel – series connections►Overview of demonstrated solution

• Circuit• Process• Efficiency – technology

►Technical detail of IC & circuits►Q & A


What Are We Introducing?

Up to 90% conversion efficiency

82% in solar applications, 90% in others

Presently most suitable for 100 mW to 1 W applications

Lowest startup and operating voltage DC-DC converter demonstrated

320 mV or lowerSMARTMOS™10W 130 nm enables the ULV startup and operating efficiency

Low parasitic losses enabled by custom flip chip on lead frame (FCOL) package

A new power conversion capability for solar applications and demonstration of an ultra-low-voltage DC-to-DC converter IC designed to enable industry-leading efficiency for

single-cell photovoltaic DC-DC converters

Ultra-low-voltage converter

Advanced technology

High energy efficiency


Freescale’s Analog Technology Leadership

►Freescale offers more than 50 years of innovation in semiconductors and more than 25 years in the high-performance analog market

►Freescale ranked #7 in global analog sales (Source: Databeans 2007)►Consumers expect everything to be intelligent and connected

• Need high-performance analog circuitry► Industry-leading, differentiated SMARTMOS process technology

• Integrates digital, power and standard analog functions in a single device►Highly integrated System on Chip (SoC) and System in Package (SiP)

solutions►Development tools and 24/7 customer support►Freescale has a compelling portfolio of analog and power management

solutions for the consumer, industrial and automotive markets


Target Applications for ULV Power Conversion Technology

►Power conversion and energy recovery applications involving ultra-low voltages

►Energy-harvesting applications, such as thermoelectric, mechanical scavenging systems, and parasitic power

►Potential applications include: • Solar-powered battery chargers • Trickle chargers for automotive systems • Chargers for cell phones and laptops • Remote data acquisition and monitoring• Self-powered wireless transponders• Industrial HVAC systems • PV-based traffic signals, ocean markers, airports • Solar-powered rural lighting products


Practical Issues With Series – Parallel Connections

►Connection in series allows boosting the low voltage sources to more common voltage levels; however:

• Some sources either will not series or behave unstably when you do• Example solar cells in series – increased voltage, but current is limited

by lowest output (shading/temperature/mismatches) in the series string• Parallel – increases current – however voltage sources fight each other

and will not current share well – power is limited by the lowest voltage source. Parallel connections will not increase voltages

• Electrochemical sources – it may be impossible or very cumbersome to series connect

• Thermopiles are often series connected – increases physical size, mechanical complexity and cost

• Architecture of input-regulating converter for boost makes it easier to parallel outputs if necessary


Challenges of Ultra Voltage Power Conversion

►Ultra Low Voltage 250 mV – 700 mV►Interconnect voltages drops – packaging parasitics AC & DC can

become a significant source of loss►Process technologies which operate below 0.7 volts and allow

design of high performance circuits►Conversion efficiency–if you can make it work at all►Low quiescent current►Power control topology—power-limited sources have a different

requirement for the control loop architecture►Design techniques at low voltages ►Integrating complete boost conversion

• Demonstrated solution has only 3 external components—input decoupling capacitor, output decoupling capacitor and an inductor


Addressing Application Needs

Preserves a higher amount of power being converted for delivering more energy to the load.

Power efficiency

BenefitTechnology Attribute

Provides low DC resistance and low inductance helping with conversion efficiency. Small size enables beneficial for products.

Packaging

Enables the utilization of a low-voltage source such as a single photo cells rather than requiring an array. Thermoelectric or other low voltages sourced can be converted directly. Autonomous start without external sources.

Ultra-low voltage start up and operation

• Single solar cell, or smaller thermopile stack simplifies mechanical construction • Single solar cell much less sensitive to shading, cell balancing• High efficiency reduces solar cell area or thermopile size needed• Very small size (package is < 6 mm²) enables smart dust applications

Opens up new possibilities in power conversion previously unavailable or discounted


Demonstrated Device

3 x 2 mm 10-pin DFN package

Freescale

ULV DC/DC Converter

LoadPower Source

NC


Power Conversion Technology Demonstration

This is a technology demonstrator, not a released product.

Freescale is actively seeking input from potential users to determine precisely what features are desirable in a product.


Single Solar Cell Operation

►VIN = 384 mV►IIN = 1.36A►VOUT = 4.04 V►IOUT = 103 mAEfficiency: 80%


Efficiency Measurements (VIN 0.45 V and 0.7 V)

Efficiency vs. Output Power

75%

80%

85%

90%

95%

0.0 0.2 0.4 0.6 0.8 1.0 1.2

Output Power (W)

Effic

ienc

y

VIN ~ 0.45 VVIN ~0.7V


Demonstration IC in PV Application

► Photovoltaic (PV) and other applications with power-limited sources often cannot be used in a DC-DC converter system with an output-regulated control loop

• This is because a DC-DC converter with a constant load (constant power load) appears to have a negative input impedance, and when the power available from the source is less than the connected load power, the system becomes unstable and the input voltage collapses

► This demonstration IC includes two features to prevent this

• Fixed maximum duty cycle (approximately 93%) which makes the regulator act as a DC transformer (fixed ratio between VOUT and VIN. This does not have a negative input impedance and therefore is stable

• Input Regulator (VIN-SET) which regulates the duty cycle so that the input voltage does not fall below a desired threshold. This connection can also be used as part of a Maximum Power Point Transfer (MPPT) control loop

Freescale

ULV DC/DC Converter

LoadPower Source

+

-

.

R1

Cboot

Bootstrap

Oscillator

Boost Driver

R2

+

-

.

+

-

.

VINVref1

Test Modes

93% Max

gm

UVLOCrossove

r

GND

Internal

Duty Cycle

7mA

LED Driver

CELLGND

VOUT

LED

LX

Bias

VIN-SET

(0.315V)Vref2

System Control

RampGenerator

M2M1

N/C


Demonstration IC Under Source Power-Limited Conditions

VIN, IIN and VOUT vs. Load; VSOURCE ~ 1.05 V(This version of the IC has a fixed 86% duty cycle)

0

1

2

3

4

5

6

0 50 100 150 200 250 300Load (mA)

Vout

(V)

0

0.3

0.6

0.9

1.2

1.5

1.8

Vin

(V),

Iin (A

)

VOUT reaches its minimum(2.8 V)

VIN reaches its minimum(0.64 V)

Light-Load VOUT

IIN reaches its maximum(1.6 A)

Efficiency (76-90%)

Pulse SkippingVOUT ~ 5.5 V

86% Fixed Duty CycleVOUT:VIN = 5.5:1

Constant PowerVIN = 0.64 V


MPPT Demo Charging Li-Ion

► MCU is powered from VOUT (2.7..5V)

► MCU monitors load current (via GND R and 10-bit ADC)

• Could use FET RDSON ?► Opamp + FET are current source to

adjust VIN/VINSET value• VIN = VINSET + I*R2• VINSET ~ 0.315V• I = VPWM / R4• Adjustment via PWM• MCU searches around VIN to get

peak current in R1► May need additional comparator to

detect when VDD < VLOAD and prevent discharge

► Overcharge can be stopped by high current at VINSET – will force a high VIN which is not possible with solar cell DC/DC will stop

► Algorithm and implementation will be integrated in future generation of ULV DC/DC

Freescale

ULV DC/DC Converter

Power Source

VDD

VSS

R2

R1

VLOAD

VDDVSS

+

-

.

R3

R4 MC

9S08

QD

4


Demonstration IC Description

►Internal 8x charge pump generates over 2 V to power bootstrap circuits

• Fully internal charge pump runs at 10 MHz Bias, Logic, control all run from VIN of 0.32 V

►Bootstrap circuit pulses inductor at ~ 15 kHz to drive VOUT to ~ 2.5 V

• Load is disconnected at this stage►UVLO Crossover circuit detects VOUT reaching 2.9 V and turns on

main DC/DC converter• Main DC/DC is powered from the output voltage, so there is no

fundamental limit to how low VIN can go after startup• Practically, there is little use in a DC/DC system which operates at an

input voltage of lower than 50% of the open circuit voltage (because maximum power transfer point has been crossed)


Simplified Block Diagram

Ultra Low Voltage Boot Driver

0.32V; 10-50µA

PWM Controller and

Regulator3-5V

160µA – 6mA

VREF

EnableDisable

Vin0.3V – 1.0V


Potential Low Power, Ultra-Low Voltage System

►This technology is scalable to lower and higher power systems►Potential capability of an ultra low power energy harvesting system could

be as follows:►Bias

• 10 µA 5 µA; perhaps with some limitation on high temperature operation►Charge Pump

• 40 µA 10 µA Slower startup; VOUT limited to 3.3V

►DC/DC• Pulse-skipping DC/DC converter with > 85% conversion efficiency

►Capability• 0.32V startup, 3.3 or 4.2 V output• < 10 µW quiescent consumption• 3.3V output, ~ 20mW • Suitable for indoors PV or TEG systems


Custom Leadframe

Freescale Bumped Die

FCOL: Custom LF Concept

Carsem FCOL Datasheet


SMOS10W: The Most Comprehensive Portable Power Management Technology

SMARTMOS10Voltage

• 28V NLDMOS for serial LED backlight

Digital• High speed for USB2.0• Low leakage for coin cell life

extension• >100K gates/mm² for size

reduction

Power• 125°C leakage 20x lower

for extended battery life• Ron*Area 60% lower for

size reduction

Analog• Mismatch 0.3-0.5x on FETs,

resistors & caps for analog shrink & audio quality.

Memory• MRAM option with unlimited

endurance

Trimming• Low current fuses for

customization, calibration and trimming

Isolation• P- substrate for improved

ground noise immunity• Buried layer-isolation

structure for signal isolation and latch-up immunity


Q&A

►Thank you for attending this presentation. We’ll now take a few moments for the audience’s questions and then we’ll begin the question and answer session.

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