ultralow noise, high rejection - analog devices · ultralow noise, high rejection. low dropout...

Analog Devices Introduces the World’s Lowest Noise LDOThe ADM7154/ADM7155 are ultralow noise LDO (low dropout) regulators for RF (radio frequency) signal devices. The ADM7154/ADM7155 operate from 2.3 V to 5.5 V, provide up to 600 mA of output current, and support output voltages from 1.2 V to 3.3 V. The LDOs achieve an output NSD (noise spectral density) of 1.5 nV/√Hz above 100 kHz, which significantly reduces VCO (voltage controlled oscillator) phase noise in point-to-point microwave radios, satellite communications, defense electronics, and other wideband applications.

ADM7154 noise spectral density.

Features

• VIN range: 2.3 V to 5.5 V

• Fixed/adjustable output voltage range: 1.2 V to 3.3 V

• IOUT max: 600 mA

• Low noise (CBYP = 1 μF)

• 0.9 μV rms total integrated noise from 100 Hz to 100 kHz

• 2 nV√Hz above 4 kHz

• Power supply rejection ratio (PSRR):

• 90 dB from 1 kHz to 100 kHz

• VIN ∙ 3.8 V, VOUT ∙ 3.3 V @ 600 mA

• 58 dB at 1 MHz

• VIN ∙ 3.8 V, VOUT ∙ 3.3 V @ 600 mA

• 8-lead LFCSP and 8-lead SOIC packages

Applications

• Regulated power noise sensitive applications

• RF mixers, phase-locked loops (PLLs)

• Voltage controlled oscillators (VCOs)

• PLLs with integrated VCOs

• Communications and infrastructure

• Cable digital-to-analog converter (DAC) drivers

• Backhaul and microwave links

Ultralow Noise, High RejectionLow Dropout Regulators

analog.com/LDO

NO

ISE

SP

EC

TR

AL

DE

NS

ITY

(nV

/√H

z)

FREQUENCY (Hz)

1M0.1 1 10 100 1k 10k 100k0.1

1

10

100

10k

1k

NOISE FLOOR1.0�F3.3�F10�F33�F100�F330�F1000�F

http://www.analog.com/ADM7154


http://www.analog.com

http://www.analog.com/LDO

Ultralow Noise LDOs

ADM7150, ADM7151, ADM7154, and ADM7155

PLL/VCO apps diagram.

ADF5355 VCO noise, powered by ADM7150.

Ultralow Noise LDO Selection Table

Part NumberVIN Min

(V)VIN Max

(V)

VOUT Options or Adj Range

(V)

IOUT (mA)

PSRR @ 100 kHz

(dB)

PSRR @ 1 MHz (dB)

RMS Noise @ 100 Hz to 100 kHz

(𝛍V rms)1

Noise Spectral Density 100 kHz

(nV/√Hz)

Dropout @ Rated IOUT Typ (mV)

Total Accuracy Max (∙%)

Package

ADM7150 4.5 16Fixed:

1.5 to 5.0800 94 62 1 2 600 2

3 mm × 3 mm, 8-lead LFCSP, 8-lead SOIC

ADM7151 4.5 16Adjustable: 1.5 to 5.1

800 94 62 1 2 600 23 mm × 3 mm, 8-lead LFCSP, 8-lead SOIC

ADM7154 New 2.3 5.5Fixed:

1.2 to 3.3600 90 58 1 1.2 120 2

3 mm × 3 mm, 8-lead LFCSP, 8-lead SOIC

ADM7155 New 2.3 5.5Adjustable: 1.2 to 3.3

600 90 58 1 1.2 120 23 mm × 3 mm, 8-lead LFCSP, 8-lead SOIC

HMC976LP3E 3.3 5.5 1.8 to 5.1 400 45 30 1.5 3 300 2 3 mm × 3 mm, 16-lead LFCSP

1 Noise independent of fixed output voltage.

12VIN 5V

3.3V

ADM7150VVCO

VDDADM7150

PLL/VCO

(ADF5355)

LDO

LDO

GND

GND

GND

3.8V 3.3VADM7154 CLOCKING

(AD9525)

GND

LDO

GND

12V 5VADM7150

GND

LDOVCO

−50

−70

−170

−150

−130

−110

−90

1k 10k 100k 1M 10M

VC

O P

HA

SE

NO

ISE

(dB

c/H

z)

FREQUENCY OFFSET (Hz)

PS

RR

(dB

)

FREQUENCY (Hz)

10M1 10 100 1k 10k 100k 1M−140

−120

−100

−80

−60

−40

−20

01�F10�F100�F1000�F

Clocking apps diagram.

ADM7154 PSRR vs. frequency, VOUT ∙ 3.3 V, 400 mA load, 500 mV headroom.

2 | Low Dropout Regulators









http://www.analog.com/HMC976LP3E

Ultralow Noise Quad Output LDOs

HMC860LP3E and HMC1060LP3EThe HMC860LP3E and HMC1060LP3E are ultralow noise, quad-output linear voltage regulators targeted at high performance applications requir-ing superb power supply isolation. Maximum 240 mA and 500 mA of current, respectively, distributed between four independent outputs, enable the HMC860LP3E and HMC1060LP3E to supply all of the power needs of wideband PLL with integrated VCO products, such as the HMC830LP6GE. An integrated PTAT (proportional to absolute temperature) feature, enabled via an external pin, allows the HMC1060LP3E to scale the supply voltage with temperature in order to maximize phase noise and output power perfor-mance of wideband with integrated VCO products, as well as other devices powered by the HMC1060LP3E.

Ultralow Noise LDO Selection Table

Part NumberVIN Min

(V)VIN Max

(V)


(V)

IOUT (mA)

PSRR @ 100 kHz

(dB)

PSRR @ 1 MHz (dB)


(𝛍V rms)


(nV/√Hz)


Regulated Outputs

Package



PH

AS

E N

OIS

E (d

Bc/

Hz

)

OFFSET FREQUENCY (Hz)

100 1k 10k 100k 1M 10M 100M−200

−150

−100

−50

0

HMC507LP5E VCO POWERED BY A LOW NOISE LABORATORY POWER SUPPLY

HMC507LP5E VCO POWER BY HMC1060LP3E

FREQUENCY (Hz)

100 1k 10k 100k 1M 10M0.1

1

10

100

1kVR1 = 100mAVR2 = 50mAVR3 = 50mAVR4 = 300mA

NO

ISE

SP

EC

TR

AL

DE

NS

ITY

(nV

/√H

z)

PLL

90°0

RFIN

REFCLOCK

5V3.3VVCP

5V3.

3VV

CP

HMC830LP6GEWIDEBAND PLL WITH VCO

LOW PHASE NOISE (141dBc/Hz@ 2GHz AND 10kHz OFFSET)

HMC597LP4EWIDEBAND DIRECT DEMODULATOR

100MHz TO 4000MHzHIGH LINEARITY 25dBm OIP3 AND 60dBm IIP2

55dB SIDEBAND SUPPRESSION

HMC900LP5EDUAL BASEBAND LPF

3.5MHz TO 50MHz, 3dB BW30dBm OIP3

HMC960LP4EDUAL CHANNEL VGA

DC 100MHz30dBm OIP3

HMCAD1520MULTICHANNEL ADC

12-/14-BIT @ 320MSPS/105MSPS

PLL

HMC830LP6GEWIDEBAND PLL WITH VCO

25MHz TO 3000MHzLOW JITTER

(112fs RMS JITTER)

HMC860LP3E

HMC976LP3E

HMC860LP3E

ADC

ADC

FPG

A/D

SP

HMC1060LP3E Features

• Ultralow noise density: 3 nV/√Hz at 10 kHz, 7 nV/√Hz at 1 kHz

• High PSRR: 80 dB at 1 kHz; 60 dB at 1 MHz

• Four adjustable voltage outputs:

• VR1: 100 mA at 1.8 V to 5.2 V

• VR2 and VR3: 50 mA at 1.8 V to 5.2 V

• VR4: 300 mA at 1.8 V to 5.2 V

• Optional proportional to temperature (PTAT) output voltages: 7%/125°C

• Thermal protection

• Low power-down current: <1 μA

• 16-lead, 3 mm × 3 mm SMT package: 9 mm2

Applications

• Ultralow noise frequency generation (PLLs, VCOs, PLLs with integrated VCOs)

• RF and mixed-signal supply

HMC1060LP3E vs. typical low noise laboratory power supply.

HMC6383 evaluation development kit block diagram.

HMC1060LP3E noise spectral density vs. frequency.

analog.com/LDO | 3





http://www.hittite.com/products/view.html/view/EKIT01-HMC6383


High Voltage LDOs

ADP7118, ADP7142, ADP7112, ADP7102, ADP7104, and ADP7105

ADC/AMP applications diagram.

Isolated ADC/AMP applications diagram.

ADP7118/ADP7142/ADP7112*.*The ADP7118/ADP7142/ADP7112 architecture allows any fixed output voltage to be set to a higher voltage with an external voltage divider.

High Voltage LDO Selection Table

Part NumberVIN Range

(V)VOUT Fixed

(V)VOUT Adj

Range (V)IOUT

(mA)Soft Start

Power Good


(𝛍V rms)1

PSRR @ 100 kHz

(dB)

PSRR @ 1 MHz (dB)

Package

ADP7118 New 2.7 to 20 1.2 to 5 1.2 to 19 200 Yes No 11 68 50 2 mm × 2 mm, 6-lead LFCSP, 8-lead SOIC, 5-lead TSOT

ADP7112 New 2.7 to 20 1.2 to 5 1.2 to 19 200 Yes No 11 68 50 1 mm × 1.2 mm, 6-ball WLCSP

ADP7142 New 2.7 to 40 1.2 to 5 1.2 to 39 200 Yes No 11 68 50 2 mm × 2 mm, 6-lead LFCSP, 8-lead SOIC, 5-lead TSOT

ADP7102 3.3 to 20 1.5 to 9 1.22 to 19 300 No Yes 15 60 40 3 mm × 3 mm, 8-lead LFCSP, 8-lead SOIC

ADP7104 3.3 to 20 1.5 to 9 1.22 to 19 500 No Yes 15 60 40 3 mm × 3 mm, 8-lead LFCSP, 8-lead SOIC

ADP7105 3.3 to 20 1.8, 3.3, 5 1.22 to 19 500 Yes Yes 15 60 40 3 mm × 3 mm, 8-lead LFCSP, 8-lead SOIC


VIN = 9V VOUT = 5VVIN

GND

PACKAGE: 2mm × 2mm LFCSP1mm × 1.2mm WLCSP (ADP7112)

ADP7118: 20V/200mAADP7112: 20V/200mA

ADP7142: 40V/200mA

EN

CIN2.2�F

COUT2.2�F

ONOFF

CSS1nF

VOUT

SENSE/ADJ

SS

ADP5070/ADP5071

ADP7118LDO

+16.5V

5VIN

−16.5V

+15VOUT

+15V

−15VOUT−15V

AMP/FILTER ADC

REF1.8V

+15V

−15V

ADP7182LDO

ADM7160LDO

VOUT = 5VVIN = 9V

PG

VOUTVIN

PG

GND

SENSE

EN/UVLO

RPG100k�

R2100k�

R1100k�

COUT1�F

CIN1µF

ONOFF

++

PACKAGE: 3mm × 3mm LFCSP

ADP7102: 20V/300mAADP7104: 20V/500mA

VIN = 9V VOUT = 5V

100k�

100k� 100k�

COUT1�F

CIN1�F

PG

VOUTVIN

PG

SSGND

SENSE

EN/UVLO

CSS

ONOFF

++

PACKAGE: 3mm × 3mm LFCSP

ADP7105: 20V/500mA

24VINFLYBACK OR

AC RECTIFIER

3-TAPTRANSFORMER

−18V

−18V

+18V

−18V

+18V

18V

5V

2.5V

2.5V

−20V

DAC

REF

AMP/FILTER

24V

7V ADP7118LDO

ADM7160LDO

ADP7142LDO

ADP7182LDO

ADP7102/ADP7104. ADP7105.


http://www.analog.com/ADP7118



http://www.analog.com/ADp7102





http://www.analog.com/adp7142




Low Noise LDOs

ADM7160 and ADP7182

Nonisolated Σ-∆ ADC bipolar applications diagram.

Low Noise LDO Selection Table

Part Number

VIN Min (V)

VIN Max (V)

VOUT Options or Adj

Range (V)

IOUT (mA)

PSRR @ 100 kHz

(dB)

PSRR @ 1 MHz (dB)

RMS Noise @ 100 kHz to 100 kHz (𝛍V rms)1


(nV/√Hz)



Package

ADM7160 2.2 5.5 1.1 to 3.3 200 54 46 9 25 150 –2.5/+1.52 mm × 2 mm,

6-lead LFCSP, 5-lead TSOT

ADP7182 –2.7 –28 –1.22 to –27 –200 45 32 18 50 185 –3/+25-lead TSOT,

2 mm × 2 mm, 6-lead LFCSP, 3 mm × 3 mm, 8-lead LFCSP


INTEGRATED AMP

ADM7160LDO

ADP7182LDO

ADM660INVERTING

CHARGEPUMP

ADC—AD7175-28-CHANNEL, 24BIT—�-�

−3.3V

3.3VIN

−1.8V

1.8V

V+

+IN

V−

−IN

EXTERNAL AMP

AMP

ADM7160LDO

ADP7182LDO

AD7176

ADM660INVERTING

CHARGEPUMP

ADC—AD71768-CHANNEL, 24BIT—�-�

−2.5V

2.5V

−5V

5VIN

V++ IN

− INV−

AD7175-2

ADM7150LDO

PLLADF4355-2

AD9129RF DAC

ADP7182−VE LDO

−1.5V

−6V

6VIN 5.0V

1.8VADM7150

LDO

ADM660INV CP

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

0

10 100 1k 10k 100k 1M 10M

PS

RR

(dB

)

FREQUENCY (Hz)

ILOAD = 200mAILOAD = 100mAILOAD = 50mAILOAD = 10mAILOAD = 1mA

0

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

10 100 1k 10k 100k 1M 10M

PS

RR

(dB

)

FREQUENCY (Hz)

ILOAD = −200mAILOAD = −100mAILOAD = −10mAILOAD = −1mA

ADM7160 PSRR vs. frequency and load current, 1 V headroom, VOUT = 3.3 V. ADP7182 PSRR vs. frequency, VOUT = −1.22 V vs. different load currents ( ILOAD), VIN = −2.7 V.

AD9129 RF DAC featuring ADP7182.

analog.com/LDO | 5





http://www.analog.com/AD9129


Low VIN, High Current LDOs


Powering AD9680 high speed ADC.

Powering AD9361/AD9364 RF agile transceivers.

Low VIN, High Current LDO Selection Table

Part Number

VIN Range (V)


(V)

IOUT (mA)

Soft Start

Power Good

PSRR @ 100 kHz

(dB)

PSRR @ 1 MHz (dB)


(𝛍V rms)


(nV/√Hz)


Total Accuracy Max (%)

Package

ADP1752 1.6 to 3.6Fixed:

0.75 to 2.5800 Yes Yes 54 40 23 40 70 2 4 mm × 4 mm,

16-lead LFCSP

ADP1753 1.6 to 3.6Adjustable: 0.75 to 3.3

800 Yes Yes 54 40 23 40 70 2 4 mm × 4 mm, 16-lead LFCSP


0.75 to 2.51200 Yes Yes 54 40 23 40 105 2

4 mm × 4 mm, 16-lead LFCSP




0.75 to 2.52000 Yes Yes 54 40 23 40 160 2 4 mm × 4 mm,

16-lead LFCSP



2.5V: AVDD2

1.8V: SPIVDD

AD9680

1.25V: AVDD1

14-BIT, 1000 MSPS JESD204B, DUALANALOG-TO-DIGITAL CONVERTER

1.25V: AVDD1_SR

ADP2164BUCK

REGULATOR

ADP2370BUCK

REGULATOR

1.25V: DVDD

1.25V: DRVDD

3.3V: AVDD33.8V

1.7V

5V/12VINPUT

3.3VINPUT

ADP1741LDO

ADP1741LDO

ADM7171LDO

ADM7160LDO

ADM7160LDO

5VIN

ADP5040

AD9361/AD93641.8V

1.3V1.7V

3.3VVDD_GPO

VDD_INTERFACE

VDDD1P3_DIG/VDDAx1.2ABUCK

300mALDO

300mALDO

ADP1755LDO

1.3V: AVDD1

1.3V: DRVDD1

1.3V: DVDD1

AD9625

2.5V: DRVDD2

2.5V: AVDD2

12-BIT, 2.5GSPS/2.0GSPS, 1.3V/2.5VANALOG-TO-DIGITAL CONVERTER

2.5V: DVDD2

ADP2386BUCK

REGULATOR

2.5V: DVDDIO

2.5V: SPI_DVDDIO

3.6V

1.7V12VINPUT

ADP125LDO

ADM7171LDO

ADP1740LDO

ADP1740LDO

ADM7170LDO

ADP125LDO

ADP2386BUCK

REGULATOR

Powering AD9625 high speed ADC.
















Ultralow Noise (5 μV rms) Fast Transient Response LDOs

ADM7170, ADM7171, and ADM7172

Ultralow Noise, Fast Transient Response LDO Selection Table

Part Number

VIN Range (V)

VOUT Options or Adj Range (V)

IOUT (mA)

Soft Start

Power Good

PSRR @ 100 kHz

(dB)

PSRR @ 1 MHz (dB)

RMS Noise @ 100 Hz to 100 kHz (𝛍V rms)1


(nV/√Hz)



Package

ADM7170 2.3 to 6.5Fixed: 1.2 to 5.0

Adjustable: 1.2 to 6.4500 Yes No 60 31 5.0 12 42 1.25 3 mm × 3 mm,

8-lead LFCSP

ADM7171 2.3 to 6.5Fixed: 1.2 to 5.0


8-lead LFCSP

ADM7172 2.3 to 6.5Fixed: 1.2 to 5.0


8-lead LFCSP1 Noise independent of fixed output voltage.

VOUT

SENSE

VIN

ADM7170-5V

GND

VIN VOUT

SS CSS1nF

CIN4.7�F

COUT4.7�F

ENOFF

ON

VIN = 6.5V VOUT = 6.0V

R12k�

R210k�

CH1 1.00A� CH2 50.0mV M400ns A CH1 620mA

CH1 PK∙PK1.096A

RUN TRIG’D

2

T 13.60%

1

NO

ISE

SP

EC

TR

AL

DE

NS

ITY

(nV

/√H

z)

FREQUENCY (Hz)

10M1 10 100 1k 10k 100k 1M1

10

100

1k

10k

100kILOAD = 1mAILOAD = 10mAILOAD = 100mAILOAD = 500mA

Features

• Input voltage range: 2.3 V to 6.5 V

• Any fixed voltage part can be adjusted up to give a higher output voltage

• Max current rating:

• ADM7170: 500 mA

• ADM7171: 1 A

• ADM7172: 2 A

• Very low noise: 5 μV rms independent of VOUT

• BW = 100 Hz to 100 kHz, no bypass cap required

• Fast transient response: < 1.5 μs for 1 mA to 1.5 A load step

• High PSRR: >65 dB at 10 kHz; 60 dB at 100 kHz

• Low dropout voltage of 84 mV at 1 A load, VOUT

= 3 V

Output noise spectral density, different output voltages, load current = 100 mA.ADM7171 full load transient response from 1 mA to 1 A for VOUT = 3.3 V.

The ADM7170/ADM7171/ADM7172 architecture allows any fixed output voltage to be set to a higher voltage with an external voltage divider.

analog.com/LDO | 7








Low Quiescent Current LDOs


Battery-powered sensor.

Low Quiescent Current LDO Selection Table

Part NumberVIN Range

(V)VOUT Options or Adj Range (V)

IOUT (mA)

Supply Current No

Load Typical (𝛍A)

Supply Current Full Load Typical

(𝛍A)

Quick Output

Discharge

Pass Through

Mode

RMS Noise @ 10 Hz

to 100 kHz (𝛍V rms)

PSRR @ 1 MHz (dB)

Package

ADP160 2.2 to 5.5 Fixed: 1.2 to 4.2 150 0.56 42 Yes No 80 255-lead TSOT,

1 mm × 1 mm, 4-ball WLCSP


150 0.56 42 Yes No 80 25 5-lead TSOT

ADP162 2.2 to 5.5 Fixed:1.2 to 4.2 150 0.56 42 No No 80 255-lead TSOT,

1 mm × 1 mm, 4-ball WLCSP


150 0.56 42 No No 80 25 5-lead TSOT

ADP1651 New 2.2 to 5.5Fixed: 1.2 to 4.2

Adjustable: 1.0 to 4.2

150 0.59 42 Yes Yes 80 255-lead TSOT,

2 mm × 2 mm, 6-lead LFCSP, 1 mm × 1 mm, 4-ball WLCSP,

ADP1661 New 2.2 to 5.5Fixed: 1.2 to 4.2

Adjustable: 1.0 to 4.2

150 0.59 42 No Yes 80 255-lead TSOT,

2 mm × 2 mm, 6-lead LFCSP, 1 mm × 1 mm, 4-ball WLCSP,

1ADP165 and ADP166 include pass through mode (very low quiescent current in dropout).

OR

INTERRUPT

WDI

RESET

BATTERYDISCONNECT

SENSOR

ADCMP380COMPARATOR

ADM8615VOLTAGE

SUPERVISOR

ADP165LINEAR

MICRO

ADC

ADP5300SWITCHING

VIN

ADP1651 VOUT AND GND CURRENT vs. VINVIN NOM = 3.3V

ILOAD = 1�A

I GN

D (�

A)

VO

UT (V

)

0 0.4 0.8 1.2 2.0 2.4 3.2 3.6 4.0 4.8 5.21.6 2.8 4.4 5.6

2.02.42.83.23.6

00.40.81.21.6

0.5

1.0

1.5

2.0

2.5

3.0

0

DROPOUTREGION














LDO

Sele

ctio

n Ta

ble

Part

Num

ber

V IN

Rang

e

( V M

in to

V M

ax)

V OUT

Ran

ge ( V

)I O

UT ( m

A)Su

pply

Cur

rent

No

Loa

d ( 𝛍

A)W

orst

-Cas

e Ac

cura

cy ( ∙

%)

RMS

Nois

e @

10

Hz

to 1

00 k

Hz

( 𝛍V

rms)

PSRR

@

100

kHz

( dB)

PSRR

@

1 M

Hz

( dB)

PSRR

@

Head

room

( m

V)1

Pack

age

Com

men

ts

Ultra

low

Noi

se, H

igh

PSRR

ADM

7150

New

4.5

to 1

61.

5 to

5.0

800

4300

21.

690

5512

003

mm

× 3

mm

, 8-le

ad L

FCSP

1.5

nV/√

Hz @

100

kHz

ADM

7151

New

4.5

to 1

61.

5 to

5.1

800

4300

21.

690

5512

003

mm

× 3

mm

, 8-le

ad L

FCSP

1.5

nV/√

Hz @

100

kHz

ADM

7154

New

2.3

to 5

.51.

2 to

3.3

600

4000

21.

690

5850

03

mm

× 3

mm

, 8-le

ad L

FCSP

1.2

nV/√

Hz @

100

kHz

ADM

7155

New

2.3

to 5

.51.

2 to

3.3

600

4000

21.

690

5850

03

mm

× 3

mm

, 8-le

ad L

FCSP

1.2

nV/√

Hz @

100

kHz

HMC9

76LP

3E3.

3 to

5.5

1.8

to 5

.140

011

002

945

3550

03

mm

× 3

mm

, 16-

lead

LFC

SP3

nV/√

Hz @

100

kHz

HMC8

60LP

3E3.

35 to

5.6

2.5

to 5

.224

019

002

5.5

6560

500

3 m

m ×

3 m

m, 1

6-le

ad L

FCSP

Quad

out

put

HMC1

060L

P3E

3.35

to 5

.61.

8 to

5.2

500

2100

29

7235

500

3 m

m ×

3 m

m, 1

6-le

ad L

FCSP

Quad

out

put

Low

Vol

tage

and

Low

Noi

se

ADP1

502.

2 to

5.5

1.8

to 3

.315

010

2.5

950

3050

04-

lead

WLC

SP, 5

-lead

TSO

T0.

8 m

m ×

0.8

mm

W

LCSP

opt

ion

ADP1

512.

2 to

5.5

1.1

to 3

.320

010

39

4525

500

4-le

ad W

LCSP

, 5-le

ad T

SOT,

2

mm

× 2

mm

, 6-le

ad L

FCSP

0.8

mm

× 0

.8 m

m

WLC

SP o

ptio

n

ADM

7160

New

2.2

to 5

.51.

1 to

3.3

200

103

945

3850

05-

lead

TSO

T,

2 m

m ×

2 m

m, 6

-lead

LFC

SPI&

I app

licat

ions

, lo

w te

mpc

o

ADM

7170

New

2.3

to 6

.51.

2 to

6.4

500

700

1.25

653

3050

03

mm

× 3

mm

, 8-le

ad L

FCSP

Fas

t tra

nsie

nt re

spon

se

ADM

7171

New

2.3

to 6

.51.

2 to

6.4

1000

700

1.5

653

3050

03

mm

× 3

mm

, 8-le

ad L

FCSP

Fast

tran

sien

t res

pons

e

ADM

7172

New

2.3

to 6

.51.

2 to

6.3

2000

700

1.5

653

3050

03

mm

× 3

mm

, 8-le

ad L

FCSP

Fast

tran

sien

t res

pons

e

High

Vol

tage

and

Low

Noi

se

ADP7

102

3.3

to 2

01.

22 to

19

300

400

315

6040

1000

3 m

m ×

3 m

m,

8-le

ad L

FCSP

, 8-le

ad S

OIC

Pow

er g

ood,

reve

rse

volta

ge p

rote

cted

ADP7

104

3.3

to 2

01.

22 to

19

500

400

315

6040

1000

3 m

m ×

3 m

m,

8-le

ad L

FCSP

, 8-le

ad S

OIC

Pow

er g

ood,

reve

rse

vo

ltage

pro

tect

ed

ADP7

105 New

3.3

to 2

01.

22 to

19

500

400

215

6040

1000

3 m

m ×

3 m

m,

8-le

ad L

FCSP

, 8-le

ad S

OIC

Pow

er g

ood,

sof

t sta

rt,

reve

rse

volta

ge p

rote

cted

ADP7

112 New

2.7

to 2

01.

2 to

19

200

501.

811

6850

2000

1 m

m ×

1.2

mm

, 6-b

all W

LCSP

Soft

star

t

ADP7

118 New

2.7

to 2

01.

2 to

19

200

501.

811

6850

2000

2 m

m ×

2 m

m, 6

-lead

LFC

SP,

8-le

ad S

OIC,

5-le

ad T

SOT

Soft

star

t

ADP7

142 New

2.7

to 4

01.

2 to

39

200

501.

811

6850

2000

2 m

m ×

2 m

m, 6

-lead

LFC

SP,

8-le

ad S

OIC,

5-le

ad T

SOT

Soft

star

t

Nega

tive

Volta

ge

ADP7

182 New

–2.7

to –

28–1

.22

to –

27–2

00–3

33

1845

3210

002

mm

× 2

mm

, 6-le

ad L

FCSP

, 3

mm

× 3

mm

, 8-le

ad L

FCSP

, 5-

lead

TSO

TPo

sitiv

e/ne

gativ

e EN

logi

c

Ultra

low

VIN

ADP1

701.

6 to

3.6

0.8

to 3

.030

023

330

5032

500

5-le

ad T

SOT

Fixe

d ou

tput

ADP1

711.

6 to

3.6

0.8

to 3

.030

023

330

5032

500

5-le

ad T

SOT

Adju

stab

le o

utpu

t

ADP1

721.

6 to

3.6

0.8

to 3

.030

023

330

5032

500

4-le

ad W

LCSP

0.95

mm

× 0

.95

mm

W

LCSP

opt

ion

ADP1

301.

2 to

3.6

0.8

to 3

.035

025

329

5535

500

5-le

ad T

SOT

V BIA

S vo

ltage

requ

ired

1 PSR

R sp

ecifi

catio

ns a

re a

t thi

s he

adro

om v

olta

ge ( h

eadr

oom

= V

IN –

VO

UT ) .

analog.com/LDO | 9


























Part

Num

ber

V IN

Rang

e

( V M

in to

V M

ax)

V OUT

Ran

ge ( V

)I O

UT ( m

A)Su

pply

Cur

rent

No

Loa

d ( 𝛍

A)W

orst

-Cas

e Ac

cura

cy ( ∙

%)

RMS

Nois

e @

10

Hz

to 1

00 k

Hz

( 𝛍V

rms)

PSRR

@

100

kHz

( dB)

PSRR

@

1 M

Hz

( dB)

PSRR

@

Head

room

( m

V)1

Pack

age

Com

men

ts

Ultra

low

VIN

(con

tinue

d)

ADP1

740

1.6

to 3

.60.

75 to

2.5

2000

902

2354

4010

004

mm

× 4

mm

, 16-

lead

LFC

SPSo

ft st

art,

pow

er g

ood,

reve

rse

volta

ge p

rote

cted

ADP1

741

1.6

to 3

.60.

75 to

3.3

2000

902

2354

4010

004

mm

× 4

mm

, 16-

lead

LFC

SPSo

ft st

art,

pow

er g

ood,

reve

rse

volta

ge p

rote

cted

ADP1

752

1.6

to 3

.60.

75 to

2.5

800

902

2354

4010

004

mm

× 4

mm

, 16-

lead

LFC

SPSo

ft st

art,

pow

er g

ood,

reve

rse

volta

ge p

rote

cted

ADP1

753

1.6

to 3

.60.

75 to

3.3

800

902

2354

4010

004

mm

× 4

mm

, 16-

lead

LFC

SPSo

ft st

art,

pow

er g

ood,

reve

rse

volta

ge p

rote

cted

ADP1

754

1.6

to 3

.60.

75 to

2.5

1200

902

2354

4010

004

mm

× 4

mm

, 16-

lead

LFC

SPSo

ft st

art,

pow

er g

ood,

reve

rse

volta

ge p

rote

cted

ADP1

755

1.6

to 3

.60.

75 to

3.3

1200

902

2354

4010

004

mm

× 4

mm

, 16-

lead

LFC

SPSo

ft st

art,

pow

er g

ood,

reve

rse

volta

ge p

rote

cted

Mul

tirai

lHM

C860

LP3E

3.35

to 5

.62.

5 to

5.2

240

1900

25.

565

6050

03

mm

× 3

mm

, 16-

lead

LFC

SPQu

ad o

utpu

t

HMC1

060L

P3E

3.35

to 5

.61.

8 to

5.2

500

2100

29

7235

500

3 m

m ×

3 m

m, 1

6-le

ad L

FCSP

Quad

out

put

ADP2

202.

5 to

5.5

0.8

to 3

.320

060

227

6040

1000

6-le

ad W

LCSP

1 m

m ×

1.5

mm

WLC

SP

ADP2

212.

5 to

5.5

0.8

to 3

.320

060

227

6040

1000

6-le

ad W

LCSP

1 m

m ×

1.5

mm

WLC

SP,

activ

e pu

lldow

n

ADP2

222.

5 to

5.5

0.8

to 3

.330

065

227

6040

1000

2 m

m ×

2 m

m, 8

-lead

LFC

SPDu

al L

DO, f

ixed

out

puts

ADP2

232.

5 to

5.5

0.5

to 5

.030

065

227

6040

1000

2 m

m ×

2 m

m, 8

-lead

LFC

SPDu

al L

DO, a

djus

tabl

e ou

tput

s

ADP2

242.

5 to

5.5

0.8

to 3

.330

065

227

6040

1000

2 m

m ×

2 m

m, 8

-lead

LFC

SPDu

al L

DO, f

ixed

out

puts

, qui

ck

outp

ut d

isch

arge

ADP2

252.

5 to

5.5

0.5

to 5

.030

065

227

6040

1000

2 m

m ×

2 m

m, 8

-lead

LFC

SPDu

al L

DO, a

djus

tabl

e ou

tput

s,

quic

k ou

tput

dis

char

ge

ADP3

201.

8 to

5.5

0.8

to 3

.320

085

224

5545

1000

3 m

m ×

3 m

m, 1

6-le

ad L

FCSP

Trip

le L

DO, 2

.5 V

BIAS

min

ADP3

221.

8 to

5.5

0.8

to 3

.320

085

224

5545

1000

3 m

m ×

3 m

m, 1

6-le

ad L

FCSP

Trip

le L

DO, 2

.5 V

BIAS

min

, fix

ed

outp

uts

ADP3

231.

8 to

5.5

0.5

to 5

.020

085

224

5545

1000

3 m

m ×

3 m

m, 1

6-le

ad L

FCSP

Trip

le L

DO, 2

.5 V

BIAS

min

, ad

just

able

out

puts

High

Cur

rent

ADM

7172

New

2.3

to 6

.51.

2 to

6.3

2000

700

1.5

653

3050

03

mm

× 3

mm

, 8-le

ad L

FCSP

Fast

tran

sien

t res

pons

e

ADP1

740

1.6

to 3

.60.

75 to

2.5

2000

902

2354

4010

004

mm

× 4

mm

, 16-

lead

LFC

SPSo

ft st

art,

pow

er g

ood,

reve

rse

volta

ge p

rote

cted

ADP1

741

1.6

to 3

.60.

75 to

3.3

2000

902

2354

4010

004

mm

× 4

mm

, 16-

lead

LFC

SPSo

ft st

art,

pow

er g

ood,

reve

rse

volta

ge p

rote

cted

Gene

ral-P

urpo

seAD

P121

2.3

to 5

.51.

2 to

3.3

150

113

4050

3010

005-

lead

TSO

T, 4

-lead

WLC

SP0.

82 m

m ×

0.8

2 m

m W

LCSP

ADP1

222.

3 to

5.5

1.75

to 3

.330

045

225

6038

500

5-le

ad T

SOT,

2

mm

× 2

mm

, 6-le

ad L

FCSP

Fixe

d ou

tput

ADP1

232.

3 to

5.5

0.8

to 5

.030

045

225

6038

500

5-le

ad T

SOT,

2

mm

× 2

mm

, 6-le

ad L

FCSP

Adju

stab

le o

utpu

t

ADP1

242.

3 to

5.5

1.75

to 3

.350

045

225

4533

500

8-le

ad M

SOP,

2

mm

× 2

mm

, 8-le

ad L

FCSP

Expo

sed

pad

pack

age

for h

igh

ther

mal

con

duct

ivity

1 PSR

R sp

ecifi

catio

ns a

re a

t thi

s he

adro

om v

olta

ge ( h

eadr

oom

= V

IN –

VO

UT ) .


























Part

Num

ber

V IN

Rang

e

( V M

in to

V M

ax)

V OUT

Ran

ge ( V

)I O

UT ( m

A)Su

pply

Cur

rent

No

Loa

d ( 𝛍

A)W

orst

-Cas

e Ac

cura

cy ( ∙

%)

RMS

Nois

e @

10

Hz

to 1

00 k

Hz

( 𝛍V

rms)

PSRR

@

100

kHz

( dB)

PSRR

@

1 M

Hz

( dB)

PSRR

@

Head

room

( m

V)1

Pack

age

Com

men

ts

Gene

ral-P

urpo

se ( c

ontin

ued)

ADP1

252.

3 to

5.5

0.8

to 5

.050

045

225

4533

500

8-le

ad M

SOP,

2

mm

× 2

mm

, 8-le

ad L

FCSP

Expo

sed

pad

pack

age

for h

igh

ther

mal

con

duct

ivity

Ultra

low

Iq a

nd L

ow N

oise

ADP1

602.

2 to

5.5

1.2

to 4

.215

00.

563.

580

2320

500

5-le

ad T

SOT,

4-le

ad W

LCSP

Ultra

low

Iq, Q

OD

ADP1

612.

2 to

5.5

1.0

to 4

.215

00.

563.

580

2320

500

5-le

ad T

SOT

Ultra

low

Iq

ADP1

622.

2 to

5.5

1.2

to 4

.215

00.

563.

580

2320

500

5-le

ad T

SOT,

4-le

ad W

LCSP

Ultra

low

Iq, Q

OD,

0.96

5 m

m ×

0.9

65 m

m W

LCSP

ADP1

632.

2 to

5.5

1.0

to 4

.215

00.

563.

580

2320

500

5-le

ad T

SOT

Ultra

low

Iq

ADP1

65 New

2.2

to 5

.51.

0 to

4.2

150

0.59

3.5

8023

2050

01

mm

× 1

mm

, 4-le

ad W

LCSP

, 2

mm

× 2

mm

, 6-le

ad L

FCSP

, 5-

lead

TSO

T

Ultra

low

Iq in

dro

pout

( p

ass

thro

ugh

mod

e), Q

OD

ADP1

66 New

2.2

to 5

.51.

0 to

4.2

150

0.59

3.5

8023

2050

01

mm

× 1

mm

, 4-le

ad W

LCSP

, 2

mm

× 2

mm

, 6-le

ad L

FCSP

, 5-

lead

TSO

T

Ultra

low

Iq in

dro

pout

( p

ass

thro

ugh

mod

e)

WLC

SPAD

P121

2.3

to 5

.51.

2 to

3.3

150

113

4050

3010

005-

lead

TSO

T, 4

-lead

WLC

SP0.

82 m

m ×

0.8

2 m

m W

LCSP

ADP1

502.

2 to

5.5

1.8

to 3

.315

010

2.5

950

3050

04-

lead

WLC

SP, 5

-lead

TSO

T0.

8 m

m ×

0.8

mm

W

LCSP

opt

ion

ADP1

512.

2 to

5.5

1.1

to 3

.320

010

39

4525

500

4-le

ad W

LCSP

, 5-le

ad T

SOT,

2

mm

× 2

mm

, 6-le

ad L

FCSP

0.8

mm

× 0

.8 m

m

WLC

SP o

ptio

n

ADP1

602.

2 to

5.5

1.2

to 4

.215

00.

563.

580

2320

500

5-le

ad T

SOT,

4-le

ad W

LCSP

Ultra

low

Iq, Q

OD

ADP1

622.

2 to

5.5

1.2

to 4

.215

00.

563.

580

2320

500

5-le

ad T

SOT,

4-le

ad W

LCSP

Ultra

low

Iq, Q

OD,

0.96

5 m

m ×

0.9

65 m

m W

LCSP

ADP1

65 New

2.2

to 5

.51.

0 to

4.2

150

0.59

3.5

8023

2050

01

mm

× 1

mm

, 4-le

ad W

LCSP

, 2

mm

× 2

mm

, 6-le

ad L

FCSP

, 5-

lead

TSO

T

Ultra

low

Iq in

dro

pout

( p

ass

thro

ugh

mod

e), Q

OD

ADP1

66 New

2.2

to 5

.51.

0 to

4.2

150

0.59

3.5

8023

2050

01

mm

× 1

mm

, 4-le

ad W

LCSP

, 2

mm

× 2

mm

, 6-le

ad L

FCSP

, 5-

lead

TSO

T

Ultra

low

Iq in

dro

pout

( p

ass

thro

ugh

mod

e)

ADP1

721.

6 to

3.6

0.8

to 3

.030

023

330

5032

500

4-le

ad W

LCSP

0.95

mm

× 0

.95

mm

W

LCSP

opt

ion

ADP2

202.

5 to

5.5

0.8

to 3

.320

060

227

6040

1000

6-le

ad W

LCSP

1 m

m ×

1.5

mm

WLC

SP

ADP2

212.

5 to

5.5

0.8

to 3

.320

060

227

6040

1000

6-le

ad W

LCSP

1 m

m ×

1.5

mm

WLC

SP,

activ

e pu

lldow

n

ADP7

112 New

2.7

to 2

01.

2 to

19

200

502

1160

4010

006-

lead

WLC

SPSo

ft st

art

1 PSR

R sp

ecifi

catio

ns a

re a

t thi

s he

adro

om v

olta

ge ( h

eadr

oom

= V

IN –

VO

UT ) .

analog.com/LDO | 11




















Online Tools and Resources

Linear Regulator Parametric Selections and Design ToolThe ADIsimPower™ design center lets you design your power circuits in two easy steps:

• Step 1: Select parts

• Step 2: Design and optimize

The ADIsimPower selector uses your specific application requirements and compares solutions from over 300 power management parts and over 10 different topologies.

Each solution takes into consideration the IC, external components, and operating condition to be able to compare expected performance.

Step 1:

Smart Web selector

Step 2:

Design and optimize for size, cost, or efficiency

Design report includes BOM and thermals at operating conditionsSide by side comparison at specified operating point,

including expected noise and PSRR

EngineerZone® Online Support CommunityFind answers to your design questions. Join our engineer community at ez.analog.com.

analog.com/LDO

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©2014 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.

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