upi2010 day07 interrupts

7/31/2019 UPI2010 Day07 Interrupts

1/17

BIOS and DOS Interrupts

Basic Input /Outpu System

Disk Operating System


2/17

Computer Interrupt

Interrupt request: a signalthat immediate attention isneeded

Interrupt processing: what CPU does in response to request

Interrupt service: what is done in software as a result


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Computer Interrupt

2 General Types of Interrupts:

External- generated outside CPU by other hardware

Internal- generated within CPU as a result of instruction or operation- x86 internals: int, into, divide error, and single step

- trap generally means any processor generated interrupt;in x86, usually means the single step interrupt

x86 Terminology for Interrupts:

1) Hardware Interrupt External, uses INTR and NMI control bus lines

2) Software Interrupt Internal, from int orinto

3) ProcessorInterrupt traps, exceptions


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GND

AD14

AD13

AD12AD11

AD10

AD9

AD8

AD7

AD6

AD5

AD4

AD3

AD2

AD1

AD0

NMI

INTR

CLK

GND

VCC

AD15

A16/S3

A17/S4A18/S5

A19/S6

HOLD

HLDA

ALE

READY

RESET

BHE/S7

MN/MX

RD

WR

M/IO

DT/R

DEN

INTA

TEST

1

2

3

45

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

31

30

29

28

27

26

25

24

23

22

21

40

39

38

3736

35

34

33

328086

GND

A14

A13

A12A11

A10

A9

A8

AD7

AD6

AD5

AD4

AD3

AD2

AD1

AD0

NMI

INTR

CLK

GND

VCC

A15

A16/S3

A17/S4A18/S5

A19/S6

HOLD

HLDA

ALE

READY

RESET

SS0

MN/MX

RD

WR

IO/M

DT/R

DEN

INTA

TEST

1

2

3

45

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

31

30

29

28

27

26

25

24

23

22

21

40

39

38

3736

35

34

33

328088

8086 8088

Mode ModePin Minimum Maximum Pin Minimum Maximum

31 HOLD RQ/GT0 31 HOLD RQ/GT030 HLDA RQ/GT1 30 HLDA RQ/GT129 WR LOCK 29 WR LOCK28 M/IO S2 28 IO/M S227 DT/R S1 27 DT/R S126 DEN S0 26 DEN S025 ALE QS0 25 ALE QS024 INTA QS1 24 INTA QS1

34 SS0 High State

8086/8088 Pinout Diagrams


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8086 External Interrupt Connections

NMI - Non-Maskable Interrupt INTR - Interrupt Request

Interrupt Logic

int intoDivide

Error

Single

Step

NMI Requesting

Device

8086 CPUIntel

8259A

PIC

NMI

INTR

Software Traps

Programmable

Interrupt Controller

(part of chipset)


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Interrupt Vector Table IVT (in memory)

x86 has 256 interrupts, specified by Type NumberorVector

1 byte of data must accompany each interrupt; specifies Type

Vectoris apointer(address) into Interrupt Vector Table, IVT

IVT is stored in memory from 0000:0000 to 0000:03ffh

IVTcontains 256 far pointer values (addresses)

Far pointer is CS:IP values

Each far pointer is address ofInterrupt Service Routine, ISR Also referred to as Interrupt Handler

When interrupt is requested, which

IVT entry? Type!


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IVT Format

Offset

Offset

Offset

Segment

Segment

Segment Interrupt 0

Interrupt 1

Interrupt 255

0000:0000

0000:0001

0000:0002

0000:0003

0000:0004

0000:0005

0000:0006

0000:0007

0000:03fc

0000:03fd

0000:03fe

0000:03ff

IP LSB

IP MSB

CS LSB

CS MSB

Given a Vector, where is the

ISR address stored in memory ?

4Offset Type

=

Example: int 36h

Offset = (54 4) = 216

= 00d8h


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What Happens During an Interrupt ?

Complete

CurrentInstruction

Internal

Interrupt

NMI

INTR

TF

Fetch

Next

Instruction

IF

Read Type

Code #

push

Flags

Set

TEMP=TF

IF=0TF=0

push

CS and IP

call

ISR

NMI

TF=TEMP

popIP and CS

popf

Resume

Interrupted

Procedure

YES

YES

YES

YES

NO

NO

NO

NO

0

1

1

0

acknowledge

interrupt


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Similarity to Subroutine Procedure

callint

ret iret

call pushes CS, IP and loads CS:IP with address of subroutine

int does what call does and more

ret pops IP, CS

iret pops FLAGS, IP, and CS

This is why ALL programs MUST have a stack segment, so that interrupts can be

handled


10/17

halt Instruction

This instruction causes processor to enter a HALT state

HALT state is one where no further instructions are fetched nor executed until

one of the following events occurs:

1) System is reset - rising edge on RESET pin

2) External interrupt occurs

CPU Asset Content

FLAGSRegister 0000h

IP 0000hCS ffffh

DS 0000h

SS 0000h

ES 0000h

Instruction Queue Empty


11/17

Interrupt Vector Assignments

Type Function Comment

0 Divide Error Processor - zero or overflow1 Single Step (DEBUG) Processor - TF=12 Nonmaskable Interrupt Pin Processor - NMI Signal3 Breakpoint Processor - Similar to Sing Step4 Arithmetic Overflow Processor - into5 Print Screen Key BIOS - Key Depressed6 Invalid Opcode Processor - Invalid Opcode

7 Coprocessor Not Present Processor - no FPU8 Time Signal BIOS - From RT Chip (AT - IRQ0)9 Keyboard Service BIOS - Gen Service (AT - IRQ1)

A - F Originally Bus Ops (IBM PC) BIOS - (AT - IRQ2-7)10 Video Service Request BIOS - Accesses Video Driver 11 Equipment Check BIOS - Diagnostic12 Memory Size BIOS - DOS Memory13 Disk Service Request BIOS - Accesses Disk Driver 14 Serial Port Service Request BIOS - Accesses Serial Port Drvr 15 Miscellaneous BIOS - Cassette, etc.16 Keyboard Service Request BIOS - Accesses KB Driver


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Interrupt Vector Assignments (cont.)

Type Function Comment17 Parallel Port LPT Service BIOS - Printer Driver

18 ROM BASIC BIOS - BASIC Interpreter in ROM19 Reboot BIOS - Bootstrap1A Clock Service BIOS - Time of Day from BIOS1B Control-Break Handler BIOS - Keyboard Break1C User Timer Service BIOS - Timer Tick1D Pointer to Video Parm Table BIOS - Video Initialization1E Pointer to Disk Parm Table BIOS - Disk Subsystem Init.1F Pointer to Graphics Fonts BIOS - CGA Graphics Fonts

20 Program Terminate DOS - Clear Memory, etc.21 Function Call DOS - Transfer Control22 Terminate Address DOS - program Terminate handler 23 Control-C Handler DOS - For OS Use24 Fatal Error Handler DOS - Critical Error 25 Absolute Disk Read DOS - Disk Read26 Absolute Disk Write DOS - Disk Write

27 Terminate DOS - TSR Usage28 Idle Signal DOS - Idle2F Print Spool DOS - Cassette, etc.

70-77 Hardware Interrupts in AT Bios DOS - (AT - IRQs 8-15)


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AT IRQ DefinitionsIBM-AT (Advanced Technology) - Intel 80286

Name Interrupt Vector Priority DescriptionNMI 02 1 Memory Parity ErrorIRQ0 08 2 Timer (Intel 8253 Chip 55 ms intervals)IRQ1 09 3 KeyboardIRQ2 0A 4 8259 PIC Slave or EGA/VGA Vert. RetraceIRQ3 0B 13 Serial Port (COM2 or COM4)IRQ4 0C 14 Serial Port (COM1 or COM3)IRQ5 0D 15 Fixed Disk or LPT2 Request

IRQ6 0E 16 Floppy Disk DriverIRQ7 0F 17 LPT1 RequestIRQ8 70 5 CMOS Real-Time Clock (RT Chip)IRQ9 71 6 Re-directed to IRQ2IRQ10 72 7 RESERVEDIRQ11 73 8 RESERVEDIRQ12 74 9 Mouse or otherIRQ13 75 10 Math Coprocessor (NPX)

IRQ14 76 11 Hard DiskIRQ15 77 12 RESERVED


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Interrupt Service Routines

ALL Interrupts

Interrupts for Inpu

Interrupts for Output
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Interrupts for Inpu

INT 16h / AH = 00h- get keystroke fromkeyboard (no echo)

INT 16h / AH = 01h- check for keystroke inthe keyboard buffer

INT 21h / AH=1 - read character fromstandard input, with echo

INT 21h / AH=6 - direct console input or

output INT 21h / AH=7 - character input withoutecho to AL

INT 21h / AH=0Ah- input of a string

INT 21h / AH=0Bh- get input status
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Interrupts for Output

INT 21h / AH=2- write character tostandard output

INT 21h / AH=9- output of a string
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HW#1

Develop an assembly program thatreceives a decimal number (up to max100 digits) from user and displays its

hexadecimal equivallent.

Due Date: Sunday Esfand 23rd

Mail to: Mr Kazari and me([email protected] [email protected])

Subject: HW1 UPI2010 IDxxxxxxxx

upi2010 day07 interrupts

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