vcsel fab overview

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VCSEL Fabrication Processing The following is pictorial description of the fabrication process for oxidized VCSELs. A detailed description of each step is contained in “VCSEL Fab Details.ppt” This work was performed in Micro and Nanotechnology Laboratory at the University of Illinois by members of the Photonic Device Research Group

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Page 1: VCSEL Fab Overview

VCSEL Fabrication Processing

The following is pictorial description of the fabrication process for oxidized VCSELs.

A detailed description of each step is contained in “VCSEL Fab Details.ppt”

This work was performed in Micro and Nanotechnology Laboratory

at the University of Illinois

by members of the Photonic Device Research Group

Page 2: VCSEL Fab Overview

Photonic Device Research Group

p-DBR

n-DBR

n-GaAs substrate

VCSEL fabrication – Bare wafer

CleaveLabel substrate backsideClean

Page 3: VCSEL Fab Overview

Photonic Device Research Group

p-DBR

n-DBR

n-GaAs substrate

VCSEL fabrication – Backside contact

Target: 40 nm AuGe / 20 nm Ni / 150 nm Au

Page 4: VCSEL Fab Overview

Photonic Device Research Group

p-DBR

n-DBR

n-GaAs substrate

PR

VCSEL fabrication – Spin PR

Degrease /N2 dry /Dehydration bakeHMDS (can spin-on or vapor prime)Spin on photoresist (usually 4330)

Page 5: VCSEL Fab Overview

Photonic Device Research Group

p-DBR

n-DBR

n-GaAs substrate

PR

VCSEL fabrication – Top contact lithography

4330 lithography

Page 6: VCSEL Fab Overview

Photonic Device Research Group

p-DBR

n-DBR

n-GaAs substrate

PR

Photonic Device Research Group

VCSEL fabrication – Metal deposition

O2 Plasma (300W – 3 min)1:10 NH4OH:DI dip (15 sec)Flowing DI rinse (10 min)N2 dry, inspect, load, evaporateTarget: 15 nm Ti / 150 nm Au

Page 7: VCSEL Fab Overview

Photonic Device Research Group

p-DBR

n-DBR

n-GaAs substrate

VCSEL fabrication – Liftoff

Acetone soak ~5 min / Squirt gun

Page 8: VCSEL Fab Overview

Photonic Device Research Group

p-DBR

n-DBR

n-GaAs substrate

SiO2

VCSEL fabrication – SiO2 deposition

Degrease, N2 dryload, deposit dielectric> 400 nm thickness (based on color)

Page 9: VCSEL Fab Overview

Photonic Device Research Group

VCSEL fabrication – SiO2 pattern

Degrease /N2 dry /Dehydration bakeHMDS vapor primeSpin on AZ5214Hardbake (110° C for 60 sec)Patern & developp-DBR

n-DBR

n-GaAs substrate

SiO2

PR

Page 10: VCSEL Fab Overview

Photonic Device Research Group

p-DBR

n-DBR

n-GaAs substrate

SiO2

PR

VCSEL fabrication – CF4 RIE etch

Freon 14 (CF4) for > 400 nm (22 min)Remove PR mask with acetone

Page 11: VCSEL Fab Overview

Photonic Device Research Group

p-DBR

n-DBR

n-GaAs substrate

SiO2

VCSEL – SiCl4 ICP-RIE mesa etch

Clean ICP (O2 process – 15 min)

ICP predep (SiCl4 recipe – 10 min)

Etch > 5 mirror pair into bottom DBR

To be replaced by Semigroup RIETo be replaced by Semigroup RIE

Page 12: VCSEL Fab Overview

Photonic Device Research Group

p-DBR

n-DBR

n-GaAs substrate

SiO2

VCSEL fabrication – Selective oxidation

Oxidation rate from test pieceUse optical (below) or electrical probeRecord actual pinch off in log book

Page 13: VCSEL Fab Overview

Photonic Device Research Group

p-DBR

n-DBR

n-GaAs substrate

VCSEL fabrication – CF4 RIE etch

Freon 14 (CF4) process (~200 Å/min)Test for conduction on probe station2 min etch, testRepeat until all SiO2 is removed

Page 14: VCSEL Fab Overview

Photonic Device Research Group

VCSEL Structure and Operation

Top-view optical photograph of

fabricated VCSEL

Side-view schematic of fabricated VCSEL

Top contact

Bottom contact

Oxide layers

Active region

p-DBR

n-DBR

n-GaAs substrate

Laser Emission

Page 15: VCSEL Fab Overview

Photonic Device Research Group

Test VCSELs!