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Page 1: VLSI,DSP &Image Processing Trainers

VLSI TRAINERSProduct Catalogue

Plot No : 75, Electronics Estate, Perungudi, Chennai - 600 096 Ph : 91-44-2496 1842, 2496 1852, Fax : 91-44-2496 1536E-Mail : [email protected], Web : www.vimicrosystems.com

Vi Microsystems Pvt. Ltd.,

Page 2: VLSI,DSP &Image Processing Trainers

Xilinx Spartan 3E FPGA Trainer Kit : (VSK - Spartan 3E)

FEATURES

Additional Add-on Features [ VVSI-29]

* Xilinx XC3S500E – FT256 Spartan 3E FPGA * 500K gates & 10,476 Logic cells * 16 Nos of digital inputs using slide switches * 16 Nos of digital outputs using discrete LEDs * One Reset switch * FPGA configuration through # JTAG port # Slave serial # Onboard Flash Prom XCF04S * Support for xilinx Parallel cable IV * Cashew jacket for 5V power supply * Total 190 I/O pins : 80 pins used for integrating peripherals like LED’s, switches etc., balance 110 pins available to user * 3 Nos of 20 pin header to interface VLSI based experiment modules (3.3V compatible). * 1 No of 26 pin header to interface VLIM cards like Traffic Light Controller (5V compatible) * On board programmable PLL oscillator from 3MHz to 200 MHz * 6 Nos of 7 segment LED display (to display Hr, Min, Sec of RTC VHDL implementation) * 2 Nos of 100 pin header with 110 I/O pins terminations provided to plug in daughter boards. * Housed in a sleek plastic cabinet with built in SMPS 5V/2A.

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* Header provided in VSK-Spartan 3E to interface the following # 16 × 2 LCD interface. # 4 × 4 matrix keyboard. # Relay interface. # Stepper motor interface. # ADC & DAC interface. - 2 ADCs of 3 MSPS each, 12 bit resolution - Anti aliasing filters at ADC input - 8 Channel, 12 Bit DACs - Reconstruction filters at the DAC output # RS232 / SPI Serial Port # Temperature sensor interface # USB 2.0 Complaint interface (480 Mbits/sec)

Page 3: VLSI,DSP &Image Processing Trainers

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Very Large Scale Integration (VLSI) is the Science of Integrating millions of transistors

on a silicon chip. Now-a-days VLSI finds applications in all aspects of life in Consumer

Electronics, Defence, Computers, Communication, Space, Networking etc.,

High performance FPGA devices from many vendors are available at affordable price. Very high

speed transceiver with superior signal integrity, Embedded 32 bit processors, many 18 × 18 bit

multipliers, PLL, Ethernet PHY and many more high end features are built into the latest FPGA

devices. This result in usage of FPGA devices extensively in all the latest equipment introduced

in the world market.

Xilinx, Altera, Actel, Cypress are Device Vendors. Mentor Graphics, Synplicity, Synopsys,

Cadence, Aldec etc., are EDA Companies. These are the Back Bone of VLSI Designs.

We have introduced many basic VLSI Trainers, Universal VLSI trainer, Advanced FPGA kits.

Evaluation Boards, Experiment Boards, Software IPs, so that the students and the beginners in

the VLSI field can set maximum exposure.

We have developed many software IPs like 8255, 8279, 8253 and many more, which are made

to be available to students, so that they can study the VHDL codes, modify the code and add

additional features to these IPs . For example, the student can study 8255 code and add a 16 bit

timer.

We have developed many software IPs simulation boards for providing the IPs which will be

useful for understanding these software IPs codes.

Page 4: VLSI,DSP &Image Processing Trainers

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VLSI TRAINER KITS

1. UNIVERSAL FPGA / CPLD TRAINER KIT [VVSM-06]

A. Xilinx FPGA Piggy back boards

i. Spartan 3 Piggy back board (VVSP - 02)ii. Spartan 3E Piggy back board (VVSP-14)iii. Xilinx Virtex II Piggy back board (VVSP - 03)iv Xilinx Virtex II Pro Piggy back board (VVSP - 05)

B. Xilinx CPLD Piggy back board

i Cool runner II CPLD piggy back board (VVSP - 08)

C. Altera Based Piggy back boards

i. Altera Max II CPLD Piggy back board (VVSP - 10)ii. Altera Cyclone FPGA Piggy back board (VVSP - 07)iii. Altera Stratix II FPGA Piggy back board (VVSP-13)

D. Actel proasic plus piggy back board

2. ADVANCED UNIVERSAL FPGA TRAINER (VVSM - 09)

Supported Piggy back boards (Daughter board)i. Virtex 4 (XC4VSX25) Piggy Back Board [VAFP-02]ii. Virtex II Pro (XC2VP20) Piggy Back Board [VAFP-03]iii. Spartan 3 (XC3S5000) Piggy Back Board [VAFP-01]iv. Spartan 3 (XC3S1500) Piggy Back Board [VAFP-04]v. Altera Stratix II Piggy Back Board [VAFP-05]vi. Altera Cyclone II Piggy Back Board [VAFP-06]

3. TMS320C6713 + DUAL FPGA BOARD

4. Xilinx BASED STANDALONE TRAINER KITS

i. Cool Runner Development kit (VVSM-05)ii. Spartan 3 FPGA main board (VVSM-07)iii. Xilinx Spartan 3E FPGA Trainer Kit : (VSK-Spartan 3E)

5. ALTERA FPGA STANDALONE TRAINER KITi. Cyclone FPGA Trainer [VVSM-04]

6. COST EFFECTIVE FPGA/CPLD TRAINERi. Spartan 3E Project Card [VPTB-05]

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7. WIRELESS TRANSMISSION

i. EmbeddedBlue eb505-SER OEM Bluetooth trainerii. ZigBee-ready RF Transceiveriii. 2.4 GHz RF Wireless Module

8. ARM 7 + FPGA + MULTI FUNCTION CARD

9. PLD TRAINER [VSTM-04]

10. EXPERIMENT MODULES

1. Switches Module [VVSI -01]

2. LED’s Module [VVSI-02]

3. 7 Segment LED Display Module [VVSI-04]

4. SRAM Module [VVSI-05]

5. Logic Gates Module [VVSI-10]

6. Modulo - N Synch / Asynch Up / Down Counter Module [VVSI-11]

7. Multiplexer / Demultiplexer Module [VVSI-12]

8. ALU Module [VVSI-13]

9. Digital Clock Module [VVSI-14]

10. ADC & DAC Interface Module [VVSI-15]

11. I/O Card Module [VVSI-16]

12. 18 Keys, 6 Digit 7 Segment Display Module [VVSI-18]

13. Data Acquisition Module [VVSI-23]

14. SDRAM Module [VVSI-26]

15. Stepper Motor, DC Motor, Temperature and Relay Card [VVSI - 25]

16. Flash Memory Interface [VBMB/VIPAC-01]

17. Opto-Isolated I/O Card [VBMB / VVSI-01]

18. Traffic Light Controller [TRAF]

19. AD73322 Based Audio CODEC

20. 5.7"¼ VGA STN Monochrome Display Interface Board [VBMB-VIPAC-04]

21. Add-on Board [ VVSI - 29 ]

22. Memory Interface Board [VVSI-30]

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11. VHDL SOFTWARE IP

SOFTWARE IP HARDWARE REQUIRED

1. 8255 Software IP Core in VHDL2. 8279 Software IP Core in VHDL3. 32 Bit Timer / Counter4. 8253 Software IP Core in VHDL5. PWM Generation for Power Electronics

Applications

8255 Simulation Module (VVSI-21)8279 Simulation Module (VVSI-22)VVSM-07, VVSI-01,VVSI-028253 Simulation ModuleVPE-Spartan 3

12. INTERFACING EMBEDDED CONTROLLER CARDS TO FPGA TRAI NER

1. Adapter to interface embedded CPU card with FPGA trainer

2. 8051 CPU Card (VPC-51)

3. PIC16F877 CPU Card (VPIC-87X)

4. PHILIPS LPC2148 Evaluation Board

13. POWER ELECTRONICS MODULES

1. FPGA Power Electronics Adapter [VVSI-28]

2. MOSFET Module [VPC-01]

3. IGBT Module [VPC-02]

4. SCR Module [VPC-03]

5. TRIAC Module [VPC-04]

6. AC/DC Source and R-L Load [VPC-05]

7. Power Electronics Application Software [VPL-SOFT 100F]

14. SOFTWARE SOLUTIONS FOR VLSI

1. ISE Foundation

2. System Generator for Simulink

3. Embedded Development Kit (EDK)

4. Chipscope - Pro

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1. UNIVERSAL FPGA/CPLD TRAINER [VVSM-06]

The universal VLSI trainer consists of a Main board with many peripheral devices like LED,parallel printer port, VGA port etc. The main board has 4 Nos. of 48 pin Euro connector forplugging in the Daughter boards, which contains the FPGA or CPLD of any manufacturer.

UNIVERSAL VLSI MAIN BOARD

* VVSM-06 supports various FPGA / CPLD devices like Xilinx, Altera, Actel etc.,* Features :

# Accomodates any 1.2V, 1.5V, 1.8V, 2.5V, 3.3V and 5.0 V devices# Upto 180 user definable Input/output (I/O) pins available at 10 Nos of 20 Pin Headers# On board PLL circuitry to generate different clock frequencies (User can select by

jumpers)# Work upto 100 MHZ Frequency# On board Features:

- VGA Interface- PS-2 Keyboard/Mouse Interface- 4 × 4 Matrix push button keyboard- 20 × 4 Alpha Numeric LCD display

- One 8 bit 8 channel ADC- 8 Bit Two channel DAC- One RS232 Serial port interface, One parallel printer port- 4 Digit 7 Segment LED display- 32 Input DIP Switches & 32 Output LEDs.

Note : Any one of the following Piggy back boards must be purchased to work with the aboveVVSM-06 Main board

Page 8: VLSI,DSP &Image Processing Trainers

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A. Xilinx FPGA Piggy back boards:

i. Spartan-3 Piggy back board

* 400K usable gates* Devise Used : XC3S400* 2MB Flash PROM to configure* JTAG Interface facility* Compatible with Xilinx ISE

Foundation / WebPACK software

ii. Spartan -3E Piggy back board

* 500K usable gates* Device used : XC3S500E* 4MB Flash PROM to configure* JTAG Interface facility* Compatible with Xilinx ISE

Foundation / WebPACK software

iii. Virtex-II piggy back board

* Device used : XC2V250* 250k gates* Compatible with Xilinx ISE Foundation

/ WebPACK Software

iv. Virtex-II pro piggy back board

* Device used : XC2VP4* One Built in IBM 400 MHZ Power

PC Processor* 4MB Flash PROM to configure* JTAG Interface facility* Compatible with Xilinx ISE Foundation

/ WebPACK Software

B. Xilinx CPLD Piggy back board

i Cool runner II CPLD Piggy back board

* Device used : XC2C256 * 6000 system gates, 256 Macro cells* JTAG Interface facility* Compatible with Xilinx ISE

Foundation / WebPACK Software

Page 9: VLSI,DSP &Image Processing Trainers

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C. Altera based Piggy back boards

i. Altera Max II CPLD Piggy back board

* Device Used : EPM1270T144C5ES* Logical elements : 1270* JTAG Interface facility* Macro cells : 980* ALTERA QUARTUS II Web edition

software compatible

ii. Altera Cyclone FPGA Piggy backboard

* Device Used : EP1C6Q240C8 * 100K usable gates* Onboard 1 Mbit configuration serial

PROM* JTAG Interface facility* ALTERA QUARTUS II Web edition

software compatible

iii. Altera Stratix II Piggy back board

* Device Used : EP2S15F484C5 * Logical elements : 15,600* DSP Blocks : 12* 48 Multipliers* Onboard 4 Mbit configuration serial

PROM* JTAG Interface facility* ALTERA QUARTUS II Web edition

software compatible

D. ACTEL PROASIC PLUS Piggy backboard

* Device Used : APA300-PQ208* 300K Usable gates* Flash FPGA Family device* JTAG Interface facility* Libero IDE design Web edition software

compatible

Programmer :* Flash Pro Lite Programmer should

necessarily be purchased to download theprogram to Flash FPGA of ACTELPROASIC PLUS.

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2. ADVANCED UNIVERSAL FPGA TRAINER (VVSM - 09)

Refer Page - 30

3. TMS320C6713 + DUAL FPGA BOARD

Many applications require a integrated solution of DSP & FPGA. This board is designed for oneMain board with TMS320C6713 DSP Processor and an Add-on board with that dual FPGAdevices. Many peripherals like 2 MSPS ADC, 8 channel DAC, USB etc., have been included inthe board for various applications

6713 BOARD FEATURES

On chip Features* Highest performance floating point DSP

operating at 150 MHz* 32 bit EMIF, 16 bit HPI* Two multichannel Audio serial ports

(MCASPs) & Buffered serial ports (MCBPs)

* 4KB LIP Program cache memory, 4 KBLID data cache memory

* 256KB L2 unified cache mapped RAM

On-board Features:* 256K × 16 bit flash for monitor & 4 Mb × 16 bit SDRAM for program & Data memory* One RS232 interface for Host support terminated at 9 pin “D” male connector* One USB interface for Host support in full speed mode (12mbits/sec)* One 12 bit, 12 channel, 2 MSPS SPI based ADC* One 12 bit, 8 channel, 30 MHz SPI based DAC* One 16 / 20 bit stereo CODEC operating upto 48 KHz.* 16 digital I/O* 2 × 96 pin Euro connected for fast CODEC, 12/14/16 bit ADC & DAC in serial / parallel

communication through VDSP-Link bus & memory expansion (Optional)* Powerful windows based debugger facility

DUAL FPGA BOARDS* 1st FPGA Board Features

# 16 PWM outputs (Isolated)# 24 Isolated Digital I/Os# 8 Capture Isolated Inputs# 16 Output LEDs

* 2nd FPGA with ADC# 16 channel, 12 bit serial ADCs

- 4 Nos of AD7266, each has dual 12 bit ADC.- 2 MSPS throughput for each ADC

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4. XILINX BASED STANDALONE TRAINER KITS

XILINX CPLD STANDALONE TRAINER KIT

i. Cool Runner Development Kit [VVSM-05]

* 128 Macro Cell XCR3128XL Cool RunnerXilinx CPLD.

* 16 Inputs using dip switches.* 16 outputs with LED indication.* Two Nos 7 segment display.* 20 × 4 LCD Display.* Built-in 1149.9 JTAG interface.* User selectable clock frequency [ 1 to

100 MHz].* 4 × 4 Matrix Keyboard.* 25 pin D type connector for printer interface.* Two 20 pin connectors provided to interface

our Add-on cards.* Compatible with Xilinx ISE Foundation / WebPACK Software.* Parallel cable is provided for downloading.

XILINX FPGA STANDALONE TRAINER KIT

ii. Spartan 3 FPGA Main Board [VVSM - 07]:

* Device : XC3S400 - 4PQ208.* 400K gate Xilinx Spartan 3 device.* Upto 137 user I/Os.* JTAG and serial mode configuration facility.* Can be used with a variety of add-on cards

(Switches, LEDs, 7-Segment, SRAM etc).* Onboard Programmable oscillator [ 1 to 100

MHz].* Termination : All pins are terminated at 8

Nos. of 20 Pin Connector.* Compatible with Xilinx ISE Foundation /

WebPACK Software.* Parallel cable is provided for down

loading.OPTIONAL:

* On board 2MBit flash for configuring the FPGA.* Device used : XCF02SVO20C.

iii. Xilinx Spartan 3E FPGA Trainer Kit : (VSK - Spartan 3E )

Refer Page - 1

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5. ALTERA FPGA STANDALONE TRAINER KIT

i. Cyclone FPGA Trainer [VVSM-04]* Device used : EP1C6Q240C8 (Cyclone Family).* 100K usable gates.* Upto 180 user I/O Pins.* 32 Input switches & 24 output LEDs.* 2 Nos. of 7 segment Display.* 1 No. of 20 × 4 LCD Module.* 2 Keys for Clock and Reset.* JTAG/Serial Configuration facility.* Software :

# Altera Quartus II Web editionsoftware compatible.

* Byteblaster MV cable* All 180 I/O pins are either used for on

board peripheral interface like switches, LEDs, LCD etc and also terminated at 8 groupsof 20 pin header, selectable by jumpers.

Optional* On board 1 Mbit Serial PROM to configure the FPGA.* Byteblaster II cable

6. COST EFFECTIVE FPGA/CPLD TRAINER

i. Spartan 3E Project Card [VPTB-05]

* Xilinx XC3S100E-4TQ144C Spartan 3E FPGA

* 100k gates & 2,160 logic cells.* 108 User I/Os* 3 numbers of 20 pin header to interface VLSI

based experiment modules.* 8 numbers of digital inputs & outputs* On board programmable oscillator [3 to 200 MHz]* One 16 × 2 alphanumeric LCD display* One RS232 UART* 4 Channel, 8 bit, I2C ADC & single channel DAC* Onboard variable preset for giving input to 1st ADC.* 8 numbers of 5V compatible PWM (Pulse Width Modulation) / Capture* One PS/2 keyboard / Mouse Interface Connector* Prototyping Area* FPGA configuration through JTAG port* On board configuration through Xilinx Flash PROM XCF01S.* Built in a sleek plastic cabinet with built in SMPS-5V/ 2A

Page 13: VLSI,DSP &Image Processing Trainers

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7. WIRELESS TRANSMISSION

i. EmbeddedBlue eb505-SER OEM Bluetooth trainer

* S i m p l e s e r i a l U A R Tcommunications and control

* Seamless connectivity with anyBluetooth devicetr

* Fully embedded solution with noBluetooth host stack required

* Low current consumption for longbattery life

* 2.4GHz FHSS (Frequency Hopping Spread Spectrum) technology ensures high reliabilityand is robust to interference

* Standard 0.1” headers for simple prototyping and integration* Complete with sample applications and source code.* Interface with any of our VLSI Trainers

ii. ZigBee-ready RF Transceiver* True single-chip 2.4 GHz IEEE

802.15.4 compliant RF transceiverwith baseband modem and MACsupport

* DSSS baseband modem with2MChips/s and 250 kbps effectivedata rate.

* Digital RSSI / LQI support* Suitable for both RFD and FFD operation* I/Q low-IF receiver & I/Q direct upconversion transmitter* 128(RX) + 128(TX) byte data buffering* Hardware MAC encryption (AES-128)* Interface with any of our VLSI Trainers

iii. 2.4 GHz RF Wireless Module

* World wide 2.4 GHz ISM Band* Compliance with FCC and CE /

BZT requirements* High efficient FM -FM Modulation

/ Demodulation scheme* Transmitting and Receiving of wide

band video and two audiosubcarrier

* User specified RF transmitting power upto 100mV* Optional user pre-programmed micro

Page 14: VLSI,DSP &Image Processing Trainers

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8. ARM 7 + FPGA + MULTIFUNCTION CARD

ARM 7 + FPGA Board Features* The LPC2292 - based on a 16/32 bit ARM7TDMI-S™ CPU* 16 kB on-chip Static RAM* 256 kB on-chip Flash Program Memory* 128-bit wide interface/accelerator enables high speed 60 MHz operation* 4 Mbit External Flash RAM* Two interconnected CAN interfaces with advanced acceptance filters* Serial interfaces

1. Two UARTs 2. Fast I2C (400 kbits/s) 3. Two SPIs™* Eight channel 10-bit A/D converter with conversion time as low as 2.44 ms* Configurable external memory interface with up to four banks, each up to 16 Mb and

8/16/32 bit data width.* 4 Mbit External SRAM* 9 edge/level sensitive external interrupt pins available.* 10 Mbps Ethernet Interface* 51 I/O Lines of FPGA, Ethernet etc., are terminated at 50 pin connector* Xilinx Spartan 3 Device :XC3S400

# System Gates : 400K # 288 Kbits of total Block RAM# 326 MHz system clock rate # 56 Kbits of total Distributed RAM# 16 Dedicated 18 x 18 multipliers # 4 Digital Clock Manager

Multifunction Card Features* One 16 × 2 LCD & 4 × 4 Matrix Keyboard* Stepper Motor Interface* 2 ADCs of 3 MSPS each, 14 bit resolution* 4 Channel, 12 Bit DACs* RS232 / SPI Serial Port* Temperature Sensor Interface* USB 2.0 Compliant interface (480 Mbits/Sec)

Adapter Card Features* RJ45 Connector for Ethernet Connectivity* Connector for upto 1 GB SD card / MMC / CF upto 1GB* FPGA lines are terminated at 3 Nos of 20 pin connector integrating with many add-on cards

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9. PLD TRAINER [VSTM-04]

PLD Trainer [VSTM-04] is a complete training and development package for PAL/GAL device.It consists of i) Programming Section ii) Training Section iii) Software

* The programming section featuresa ZIF Socket for easy deviceinsertion and designed for ATMELFLASH PLDs.

* The Training section provides a 20pin ZIF Socket and I/O devices likeLED, Switches etc. , forimplement ing the studentsreference designs.

* Software section consist of AtmelWin CUPL compiler, Editor andprogramming software.

Programmer Supports

* Atmel ATF16V8B, ATF16V8BQL, ATF16V8C* Atmel ATF20V8B* Atmel ATF22V10C

Training Board

* 8 input switches* 8 Output LEDs and 7segment LED display* Push Button switches are supplied for clock and output enable functions

Operating System

* Win 98, Win 2000 , Win ME, Win XP

Experiments

* All logic gates * D-Type Flip flops, Latches* 7 Segment Display Decoder* Decade up down counter* 7 segment to Hex decoder* Multiplexer & Demultiplexer* Adder & Subtractor etc.,

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10. EXPERIMENT MODULES

The following experiment boards are designed to be compatible with the CPLD & FPGA Trainer& Development boards through 20 pin headers.

1. Switches Module [VVSI-01]

* 32 DIP switches* Easy input to your designs - data settings, control* Easy viewable settings* Designed to pair up with the LEDs, 7 Segment

Displays.

2. LEDs Module [VVSI-02]

* 32 Surface mounded red LEDs* Invaluable for demonstrating, testing and debugging

circuit* Designed to pair up with switches (or) 7 segment

displays

3. 7 Segment LED Display Module [VVSI-04]

* Four high brightness Seven Segment LED Displays* Display data values (Decimal, Hex,...etc) and

diagnostic codes * Invaluable for demonstrating, testing and debugging

circuits* Designed to pair up with switches, LEDs

4. SRAM Module [VVSI-05]

* 2 Mbits of very fast 15ns static RAM* Accessible as 128K x 16 bit, 256K x 8 bit* Store and process data streams for any

applications* Simple Interface, no complex controller - required

in the FPGA

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5. Logic Gates Module (VVSI-10)

* LEDs are provided to see the output status ofthe experiment

* All the inputs and outputs are terminated atpatch connectors.

* Drivers are provided to drive the LEDs,Switches are provided for logical input as a highor low with LED indication

* Using this trainer we can study about the gateslike AND, OR, NOT, NAND, NOR, XOR

* The mimic diagram and the truth table of thegates are shown on the front side of the PCB

6. Modulo-N Synchronous / Asynchronous up / down Counter Module(VVSI-11)

* Switches are provided to set the startingdata for counter with LED indication

* Outputs of the counter is indicated by LEDs* One switch is provided to reset the counter.* The mimic diagram and the truth table are

shown in the front side of the PCB

7. Multiplexer / Demultiplexer Module (VVSI-12)

* Switches are provided for giving the inputto the Multiplexer

* LEDs are provided to see the output statusof the Demultiplexer

* Using this trainer we can study the logic ofMultiplexer/Demultiplexer

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8. ALU Module (VVSI-13)

* Switches are provided for giving input tothe ALU unit

* Using this ALU unit, we can operate thearithmetic operations like Addition,Subtraction, Multiplication and LogicOperations like AND, OR, NOT gates.

* LEDs are provided to see the outputstatus of the ALU unit

* One switch is provided to give the inputto the ALU unit for selecting Arithmeticor Logic unit

9. Digital Clock Module (VVSI-14)

* 6 Digit 7 segment display is provided tosee the digital clock

* Switches are provided to set the time asper our requirement

* One switch is provided to reset or start thedigital clock

10. ADC & DAC Module (VVSI-15)

* 4 Channel high speed 12 bit ADC(AD7862)

* LED is connected to the output of ADC* Input Voltage Range : ±10V, ±2.5V * Conversion speed : 250KHz * Analog Inputs terminated in J801

Connector* Single channel 12 bit DAC (AD7392)* Output Range : (0-5V)* DAC Output is terminated in J801

Connector* This board can be interfaced to any one of

our FPGA / CPLD trainer through twonumbers of 20 pin Header

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11. I/O Card Module (VVSI-16)

* 16 nos. of switches are provided to give the inputswith LED indication

* 16 nos. of LEDs are provided to see the outputsof the data

* The inputs and outputs are terminated at a patchconnector for our usage

12. 18 Keys, 6 Digit 7 Segment Display Module (VVSI-18)

* 18 keys keyboard is provided* 6 digit 7 segment display is provided to display

message and roll the message* Keys & 7 Segments are terminated at a connector

13. Data Acquisition Module [VVSI-23]:

a. 12 Bit Integrating ADC* 8 Channel single ended Analog voltage inputs (Range : 0-5V)* Dual slope, Ramp type, 7 samples/sec (conversion)* Single channel can be configured as current input (4-20mA)

b. 12 Bit DAC :* Single channel Digital to Analog converter using AD7392* Can be configured as current output (4-20mA)* 12 bit resolution* Output voltage range (0-5V)

c. Digital I/O :* 8 digital outputs with edge connector terminations and LED indication* 8 Digital inputs with edge connector terminations with SPDT Switches.

14. SDRAM Module [VVSI-26]

* 4MBit very fast Synchronous Dynamic RAM* Accessible as 4M × 16 bit* JEDEC Standard 3.3V power supply* All inputs are sampled at the edge of the system

clock.

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15. Stepper Motor, DC Motor, Temperature and Relay Card (VVSI - 25)

* This board can be interfaced to any of our FPGA/ CPLD trainer through 20-pin header

* Driver for controlling a stepper motor rangingfrom 2Kg to 20Kg and provided with 2 KgStepper motor with the board

* One 12V DC motor provided with driver* Provision for connecting Internal or External power

supply selectable by jumpers* Relay driver provided to activate the 12V relay* One AD590 Sensor is provided to measure the temperature.

Accessories:

* Multi output SMPS +12V, -12V,5V

16. Flash Memory Interface (VBMB/VIPAC - 01)

* Compatible for VXT Bus and VVSI-Bus* 1Mbit of Uniform sector flash memory* Erase, Read and Write operation at 5V* 120ns maximum access time* Accessible as 128KB X 8 bit

17. Opto-Isolated I/O Card (VBMB/ VVSI-01)

* Compatible for VXT Bus and VVSI-Bus* 8 Nos. of Isolated inputs.* 8 Nos. of Isolated outputs.* Isolated Inputs and outputs are terminated at the

J801 connector* External Isolation Voltage: Upto 24V DC.

18. Traffic Light Controller (TRAF)

* Connected to VLSI port* 32 LEDs provided to simulate traffic control system* Buffers provided for individual LEDs* Application : Traffic Light Simulation

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19. AD73322 Based Audio CODEC

* Based on AD73322 a general purpose dual & analog frontend processor for speech, telephony, vibration etc.,

* Programmable Input/Output sample rate (8 kb, 16kb, 32kb,64kb)

* Application like low bit rate high quality compression,speech enhancement, recognition, synthesis etc., are possible.

* All analog signals are terminated at connectors.

20. 5.7"¼ VGA STN Monochrome Display Interface Board [VBMB-VIPAC-04]

* This Board consists of Mitsubishi graphic display controller.* 15 Pin connector to Interface with Monochrome LCD.* Two 20 pin connectors to interface this Board with VLSI Boards.

Controller Details:* The M66271FP from Mitsubishi is a graphic display only

controller for Displaying a high duty Dot matric LCD.* Monochrome LCD of upto 76800 dots* Built in 9600-byte (76800 bit) VRAM [equivalent to one

screen of 320 × 240 dotsLCD].

TFT LCD Details:* Hitachi LCD of SP14Q002-A1 is used* Dot number : 320 (W) × 240 (H)* LCD Type : 128MB Flash SD LARD* BACK lights : Cold cathode Fluorescent lamp.

21. Add-on Board [VVSI-29]* One 16 × 2 LCD & 4 × 4 matrix keyboard* Relay & Stepper Motor interface* 2 ADCs of 3 MSPS each, 12 bit resolution* 4 Channel, 12 Bit DACs* RS232 / SPI Serial Port* Temperature sensor interface* USB 2.0 Compliant interface (480 Mbits/Sec)

22. Memory Interface Board [VVSI-30]

* 8MB × 16 bit SDRAM* 32MB × 16 bit DDR SDRAM* 128 MB Flash SD CARD* 4MB × 16 bit Flash Memory.

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11. VHDL SOFTWARE IP

The following hardware IC's VHDL Code (IP) have been developed and made it available tostudents. The students can modify or add more features to the existing IC features. For example,you can add 16 bit Timer to 8255 core.

1. 8255 Software IP Core in VHDL

Overview

The C-8255 core is the VHDL model of the Intel™ 8255 Programmable Peripheral Interfacedevice designed for use in Intel microcomputer systems. It reduces the external logic normallyneeded to interface peripheral devices. Its function is that of a general purpose I/O componentto interface peripheral equipment to the microcomputer system bus.

Features

* Functionally based on the Intel 8255A device * Three 8-bit peripheral ports: PA, PB, PC * Three programming modes for peripheral ports

i. Basic input/output mode.ii. Strobed input/output mode.iii. Bi-Directional bus mode.

* Total of 24 programmable I/O lines * 8-bit bidirectional system data bus with standard microprocessor interface controls* Direct bit set/reset capability, easy control application interface.

RECOMMENDED HARDWARE

Simulation of 8255 Module [VVSI-21].

* The add-on board consist of following features# 50 pin header to interface the board with

Microprocessor / Microcontroller.# Zip socket is provided to compare &

learn the functions of 8255 IC.

Note:

* Need any one FPGA Main Board like VVSM-06with FPGA Piggy Back, VVSM-09, VVSM-07, VVSM-04, VSK-Spartan 3E

* Any one our make (Vi Micro) :P or :C Trainer kit should be provided by the institutionto conduct the above experiment

* 8255 Bit file only supplied at the time of delivery* 8255 IP Core will be sent upon License Agreement with the college

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2. 8279 Software IP Core in VHDL

Overview

The C-8279 Core is the VHDL model of the Intel™ 8279 Programmable Keyboard/DisplayInterface device designed for use with Intel microprocessors. The keyboard portion providesa scanned interface to 64-contact key matrix while the display portion provides an interfacefor popular display technologies (e.g. LED).

Features* Functionally based on the Intel 8279 device * Simultaneous keyboard display operations* Scanned keyboard and sensor modes* Strobed input entry mode* 8-character keyboard FIFO* 2-key lockout or N-key roll over with contact debounce * Dual 8- or 16-numerical display* Single 16-character display RAM* Programmable scan timing and mode* Interrupt output on key entry* Complete simulation of 8279

# Simultaneous keyboard display operations# 8 character FIFO# 2 key lock out or N - key roll over with contact debounce.# 6 Numeric and character display.

RECOMMENDED HARDWARE:

8279 Simulation Module [VVSI-22]

* 50 pin header to interface the board withMicroprocessor & Microcontroller.

* 4 × 4 matrix keyboard.* 6 digit 7 segment LED display.* One ZIF socket provision for testing the

functions of a Intel 8279 IC.* To check the simulation functions the

Output downloadable file will be given.* Sample source code will be given for keyboard & Display Accessing.

Note:

* Need of any one FPGA Main Board like VVSM-06, with FPGA Piggy Backs, VVSM-09,VVSM-07, VVSM-04, VSK-Spartan 3E

* Any one of our make (Vi Micro) :P or :C trainer kit should be provided by the institutionto conduct the above experiment.

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3. 32 Bit Timer / Counter

* 6 Channel 32 bit timer / counter* Start with a preset value and count Up / Down* Capture the 32 bit count value by Software command / Hardware signal * Enable or Disable count by Software command / Hardware signal* Status register bits is set, when threshold value is reached and counter overflows after

reaching ...FFH while counting Up and ..00H while counting down.* Clear the content of the Counter by Software / Hardware signal

RECOMMENDED HARDWARE

VVSM-07 or VVSM-09 or VVSM-06 and Experiment Board of VVSI-01 & VVSI-02

4. 8253 Software IP Core in VHDL

* 3 Channel 16 bit timer/counter* Input clock from DC to 2 MHz.* Programmable counter modes* Count Binary or BCD.

Note 8253 IP Protocol is verified by interfacing with Intel 8051 or Philips 89C51Microcontroller or any of our VXT bus interface connector.

RECOMMENDED HARDWARE

8253 Simulation Board

* XilinxXC3S500E - FT256 Spartan 3E FPGA* 500K gates & 10,476 Logic cells* FPGA configuration through JTAG* Complete Simulation of 8253* 3 Channel Decrement Counter* 50 pin header to interface the board with

Microprocessor/ Microcontroller* One NCNO Switch is provided to give the

manual clock.* One ZIP Socket provision for testing the

functions of a INTEL 8253IC.* Sample source code will be given.

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5. PWM Generation for Power Electronics Applications

* Implementation of Event Manager Modules(EVA & EVB) consists of - Two General Purpose (GP) Timers.- Three Compare Units, Three Capture Units.- Event Manager Interrupt Logic.- PWM Circuits

* Speed & Resolution is high* Can be interfaced to a powerful 32 bit Embedded controller or a DSP Processor.

RECOMMENDED HARDWARE

1. VPE-SPARTAN 3 FPGA CONTROLLER

This board is specially designed for Power Electronics applications, based on the latest FPGASpartan-3 family, XC3S400-4PQ208 of 400K gates. The board comes with high speed 12-bitADC & DAC for closed loop control. This will be a useful FPGA development board for PowerElectronics & Drives Applications.

* 12-Channel, 12 bit serial ADC:# Dual 12 bit ADC using AD7266.# Each ADC offers 6 channel single-

ended or 3 channel Differentialinputs

# 2 Channel simultaneous sampling.* 8-Channel, 12-bit serial DAC (AD5328)* PWM, Capture and GPIO lines.

# 8 Nos of I/O lines of the FPGA areused as PWM output lines.

# 6 Nos of I/O lines of the FPGA areused as 6 capture inputs forinterfacing Encoder.

# 8 Nos of I/O lines of the FPGA can be used as General- purpose I/O Lines.* I 2C based key pad & LCD display.

A separate board with,# 4 × 4 keys keypad for select , Increment, Decrement, Reset functions.# 16 × 2 alphanumeric LCD Display to select the program as well as to display the firing

angle, etc.,* Configuration

# Slave serial and JTAG Mode# Onboard Serial Flash PROM XCF02S.

* Drives Power Module connectivity# One 34 Pin header is provided to terminate PWM output and capture Inputs.# One 26 Pin header is provided for the ADC input signals.

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12. INTERFACING EMBEDDED CONTROLLER CARDS TO FPGA TRAINER

1. Adapter to interface Embedded CPU card with FPGA trainer

* Used to interface the embedded controller based CPUcards with any of our FPGA trainer

* If the FPGA trainer is connected to these CPU cards, itwill act as VAPC or VIPAC series of add-on cards

* Students can program FPGA as RTC/8255 / 8279 / 8253or any other applications and use it as an add-on card tothe CPU card.

Note : This board should be purchased to interface the following Embedded Controller Cards

2. 8051 CPU Card (VPC-51)

* 8051 CPU operating at 11.0592 MHz* 32KB EPROM & 64KB SRAM for program & data

memory* RS232/RS485 serial port to interface with PC* 4 channel 8 bit serial ADC & 1 channel 8 bit serial

DAC* 2 Numbers of 50 PIN expansion connectors to

interface Memory/IO mapped series of add-on cards* RS 232 cable with Downloader software to download programs from PC to target card.* 8051 C compiler* Example programs in assembly & embedded C with documentation

3. PIC16F877 CPU Card (VPIC-87X)

* Microchip PIC 16F877, 8bit RISC CPU Operating at 20 MHz* 8K × 14 words on-chip Flash memory

* RS232 serial port to interface with PC* 8 Channel 10 bit ADC* 2 Channel 10 bit PWM* 50 PIN expansion connectors to interface I/O

mapped series of add-on cards* SPI & I2C serial interface support* In system programming facility to download hex

code from PC to target card* RS232 cable with Downloader software to

download programs from PC to target card.* MPLAB Assembler & C compiler * Example programs in assembly & embedded C with documentation.

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4. PHILIPS LPC2148 Evaluation Board

* Philips LPC 2148 ARM7TDMI core CPU* On-chip 512KB ISP flash memory* On chip USB, I2C & SPI support* On-chip 10 bit ADC & 10 bit DAC* 50 PIN expansion connectors to interface I/O

mapped series of add-on cards* RS232 serial port to interface with PC* SPI & I2C serial interface support

* In system programming facility to download hex code from PC to target card* Downloading cable with Downloader software to load programs from PC to target card.* ARM C compiler* Example programs in assembly & embedded C with documentation

13. POWER ELECTRONICS MODULES

1. POWER ELECTRONICS APPLICATION BOARDS

The following power modules can be interfaced to any of our FPGA/CPLD trainers through"FPGA POWER ELECTRONICS ADAPTER".

i. FPGA Power Electronics Adapter [VVSI-28]

* 20 pin input connector from FPGA Trainer board* 6 output lines ( PWM lines generated by VHDL

program) are terminated at screw type connector tointerface with various power modules.

ii. MOSFET Module (VPC-01)

* One number of IRF840 MOSFET with snubbercircuit and heat sink provided for power circuit

* One number of IR2110 driver IC used as driver withopto isolation

* One 2 pin Screw type phoenix connector for MOSFET terminals Drain & source andanother 2 pin connector for PWM input from FPGA controller.# PWM input : 0-5V/0-3V level# Power input : 0-24V DC @ 2Amp

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iii. IGBT Module (VPC-02)* One number of IRGBC20S IGBT with snubber circuit

& heat sink provided for power circuit* One number of IR2110 driver IC used for IGBT driver

with opto isolation.* One 2 Screw type phoenix driver IC used for IGBT terminals Cathode & Emitter and

another 2 pin connector for PWM input from FPGA Controller.* PWM input : 0-5V/0-3V level* Power input : 0-24V DC @ 2 Amp

iv. SCR Module (VPC-03)* One number of TYN612 SCR with snubber circuit &

heat sink provided for power circuit* One number of pulse amplifier circuit with pulse

transformer provided for SCR pulse isolation* One 2 pin Screw type phoenix connector for SCR

terminals Anode & cathode and another 2 pin connectorfor SCR pulse input from FPGA Controller.

* One number of step down transformer with ZCD circuit provided for supplysynchronization and terminated at screw type terminals

* PWM input : 0-5 V/0-3V level* Power input : 0-24V AC/DC @ 1A

v. TRIAC Module (VPC-04)* One number of BTA12 TRIAC with snubber circuit with

heat sink provided for power circuit* One number of pulse amplifier circuit with pulse

transformer provided for TRIAC pulse isolation* One 2 pin Screw type phoenix connector for TRIAC

terminals MT1 & MT2 and another 2 pin connector for SCR pulse input from FPGAcontroller.

* One number of step down transformer with ZCD circuit provided for supplysynchronization and terminated at screw type terminals to FPGA controller.

* PWM input : 0-5V/0-3V level* Power input: 0-24V AC,1 Amp

vi. AC/DC Source and R-L Load [VPC-05]:* One number of fixed resistor provided for R- load* One number of inductor provided for L-load.* One number of 24V DC,1 Amp supply provided for

power circuit input.* One number of 24V AC,1 Amp provided for power

circuit input* One number of +15V DC supply provided for control

card* Necessary connector provided for supply and load output* Fuse provided for protection

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vii. Power Electronics Application Software (VPE-SOFT 100F)

The application program are written in VHDL language using XILINX-ISE foundation softwareSample programs provided for the following experiments.

* Single phase SCR AC Voltage Regulator with R-RL load* Single phase TRIAC AC Voltage Regulator with R-RL load* Single phase Half-Fully Controlled Converter with R, RL load* IGBT/MOSFET based Single/Two/Four quadrant chopper with R, RL load* IGBT/MOSFET based single phase sine PWM inverter with RL load* MOSFET based Fly-Back Converter* MOSFET based Buck Converter* MOSFET based Boost Converter* MOSFET based Buck-Boost Converter* Open Loop Speed Control of three phase AC Induction Motor using V/F control (SPWM)* Closed Loop Speed Control of three phase AC induction Motor using V/F control (SPWM)

14. SOFTWARE SOLUTIONS FOR VLSI

1. ISE FOUNDATIONThe industry’s most complete programmable logic design solution for optional performance,power management, cost reduction, and productivity support for all Xilinx leading FPGAs andCPLDs including Virtex-4/5 multi-platform FPGAs..

* Devices : Supports all series* Design Entry : Schematic & HDL Editor, State Diagram Editor, Xilinx Core

Generator System, RTL & Technology Viewers, PACE* Synthesis : Xilinx Synthesis Technology* Implementation : Floor Planner, Modular design, PlanAhead [Sold as an Option]

Timing Driven Place & Route, Back Annotate, Timing ImprovementWizard & Xplorer

* Programming : Impact/system ACE* Verification : ChipScope Pro (Evaluation Package), Graphical Testbench Editor &

ChipViewer, ISE Simulator & Xpower (Power Analysis), ModelSimXE III Starter, ModelSim XE III [Sold as an Option]

2. SYSTEM GENERATOR FOR SIMULINK

The leading edge, modeling and implementation tool for high performance DSP Systems. SystemGenerator for DSP is fast becoming the preferred framework for developing and debugginghigh-performance DSP systems using the industry’s most advanced FPGAs.

KEY FEATURES* Performance - Easily build and generate high-performance DSP Systems.* Embedded system design Build DSP co-processors for the Xilinx MicroBlaze processor* High-bandwidth hardware co-simulation for accelerating simulations. * MATLAB to RTL capabilities.* Mixed-language design - Import HDL modules and co-simulate them using ModelSim.* In-system debugging at system speed.

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3. EMBEDDED DEVELOPMENT KIT (EDK)

Encompassing solution for designing embedded Programmable systems.* Platform Studio Integrated Development Environment* Platform Studio Software Development Kit (SDK)* Embedded Systems Compiler and Debugger Tools* Board Support Package Generation* Processor IP library * MicroBlaze soft processor core license

4. CHIPSCOPE PRO

ChipScope Pro delivers in-circuit real-time debug for any signal on the FPGA, streamliningyour design debug

ChipScope Pro inserts logic analyzer, bus analyzer, and Virtual I/O low-profile software coresdirectly into your design, allowing you to view any internal signal or node, including embeddedhard or soft processors.

* Analyze any internal FPGA signal, including embedded processor busses* Built-in software logic analyzer helps identify and debug problems, including advanced

triggering, filter, and display options* Verify your FPGA on the board at or near operating speed* Change probe points without re-synthesizing* Using the Pattern Generator & Logic Analyzer features, the FPGA hardware

implementation can be verified and debugged very easily. Hence no need for a separateexpensive hardware Logic analyzer.

* Debug over an internet connection using remote debug, from your office to the lab, or across the globe

Note1. Price for the above software are university package price. To avail this price, user should

provide a letter on their institution letterhead - stating that, the software will be used onlyfor educational purpose.

2. All the software will come in DVD format only. For the installation DVD drive is needed,it should be provided by the institution.

3. All the software is having one year free up gradation from the date of sale made by ourprinciple. Also Xilinx will release number of new VLSI processors, which will be supportedby the latest version software only. Every year it is advisable to up grade the software.Approximately the up gradation charges will be 50% of the original value

4. If you are purchasing the other software from Xilinx like Chipscope Pro, EDK, SystemGenerator & Forge Compiler ,it will work with Xilinx ISE Foundation Series originalversion only. The version of the software also should be same. For example if yourpurchasing EDK tool version 8.2, then the ISE SERIES also should be 8.2 version.

5. For Systems Generator it require MATLAB version 7.1.0.246 (R14) service pack 3 andabove.

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The universal FPGA trainer consists of a main board with many peripherals like USB, Host & Peripheral, Ethernet, Serial ports, Parallel Port, VGA port, Graphics LCD, Switches, LED’s, ADC & DAC etc. This motherboard has 4 Nos of high speed connectors for plugging the daughter boards, which contains the FPGA of any manufacturers. Separate 2 Nos of 100 pin high speed connectors provided for hardware expansion as plugin boards.

* Industry standard interconnection

# 10 / 100 Mbps Ethernet # USB 2.0 host peripheral # Two RS232 ports - One connected at 9 pin D connector and another one connected at 5 pin connector.

* Memory Sub system

# 8 MB × 16 Bit SDRAM # 32 MB × 16 Bit DDR SDRAM # 4MB × 16 bit flash EEPROM # 256KB I2C EEPROM

* Additional Features

# One 240 ×128 Graphics LCD # 16 Nos of Dip Switches # 16 Discrete LED’s # 4 digit 7 Segment LED Display # 4 × 4 Matrix Keyboard # One VGA Port at 15 pin ‘D’ connector # One Parallel Port at 25 pin ‘D’ Connector for Printer connection # One PS2 connector for Keyboard and Mouse. # Reset Switch # I C Real time Clock # One piezo Buzzer # One 5V Relay # 2 kg Stepper Motor Interface

2

FEATURES

ADVANCED UNIVERSAL FPGA TRAINER [ VVSM-09]

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* Analog Input & Output

# 2MSPS SPI Based ADC (12 Channel) # 800 ns SPI Based DAC (2 channel) # Temperature sensor interface # One 16 bit stereo CODEC

* 2 Nos of 100 pin high speed connectors provided for hardware expansion can be used as hardware bus. * Multilayer board for superior signal integrity * 54 I/O pins terminated at 3 Nos of 20 pin FRC connector for external interfacing. * USB Host and Peripheral Interfacing # USB host and peripheral Implementation through Cypress CY67300 device. # One USB peripheral port at full speed (12 Mbps) # 2 Host USB ports for connecting to USB Peripherals like Printers/Keyboard /Camera etc., Pen Drive for other USB Peripheral) # Full driver software provided to the pen drive.

* One IDE Connector for interfacing hard disk # Full Driver software for HDD

ADC

* 2 Channel, single ended Analog voltage * Sampling rate is 40 MSPS * Resolution : 12 Bits * The input signal can be given either through a low frequency differential ADC driver or a high frequency driver transformers. * The input signals are terminated at SMA connectors.

DAC

* 2 Channel current output DAC * Resolution : 14 bits * 125 MSPS update time * Settling time : 30 ns * Output range : -2.5V to +2.5V * DAC outputs are terminated at SMA connectors

Add-on Card for Advanced Universal FPGA Trainer (VVSM-09)

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40 MHZ ADC INTERFACE BOARD (VVSM-09#1)

Note : Any one of the following Piggy back boards must be purchased to work with the above VVSM-09 Main Board

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Supported Piggy Backs

i. Virtex 4 (XC4VSX25) - [VAFP-02]

ii. Virtex II Pro (XC2VP20) - [VAFP-03]

iii. Spartan 3 (XC3S5000) - [VAFP-01]

iv. Spartan 3 (XC3S1500) - [VAFP-04]

* Virtex 4 Family Device * 23,040 Logic cells * 448 I/O lines * Device used:XC4VSX25 -FF668 * Onboard configuration serial PROM * JTAG Connector * Compatible with Xilinx ISE foundation software

* Virtex II Pro Family Device * 20,880 Logic cells * 404 I/O lines * Device used : XC2VP20 * Onboard configuration serial PROM * JTAG Connector * Compatible with Xilinx ISE foundation software

* Spartan 3 Family Device * 5 Million System Gates * 633 I/O lines * Device used :XC3S5000-4FG900 * Onboard configuration serial PROM * JTAG Connector * Compatible with Xilinx ISE foundation software

* Spartan 3 Family Device * 1.5 Million System Gates * Device used : XC3S1500-4FG676 * Onboard configuration serial PROM * JTAG Connector * Compatible only with Xilinx ISE Foundation software

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v. Altera Stratix II - [VAFP-05]

vi. Altera Cyclone II - [VAFP-06]

* Device Used : EP2S30F672 * Onboard configuration serial PROM * JTAG Connector * Logical Elements : 33,880 * 500 I/O lines * ALTERA QUARTUS II Web edition software compatible

USB TO JTAG PROGRAMMER [VUJP-01]

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* Device Used : EP2C35F672 * Onboard Configuration Serial PROM * JTAG Connector * Logical Elements : 32,216 * 475 I/O Lines * Altera Quartus II Web edition software compatible

USB to JTAG Programmer is a high-performance download cable that attaches to your hardware for the purpose of programming or configuring any of the following devices:

* ISP Configuration PROMs * CPLDs * FPGAs

It has industry-leading performance and is compatible with Full Speed (USB 1.1) and Hi-Speed (USB 2.0) ports.

Host Computer Requirements

When using the Platform Cable USB, the host computer must contain a USB host controller and root hub with one or more USB ports. The host operating system must be eitherWindows 2000 (SP4 or later) or Windows XP (SP1 or later).

Device Family Support

* All Xilinx FPGA and CPLD devices * All Altera JTAG devices

Key Features

* True plug-and-play * Bus-powered USB device (no power supply required) * Compatible with Full-Speed and Hi-Speed USB ports * Target power status LED * Supports Boundary Scan mode