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What's New in AWR Design Environment v15 Product Version 15.03

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Page 1: What's New in AWR Design Environment v15

What's New inAWR Design Environment v15Product Version 15.03

Page 2: What's New in AWR Design Environment v15

What's New in AWR Design Environment v15© 2020 Cadence Design Systems, Inc. All rights reserved.Printed in the United States of America.

Cadence Design Systems, Inc. (Cadence), 2655 Seely Ave., San Jose, CA 95134, USA.

Open SystemC, Open SystemC Initiative, OSCI, SystemC, and SystemC Initiative are trademarks or registeredtrademarks of Open SystemC Initiative, Inc. in the United States and other countries and are used with permission.

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All other trademarks are the property of their respective holders.

Restricted Permission:This publication is protected by copyright law and international treaties and contains tradesecrets and proprietary information owned by Cadence. Unauthorized reproduction or distribution of this publication,or any portion of it, may result in civil and criminal penalties. Except as specified in this permission statement, thispublication may not be copied, reproduced, modified, published, uploaded, posted, transmitted, or distributed in anyway, without prior written permission from Cadence. Unless otherwise agreed to by Cadence in writing, this statementgrants Cadence customers permission to print one (1) hard copy of this publication subject to the following conditions:

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Disclaimer: Information in this publication is subject to change without notice and does not represent a commitmenton the part of Cadence. Except as may be explicitly set forth in such agreement, Cadence does not make, andexpressly disclaims, any representations or warranties as to the completeness, accuracy or usefulness of theinformation contained in this document. Cadence does not warrant that use of such information will not infringe anythird party rights, nor does Cadence assume any liability for damages or costs of any kind that may result from useof such information.

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Page 3: What's New in AWR Design Environment v15

Table of ContentsAWR Design Environment v15 What's New ............................................................................................ 1–1

What's New Organization ............................................................................................................. 1–1Major Feature Overview .............................................................................................................. 1–1

Known Issues for This Release .............................................................................................. 1–1VSS PHARRAY_F Block ............................................................................................. 1–1

v15 Licensing And Operating System Changes ......................................................................... 1–1Early Access Features .......................................................................................................... 1–2AWR Design Environment ................................................................................................... 1–2AWR Microwave Office and Analog Office ............................................................................. 1–2AWR VSS (VSS) ................................................................................................................ 1–2Analyst 3D Editor ............................................................................................................... 1–3

AWR Design Environment Features ....................................................................................................... 2–1Updated Equation and Variable Browser .......................................................................................... 2–1Graph Enhancements ................................................................................................................... 2–1Template Based Measurements ...................................................................................................... 2–2Linked Global Definitions and Symbols .......................................................................................... 2–3New Two-Click Windowing Mode ................................................................................................. 2–4Faster Layout Rendering .............................................................................................................. 2–4Minor Improvements ................................................................................................................... 2–5

Environment ...................................................................................................................... 2–5Equations .......................................................................................................................... 2–5Symbol Editor .................................................................................................................... 2–5User Interface .................................................................................................................... 2–5

AWR Microwave Office and Analog Office Features ................................................................................. 3–1LPF Based Units and Grids ........................................................................................................... 3–1Load Pull Improvements ............................................................................................................. 3–1Network Synthesis Wizard Improvements ........................................................................................ 3–2Stability Analysis using Loop Gain Envelope ................................................................................... 3–2APLAC Linear Subcircuit Caching ................................................................................................ 3–3Parallel and Remote Circuit Simulation ........................................................................................... 3–3Transmission Line Calculator ........................................................................................................ 3–3Optimizer Improvements .............................................................................................................. 3–4PCB Improvements ..................................................................................................................... 3–4Minimum Spacing Routing Guides ................................................................................................. 3–5Multiple Edge Selection ............................................................................................................... 3–6AXIEM Improvements ................................................................................................................ 3–6Analyst Simulator Improvements ................................................................................................... 3–6Analyst 3D Editor ....................................................................................................................... 3–7Minor Improvements ................................................................................................................... 3–8

New/Updated Examples ....................................................................................................... 3–8New Circuit Models ............................................................................................................ 3–8New Circuit Measurements ................................................................................................... 3–8

Linear Measurements .................................................................................................. 3–8Linear Stability Measurements ...................................................................................... 3–8Antenna Measurements ................................................................................................ 3–9Annotations ............................................................................................................... 3–9Network Synthesis Measurements .................................................................................. 3–9

New Scripts ....................................................................................................................... 3–9API ................................................................................................................................ 3–10

What's New in AWR Design Environment iii

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Data Files ........................................................................................................................ 3–10Layout ............................................................................................................................ 3–10Libraries .......................................................................................................................... 3–10Measurements .................................................................................................................. 3–10Netlists ............................................................................................................................ 3–11Output Files ..................................................................................................................... 3–11Simulation - APLAC ......................................................................................................... 3–11Simulation - Analyst .......................................................................................................... 3–11User Interface ................................................................................................................... 3–11Wizard - Create New Process .............................................................................................. 3–11

AWR VSS (VSS) Features .................................................................................................................... 4–15G NR Library .......................................................................................................................... 4–1PHARRAY_F MIMO Bus Support ................................................................................................ 4–1VSS Amplifier Model Updates ...................................................................................................... 4–1Digital Pre-Distortion ................................................................................................................. 4–2Analog-to-Digital Converter Update ............................................................................................... 4–2Minor Improvements ................................................................................................................... 4–2

New/Updated Examples ....................................................................................................... 4–2New/Updated System Blocks ................................................................................................ 4–3

Digital Pre-Distortion .................................................................................................. 4–3NR 5G Blocks ............................................................................................................ 4–3Analog-to-Digital Converter ......................................................................................... 4–3Amplifier Model ......................................................................................................... 4–4Frequency Controlled Switch ........................................................................................ 4–4RF Blocks ................................................................................................................. 4–4Libraries ................................................................................................................... 4–4

New System Measurements .................................................................................................. 4–4RF Budget Measurements ............................................................................................. 4–4Annotate System Measurements .................................................................................... 4–4

Measurements .................................................................................................................... 4–4System Block Updates ......................................................................................................... 4–4

Analyst 3D Editor Features .................................................................................................................. 5–1Environment .............................................................................................................................. 5–1

Search .............................................................................................................................. 5–1Structure ................................................................................................................................... 5–1

Ribbon Changes ................................................................................................................. 5–1Solid Organization Browser Buttons ....................................................................................... 5–2Custom Cameras ................................................................................................................. 5–2Solid References ................................................................................................................. 5–2Attribute Application ........................................................................................................... 5–3Minor Improvements ........................................................................................................... 5–3

Performance .............................................................................................................. 5–3Pick Corresponding ..................................................................................................... 5–3Solid Query ............................................................................................................... 5–3Interactive Polyline/Spline Point Addition ....................................................................... 5–4

Scripting ................................................................................................................................... 5–4Min/Max Function Changes .................................................................................................. 5–4Canceling .......................................................................................................................... 5–4Failure Behavior ................................................................................................................. 5–4

Version 15.03 Updates ......................................................................................................................... 6–1Installation/Licensing .................................................................................................................. 6–1

iv AWR Design Environment

Contents

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Job Scheduler ............................................................................................................................. 6–1Layout ...................................................................................................................................... 6–1Models - System ......................................................................................................................... 6–1Wizards - Network Synthesis ........................................................................................................ 6–1Wizards - PCB Import ................................................................................................................. 6–1

Version 15.02 Updates ......................................................................................................................... 7–1API .......................................................................................................................................... 7–1Cell Libraries ............................................................................................................................. 7–1Data Files .................................................................................................................................. 7–1Equations .................................................................................................................................. 7–1Geometry Simplification (SPP) Rules ............................................................................................. 7–1Graphs ...................................................................................................................................... 7–2Import/Export ............................................................................................................................ 7–2Job Scheduler ............................................................................................................................. 7–2Layout ...................................................................................................................................... 7–2Layout - EM .............................................................................................................................. 7–2Measurements - Circuit ................................................................................................................ 7–3Measurements - Systems .............................................................................................................. 7–3Models - System ......................................................................................................................... 7–3Schematic Editor ........................................................................................................................ 7–3Scripts ...................................................................................................................................... 7–4Simulation - Analyst .................................................................................................................... 7–4Simulation - APLAC ................................................................................................................... 7–4Simulation - AXIEM ................................................................................................................... 7–4Simulation - Linear ..................................................................................................................... 7–4Simulation - System .................................................................................................................... 7–4System Diagram Editor ................................................................................................................ 7–4User Interface ............................................................................................................................ 7–5Wizards - Network Synthesis ........................................................................................................ 7–5Wizards - OpenAccess Import/Export ............................................................................................. 7–5Wizards - PCB Import ................................................................................................................. 7–5

Version 15.01 Updates ......................................................................................................................... 8–1API .......................................................................................................................................... 8–1Cell Libraries ............................................................................................................................. 8–1Equations .................................................................................................................................. 8–1Graphs ...................................................................................................................................... 8–1Import/Export ............................................................................................................................ 8–1Job Scheduler ............................................................................................................................. 8–1Layout ...................................................................................................................................... 8–2Layout - EM .............................................................................................................................. 8–2Load Pull .................................................................................................................................. 8–2Measurements - Circuit ................................................................................................................ 8–2Measurements - Systems .............................................................................................................. 8–2Models - System ......................................................................................................................... 8–2Output Files ............................................................................................................................... 8–3Scripting Editor .......................................................................................................................... 8–3Scripts ...................................................................................................................................... 8–3Simulation - Analyst .................................................................................................................... 8–3Simulation - APLAC ................................................................................................................... 8–3Simulation - AXIEM ................................................................................................................... 8–3Simulation - RF Budget ............................................................................................................... 8–4

What's New in AWR Design Environment v

Contents

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Simulation - Systems ................................................................................................................... 8–4Symbol Editor ............................................................................................................................ 8–4Tuning, Yield Analysis and Optimization ........................................................................................ 8–4User Interface ............................................................................................................................ 8–4Wizards - Network Synthesis ........................................................................................................ 8–5

Migration Issues ................................................................................................................................. 9–1AWR Design Environment v15 Specific Migration Issues ................................................................... 9–1

Licensing Changes .............................................................................................................. 9–1Operating System ............................................................................................................... 9–1HSPICE ............................................................................................................................ 9–1APLAC ............................................................................................................................ 9–1Remote Computing ............................................................................................................. 9–1Back-Saving to Previous Versions .......................................................................................... 9–2

Measurement Variables ................................................................................................ 9–2VSS File-based Nonlinear Amplifier Blocks .................................................................... 9–2

Version-Independent Migration Issues ............................................................................................. 9–2Files Automatically Migrated ............................................................................................... 9–2

Files in Appdatacommon .............................................................................................. 9–3Files in Appdatauser .................................................................................................... 9–3

Files NOT Automatically Migrated ........................................................................................ 9–4License File ............................................................................................................... 9–4User-Defined XML Libraries ........................................................................................ 9–4

Other Concerns .................................................................................................................. 9–4Model Compatibility ................................................................................................... 9–4Multiple AWR Design Environment Versions ................................................................... 9–5Redirection ............................................................................................................... 9–5

vi AWR Design Environment

Contents

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AWR Design Environment v15 What's NewWhat's New Organization

The AWR Design Environment® 15 What's New document is organized into several sections:

• “AWR Design Environment Features” - Common improvements to all products.

• “AWRMicrowave Office and Analog Office Features” - AWRMicrowave Office- and AWR®Analog Office®-specificimprovements.

• “AWR VSS (VSS) Features” - AWR VSSTM (VSS)-specific improvements.

• “Analyst 3D Editor Features ” - Analyst 3D Editor-specific improvements.

• “Migration Issues” - Migration issues from previous versions to the current version.

Features listed in this document may also include links to videos or reference examples included in the AWR DesignEnvironment installation. Examples are listed by file name, for example: filename.emp. To find an example in the AWRDesign Environment suite, choose File > Open Example and type the example name.

The following are updates for minor versions:

• “Version 15.01 Updates” - Updates for the v15.01 minor version.

• “Version 15.02 Updates” - Updates for the v15.02 minor version.

• “Version 15.03 Updates” - Updates for the v15.03 minor version.

Major Feature OverviewDocumentation, examples, and videos for many of the new features in this release are still in development. Visit theAnnouncing v15 page of the Knowledge Base for the most recent information regarding this release. New examples andvideos are uploaded as they become available.

Known Issues for This Release

This section is updated as known issues are fixed.

VSS PHARRAY_F Block

The VSS PHARRAY_F block now more accurately models the interaction between array elements. As a consequence,the block runs slower in v15 than in v14; Time Domain simulations, particularly those with MIMO enabled, may bemuch slower. You may want to consider retaining v14 to run those simulations.

v15 Licensing And Operating System Changes

NOTE:AWRDesign Environment v15 software no longer supportsWindows 7 andWindows Server 2008 R2 operatingsystems.

Advanced load pull now requires the LPL-100 license features. See “Licensing Changes” for details.

What's New in AWR Design Environment 1–1

Page 8: What's New in AWR Design Environment v15

Early Access Features

Thank you for your interest in an AWRDesign Environment "Early Access" feature. In an effort to get customer feedbackon features we are developing, and to ensure that those features are successfully solving the full range of the intendedreal-world engineering problems, AWR® is releasing select features in this "Early Access" state. These features, whilein the software, require a license to access. To use these features please contact your local AWR Sales representative toobtain documentation and the appropriate license(s). AWR strongly encourages you to provide feedback to ensure thatthese features work well and solve your engineering problems.

Early Access features in AWR Design Environment v15 include these abilities:

• “Stability Analysis using Loop Gain Envelope”: New measurements for faster stability analysis.

• “Parallel and Remote Circuit Simulation”: Run multiple linear and nonlinear AWR®Microwave Office® simulationssimultaneously.

• “Analyst Simulator Improvements”: Run a remote AWR® AnalystTM simulation on a Linux LSF cluster.

AWR Design Environment

• “Updated Equation and Variable Browser”: View dependent and independent variables, with search and replacecapability.

• “Graph Enhancements”: Edit graphs faster with new graph and marker options.

• “Template Based Measurements”: Easily create test benches and compare simulation results of various combinationsof subcircuit networks.

• “Linked Global Definitions and Symbols”: Import, link, or embed Global Definition documents and symbols.

• “New Two-Click Windowing Mode”: Switch from a click and drag mouse mode to a two-click mode.

• “Faster Layout Rendering”: Turn on GPU acceleration.

AWR Microwave Office and Analog Office

• “LPF Based Units and Grids”: Support for multi-technology projects with mixed units.

• “Load Pull Improvements ”: Perform Baseband, 4th, and 5th harmonic Load Pull.

• “Network Synthesis Wizard Improvements”: Support for vendor library components.

• “APLAC Linear Subcircuit Caching”: Significantly speed up AWR® APLAC® linear simulations of large designs.

• “Transmission Line Calculator”: Synthesize circuit models directly in the schematic.

• “Optimizer Improvements”: Optimizer logging and the new Kapu optimizer.

• “PCB Improvements”: Import Gerber PCB files for EM analysis.

• “Minimum Spacing Routing Guides”: Visual guides to assist routing DRC spacing-compliant iNets.

• “Multiple Edge Selection”: Expansion of edge selection in layout.

• “AXIEM Improvements”: Improved meshing and better modeling of thin layers.

AWR VSS (VSS)

• “5G NR Library ”: TX and RX functionality for Downlink and Uplink modes.

• “PHARRAY_FMIMOBus Support ”: Use buses instead of multiplexed signals for more comprehensive RFmodeling.

1–2 AWR Design Environment

Major Feature Overview

Page 9: What's New in AWR Design Environment v15

• “VSS Amplifier Model Updates”: Numerous improvements to the VSS nonlinear amplifier blocks as well as the VSSlinear blocks LIN_F2 and LIN_MDIF.

• “Digital Pre-Distortion ”: Several linearization algorithms that can be used to linearize nonlinear amplifiers.

• “Analog-to-Digital Converter Update”: Model an ideal sample and hold analog-to-digital converter (ADC).

Analyst 3D Editor

• “Environment”: The Navigator and Browser now support Search operations.

• “Structure”: Structure changes include new or moved ribbon options and toolbar buttons, custom camera presets, useof solid references, and a new attribute application option.

• “Scripting”: Scripting changes included new cancellation and failure behavior prompts, and changes to the min andmax functions.

What's New in AWR Design Environment 1–3

Major Feature Overview

Page 10: What's New in AWR Design Environment v15

1–4 AWR Design Environment

Major Feature Overview

Page 11: What's New in AWR Design Environment v15

AWR Design Environment FeaturesThe AWR Design Environment® version 15 software includes the following new features, enhancements, and userinterface changes. These changes are common to the AWR® Microwave Office®, Visual System SimulatorTM (VSS),and AWR® Analog Office® products.

Updated Equation and Variable BrowserYou can now view Independent or All (independent and dependent) variables based on the tab selected in the VariableBrowser. When the All tab is selected, there are options to filter on element parameters or equations, and additionalcapability to search and replace text in editable cells and to navigate and update a large number of equations. Both tabsnow also support Undo and Redo operations.

Additional Information:

• Documentation: “Variable Browser”

• Video: Variable Browser.

Graph EnhancementsGraphs and markers are easier to format and control. Updates include:

• A new Rectangular - Real/Imag graph type. Measurements normally plotted on a Smith Chart or polar plot can now beplotted on a rectangular grid with independent axis control. This graph type is particularly useful for plotting load-pulldata.

-0.8 -0.6 -0.4 -0.2 0Reflection Coeff - Real

Load Pull Contours

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1

ReflectionCoe

ff-Imag

SwpMax61

-17SwpMin

PAE Max PLoadMax PAE Contours PLoad Contours Gamma Points

• Support for on-graph editing of axis limits, step sizes, and sweep ranges on all graphs except for 3D plots and tabulargraphs. Double-click directly on the number in a graph axis on the graph to change values.

• A new option on the Graph Options Markers tab to match marker label and legend text color to the trace color.

• Horizontal line markers are now labeled with the y-axis value and can by moved by using the Shift+Up/Down arrowkeys.

What's New in AWR Design Environment 2–1

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• The Add Offset Marker and Edit Marker Offset dialog boxes include a new Select Trace button to allow easy placementof the offset marker on a trace other than the one on which the reference marker is located.

• A new option on the Environment Options Project tab to hide disabled measurements from the graph legend.

• A new option on the Rectangular Plot Options Axes tab to auto limit only the Min or Max Limit for Left or Right axes,while holding the other limit constant.

• A new option on the Graph Options Format tab to hide the Sweep Min and Max values from displaying on SmithCharts and other graph types that display these values.

• The Add Optimization Goal and Add Yield Goal commands available by right-clicking on a graph legend now supportclicking and drawing a line on the graph to represent the goal value and slope, along with the start and stop range. Thestart and end points of the line automatically snap to the grid unless you hold down the Shift key. Likewise, whenediting or moving a goal line, the line snaps to the grid unless you hold down the Shift key.

• An Edit All Measurements command is added to the context menu of all graphs and the Graphsmenu for quicker access.

• An Edit Measurements command is added to the right-click context menu of column headers on tabular graphs.

• When a tabular graph contains measurements with different x-axes, a new Hide X-Axis Column command is availablewhen right-clicking on a column header, or from the Tabular Graph Options dialog box.

Additional Information:

• Documentation: “Working with Graphs”

• Video: V15 Graph Improvements.

Template Based MeasurementsAUser folder set up with the data source group name convention can be used as a subcircuit template document. A singlemeasurement on a parent document containing subcircuit template documents can expand to individual measurementsfor all permutations of the documents inside the data source group collections. You can use template documents to quicklyset up test benches and compare combinations of networks generated by the Network Synthesis Wizard.

2–2 AWR Design Environment

Template Based Measurements

Page 13: What's New in AWR Design Environment v15

Additional Information:

• Documentation: “Template Documents”

• Video: Template Documents.

Linked Global Definitions and SymbolsYou can now link to an external global definitions and symbols file, along with importing and exporting those documents.The API is also updated with methods to import, export, and link global definitions and symbols. In the Project Browser,linked documents display with a different icon and display the path to the linked file.

Additional Information:

• Documentation: “Using Global Definitions”.

• Documentation: “Adding Symbols”.

What's New in AWR Design Environment 2–3

Linked Global Definitions and Symbols

Page 14: What's New in AWR Design Environment v15

New Two-Click Windowing ModeAWR Design Environment software now supports a two-click entry mode for defining a draw or view window. In thismode, you click once to start a draw or view window, and click a second time to define the window size, rather thenholding down the mouse button and dragging to define the window. This mode is Off by default, and controlled on theEnvironment Options dialog boxMouse tab. Enable this mode for a more comfortable and intuitivemouse click experience.

Additional Information:

• Documentation: “Environment Options Dialog Box: Mouse Tab ”

Faster Layout RenderingAWR Design Environment software now renders 2D and 3D high-density layouts such as modules, PCBs, and ICssignificantly faster with GPU acceleration turned On. This option is Off by default, and controlled on the EnvironmentOptions dialog box Project tab.

2–4 AWR Design Environment

New Two-Click Windowing Mode

Page 15: What's New in AWR Design Environment v15

Minor ImprovementsAWR Design Environment v15 software includes the following minor new features, enhancements, and user interfacechanges:

Environment

• New Rescan File and Rescan All Files commands are added to the Project Browser context menus in the Scripting IDEto simplify reloading script files that are modified outside of the IDE.

Equations

• New amax1(x) and amin1(x) functions are added to calculate the maximum/minimum value of x per trace, whileexisting amax(x) and amin(x)functions find the singular maximum/minimum value for all traces.

• A new dec2binvect(dec,n) function is added to convert a decimal number into a binary number represented by a vectorof integers of length n, with the least significant bit at index 0. This function is useful for bit-driven switching in phaseshifter designs.

• A new erf(x) function is added to calculate the error function at x.

• A new erfc(x) function is added to calculate the complementary error function at x.

• A new expm1(x) function is added to calculate e(x-1).

• A new lgamma(x) function is added to calculate the natural logarithm of the absolute value of the gamma function atx.

• A new log1p(x) function is added to calculate the natural logarithm of (x+1).

• A new tgamma(x) function is added to calculate the value of the gamma function at x.

• A new trunc(x) function is added to round x to the nearest integer towards zero.

• Two-dimensional quantities can now be defined in equations. For example, a 2x2 matrix can be defined as

x = {{1,2},{3,4}}

• Group Properties, a new equations right-click context menu, includes options for drawing a frame around a multi-lineequation group and including a group title.

Symbol Editor

• Circuit symbols can now support filled polygons and ellipses.

User Interface

• The Tuner column visibility and order is now retained across AWR Design Environment sessions.

• The AWR Design Environment software now adds the project file to the operating system 'Recent File' list whenopening or saving a project. This list is used by many applications, for example, Outlook when attaching a file, or forthe jump list in the taskbar.

What's New in AWR Design Environment 2–5

Minor Improvements

Page 16: What's New in AWR Design Environment v15

2–6 AWR Design Environment

Minor Improvements

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AWR Microwave Office and Analog Office FeaturesAWR® Microwave Office® and AWR® Analog Office® version 15 software includes the following new features,enhancements, and user interface changes. The AWR Design Environment® suite changes also apply to these specificproducts.

LPF Based Units and GridsUnits, Grid, and Default Value parameters are now specified per-LPF, enabling multi-technology projects with mixedunits. For example, a design for a chip might use units of microns for length, while the board the chip is mounted incould use units specified in mils for lengths.

Additional Information:

• Documentation: “Determining Project Units”.

• Example: AWR_MMIC_Module.emp

Load Pull ImprovementsThe updated Load Pull script uses the newHBTUNER3 element to control impedances at up to three additional frequencies:the 4th and 5th harmonics of the fundamental, and the “baseband” frequency; F=|F1-F2| when a 2-tone input is used. Aswith the fundamental, 2nd, and 3rd harmonics, these impedances can be fixed at a specified value, or swept as part ofthe load pull analysis. Load pull measurements also accommodate these enhancements. Load pull measurements cannow also be plotted on the new Rectangular - Real/Imag graph, which plots the real and imaginary components of acomplex measurement on a rectangular grid instead of a Smith Chart or Polar graph.

Additional Information:

• Documentation: “Harmonic Balance Lossless Tuner with Bias Tee with N Harmonics (Closed Form): HBTUNER3”.

What's New in AWR Design Environment 3–1

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• Documentation: “Rectangular - Real/Imag Graphs”.

• Example: Simulated_Load_Pull.emp

• Example: Swept_Load_Pull_Measurements.emp

Network Synthesis Wizard ImprovementsNetwork Synthesis Wizard improvements include:

• Added support for vendor library components including capacitors, inductors, and resistors. Vendor componentselections can be exported and imported into Network Synthesis instances.

• Added API access to vendor library components in the wizard.

• MSTEPs can now be used when Replace TLineswithMLINs is selected on the Network Synthesis dialog box Componentstab in the Topology constraints section.

• A new synthesis measurement, CompCount, can be used to set a limit for the number of unique vendor librarycomponents or lumped elements used in a matching network.

• Parameter limits for the first and last components in a matching network can now be set independently.

Additional Information:

• Documentation: “Network Synthesis Wizard”.

Stability Analysis using Loop Gain EnvelopeStability analysis using loop gain envelope calculations can now be performed with the addition of new linear loop gainenvelope measurements. Calculating the loop gain envelope requires far fewer computations than loop gain calculations,resulting in a much faster stability analysis than stability analysis based on loop gain.

3–2 AWR Design Environment

Network Synthesis Wizard Improvements

Page 19: What's New in AWR Design Environment v15

NOTE: This is an early access feature.

Additional Information:

• Documentation: “Loop Gain Envelope (2 port only): LoopGainEnv”.

• Documentation: “Gain Margin for LoopGainEnv (2 port only): GainMrgnEnv”.

• Documentation: “Phase Margin for LoopGainEnv (2 port only): PhMrgnEnv”.

APLAC Linear Subcircuit CachingIn hierarchical designs where there are many instances of a subcircuit, AWR® APLAC® linear simulation times can besignificantly reduced by using subcircuit caching.

Additional Information:

• Documentation: “APLAC Linear Subcircuit Caching”.

Parallel and Remote Circuit SimulationParallel and remote circuit simulation enables multiple AWR Microwave Office simulations to run simultaneously onthe same computer, or remotely in parallel on multiple computers in a simulation queue. Long simulations, such ascomplex harmonic balance simulations, linear simulations involving extremely large S-parameters, parameter sweeps,load pull simulations, optimization, and yield analysis may benefit from a significant reduction in simulation time whenrun in parallel.

NOTE: This is an early access feature.

Transmission Line CalculatorYou can now synthesize select circuit models based on electrical specifications by right-clicking on the model andchoosing Synthesize. The physical parameters are automatically populated with the model parameters and associatedsubstrate. Supported transmission line/coupled transmission line elements are MLIN, MCLIN, SLIN, SCLIN, S1LIN,CPW1LINE, RWG_TEmn, COAX, and COAXC.

Additional Information:

What's New in AWR Design Environment 3–3

APLAC Linear Subcircuit Caching

Page 20: What's New in AWR Design Environment v15

• Documentation: “Transmission Line Calculator Dialog Box”.

• Video: Transmission Line Calculator.

Optimizer ImprovementsOptimizer improvements include the option to write an Optimizer log file and the new Kapu optimization method. Ifyou select the log file option, there is a link in the Status Window which you can click on to open the log file. TheOptimizer log file contains information on the Optimizer setup, details of each iteration, and a summary of the ten bestiterations. Analysis of the log file may provide insight into how to set up future optimization runs more efficiently. Thenew Kapu optimizer blends local optimization with high resistance to local minima. It has been shown to work well ona wide range of designs with as few as 3 to over 90 variables.

Additional Information:

• Documentation: “Optimization Log”.

• Documentation: “Kapu Optimization”.

PCB ImprovementsYou can now easily import Gerber PCB data into the AWR Design Environment for EM analysis using the PCB ImportWizard. Both Gerber X1 and X2 standards are supported.

3–4 AWR Design Environment

Optimizer Improvements

Page 21: What's New in AWR Design Environment v15

Read-in performance for projects with large PCB designs is also improved. Some examples show as much as 3Ximprovement over version v14 for layouts with many shapes (not pCells).

Additional Information:

• Documentation: “PCB Import Wizard”.

Minimum Spacing Routing GuidesYou can now use minimum spacing routing guides and quickly route iNets as close as possible without violating DRCseparation rules. The guides, drawn with a red line, represent centerline of the iNet which is routed as close as possibleto the other shapes. Options included snapping to the guides as you route the iNet, and rejection of routing clicks insidethe guide lines. The guides are dynamically calculated based on DRC separation rules and iNet widths.

Additional Information:

What's New in AWR Design Environment 3–5

Minimum Spacing Routing Guides

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• Documentation: “Minimum Spacing Routing Guides”.

Multiple Edge SelectionLayout edge selection is updated to allow multiple edge selection. When using the Draw > Align Shapes > Shape Edgescommand with multiple edges selected, only the first edge on each shape is aligned. You can also performmore elaborateoperations on multiple selected edges using scripts.

Additional Information:

• Documentation: “Shape Edge Selection”.

AXIEM ImprovementsAWR® AXIEM® 3D planar EM analysis improvements include:

• Significant improvements in themesh quality with a focus on elimination of high aspect ratios. Vertical mesh aggregationalso reduces unknown counts in the z-dimension. AXIEM is now capable of meshing larger structures faster.

• Greens function improvements from improved modeling of loss boundary conditions on the top and bottom enclosure,and improved modeling of very thin layers.

• Sub-nanometer z-axis resolution of metals and dielectrics, resulting in better modeling of MIM capacitors. Previously,z-axis distances were rounded to the nearest nm.

• Addition of a true DC solver resulting in more robust solutions at 0 Hz.

Analyst Simulator ImprovementsAWR® AnalystTM simulator improvements include:

• You can now run Analyst simulations from AWR Design Environment software on a remote Linux cluster.

3–6 AWR Design Environment

Multiple Edge Selection

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NOTE: This is an early access feature.

• The new linear solver introduced in v14 (dubbed HMLU) is extended to use multiple nodes on a Linux cluster, enablingsolution of substantially larger problems than can be performed on a single computer. This allows the matrix solutionat a single frequency (as part of a fast or discrete sweep) access to the total combined memory these nodes offer. Forexample, problems in excess of 100M unknowns have been solved to date on nodes each with less than half a terabyteof memory.

• Meshing is both faster and more robust, particularly on very complex geometries containing many small entities.

• You can now optionally define the mesher curvature geometry representation size in absolute units. Previously youcould only specify a value relative to the element size. This change also controls the definition of the minimum elementsize that the curved geometry representation can cause.

• Lumped RLC circuit element can now be added to Analyst arbitrary 3D EM Structures. These are implemented as anenforced frequency-dependent impedance between two points, where the RLC components can be in either a parallelor a series configuration.

• In previous Analyst versions, the imperfectly conducting metal on a wave port was replaced with perfectly conductingmetal. This was an efficiency and is appropriate in most situations. However, in cases where the losses are significant,this approximation can lead to lower accuracy solutions, particularly if a reference-plane shift is applied at the port.In v15, losses on the port are added in the same way as in the 3D problem, with the exception that modeling is notallowed inside metal on a port. Metal is converted to impedance boundary conditions applied to the metal surface, andthe calculation of the impedance value includes skin-depth effects (limited by metal thickness). The primary impactof this change is higher accuracy results for high-loss cases where a reference-plane shift is used at the port.

• Driven frequency simulations now use significantly less memory when requesting near or far field output, especiallywhen requested at many frequencies.

• Various aspects of the solver are faster, most noticeably for large point count simulations. Additionally, fast frequency(GAWE) sweeps make better use of parallel resources.

• The PML (Perfectly Matched Layer) attribute is modified for better performance.

• AMR memory estimates are improved in driven frequency (RF3p) simulations, allowing improved use of parallelresources.

Analyst 3D EditorSee Analyst 3D Editor Features for details on new features specific to the 3D Editor.

What's New in AWR Design Environment 3–7

Analyst 3D Editor

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Minor ImprovementsAWR Microwave Office v15 software includes the following minor new features, enhancements, and user interfacechanges.

New/Updated Examples

The following are new or updated AWR Design Environment examples for v15. To find an example, choose File > OpenExample and type the example name.

• AWR_MMIC_Module.emp

• LPF_Lumped.emp

• Mixed_vs_Single_Ended_Data_Files.emp

• Patch_Array_Antenna.emp

• Simulated_Load_Pull.emp

• Swept_Load_Pull_Measurements.emp

• Swept_Load_Pull_Measurements_Complete.emp

New Circuit Models

The following new circuit models are included in AWR Microwave Office v15 software.

• “Current-Controlled Current Source (Ideal): CCCS_IDEAL”

• “Current-Controlled Voltage Source (Ideal): CCVS_IDEAL”

• “Harmonic Balance Lossless Tuner with Bias Tee with N Harmonics (Closed Form): HBTUNER3 ”

• “Subcircuit Caching Control Block (APLAC Only): SUBCKT_CACHE ”

• “Ideal Transformer with Center Tap (with Finite Inductance and Leakage): XFMRTAP3 ”

• “Voltage-Controlled Current Source (Ideal): VCCS_IDEAL”

• “Voltage-Controlled Voltage Source (Ideal): VCVS_IDEAL”

New Circuit Measurements

The following new circuit measurements/annotations are included in AWR Microwave Office v15 software.

Linear Measurements

• “Common Mode Rejection Ratio for Smm: CMRR ”

• “Resistance of Series RL with Other Port Grounded”

• “Mixed Mode S-Parameters: Smm ”

• “Determinant of y-matrix: Ydet”.

Linear Stability Measurements

• “Gain Margin for LoopGainEnv (2 port only): GainMrgnEnv”

• “Loop Gain Envelope (2 port only): LoopGainEnv”

3–8 AWR Design Environment

Minor Improvements

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• “Phase Margin for LoopGainEnv (2 port only): PhMrgnEnv”

Antenna Measurements

• “Radiation, Mismatch, or Total Efficiency: Efficiency”

• “Phi or Theta Angle Location of Peak E-Phi Radiation Pattern (Sweep frequency): SF_Peak_Angle_EPhi”

• “Circuit Driving Phi or Theta Angle Location of Peak E-Phi Radiation Pattern (Sweep frequency):SF_Peak_Angle_EPhi_CKT”

• “Phi or Theta Angle Location of Peak E-Theta Radiation Pattern (Sweep frequency): SF_Peak_Angle_ETheta”

• “Circuit Driving Phi or Theta Angle Location of Peak E-Theta Radiation Pattern (Sweep frequency):SF_Peak_Angle_ETheta_CKT”

• “Phi or Theta Angle Location of Peak E-LHCP Radiation Pattern (Sweep frequency): SF_Peak_Angle_LHCP”

• “Circuit Driving Phi or Theta Angle Location of Peak E-LHCP Radiation Pattern (Sweep frequency):SF_Peak_Angle_LHCP_CKT”

• “Phi or Theta Angle Location of Peak E-RHCP Radiation Pattern (Sweep frequency): SF_Peak_Angle_RHCP”

• “Circuit Driving Phi or Theta Angle Location of Peak E-RHCP Radiation Pattern (Sweep frequency):SF_Peak_Angle_RHCP_CKT”

• “Phi or Theta Angle Location of Peak Total Power Radiation Pattern (Sweep frequency): SF_Peak_Angle_TPwr”

• “Circuit Driving Phi or Theta Angle Location of Peak Total Power Radiation Pattern (Sweep frequency):SF_Peak_Angle_TPwr_CKT”

• “Peak E-Phi Radiation Pattern (Sweep frequency): SF_Peak_EPhi”

• “Circuit Driving Peak E-Phi Radiation Pattern (Sweep frequency): SF_Peak_EPhi_CKT”

• “Peak E-Theta Radiation Pattern (Sweep frequency): SF_Peak_ETheta”

• “Circuit Driving Peak E-Theta Radiation Pattern (Sweep frequency): SF_Peak_ETheta_CKT”

• “Peak E-LHCP Radiation Pattern (Sweep frequency): SF_Peak_LHCP”

• “Circuit Driving Peak E-LHCP Radiation Pattern (Sweep frequency): SF_Peak_LHCP_CKT”

• “Peak E-RHCP Radiation Pattern (Sweep frequency): SF_Peak_RHCP”

• “Circuit Driving Peak E-RHCP Radiation Pattern (Sweep frequency): SF_Peak_RHCP_CKT”

• “Peak Total Power Radiation Pattern (Sweep frequency): SF_Peak_TPwr”

• “Circuit Driving Peak Total Power Radiation Pattern (Sweep frequency): SF_Peak_TPwr_CKT”

Annotations

• “EM Document Current (Extended): ”

Network Synthesis Measurements

• “Count of Components in the Synthesized Network: CompCount ”

New Scripts

The following new scripts are included in AWR Microwave Office v15 software:

• Data > DC_Network_Setup: Add a DC (0 Hz) frequency point to data files that do not include it.

What's New in AWR Design Environment 3–9

Minor Improvements

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API

• A new Variables collection off of Optimizer objects allows easier access to variables and parameters that are enabledfor optimization.

• Added access to the graph marker font and text color options through the marker options collection.

• Added StackupUtil methods SetBoundaryCondition(), RemoveMaterial(), RemoveTrace()and UnMap(). AddedSetStackup2() method which associates an EM structure and its STACKUP to a StackupUtil object.

• Added support for specifying arguments for the cutout style and offset when invoking the ShapeCreateClipRegionmethod via the Layout.InvokeCommand() method.

• Added a RunWithArgs() method to the ScriptRoutine object, which allows you to pass arguments to subroutines.

Data Files

• Added support for string variables in GMDIF files.

Layout

• A new Make Route Standalone command in the right-click context menu of a disassociated iNet converts the net froma disassociated route to an independent route path.

• A new Layout Mode Drawing option, Flight lines nearest pin edge connects ratlines to the nearest area pin edge, ratherthan the cell face.

• A new option on the Layout Options dialog box Layout tab, Auto-snap parameterized subcircuits snaps together elementsin parameterized subcircuits after parameter values are applied.

• When placing a new parameterized subcircuit, the layout now snaps together if Auto-snap parameterized subcircuits isselected.

• Rectangles, circles and ellipses now draw animation in full color during design entry. Polygons now render fully filledduring entry when the first and last entry points overlap.

• Rectangles, circles and ellipses now have a corresponding tab in their Shape Properties dialog boxes that allows editingof their properties such as radius, width, and height.

• The radius now displays on the cursor instead of dx/dy when drawing a circle. Circles remain circular when stretched,unless you hold down the Shift key to deform the circle into an ellipse. Coordinate entry for circles now just takes avalue for radius instead of dx/dy.

Libraries

• Added component library XML support for Generalized MDIF data files.

• Added component library XML support for specifying Help files as text files using the new "OpenAsType" attributeon the XML HELP element.

Measurements

• The tooltip displayed for a data cursor on a graph trace for a PASSIVE measurement now indicates "Passive" or "NotPassive".

• The tooltip displayed for a data cursor on a SCIR1, SCIR2, SCIR_IJ, MU1, MU2, K, or B1 stability measurementnow provides a description of where the network is stable.

3–10 AWR Design Environment

Minor Improvements

Page 27: What's New in AWR Design Environment v15

Netlists

• You can now Ctrl- or Shift-select multiple netlist of different types and import them simultaneously.

Output Files

• The NPORTF output file measurement now has two precision parameters: "Sweep Precision" and "Data Precision".These parameters allow the values for the independent variable (for example, frequency) to be written out with adifferent precision than the rest of the data.

Simulation - APLAC

• The APLAC transient simulator now supports AMP and GAIN elements.

• APLAC now supports sweeping noise temperature for each subcircuit.

• You can now specify IN and OUT ports for XDB and CONSTPOUT blocks using the PIN_ID.

Simulation - Analyst

• The Analyst Delta S plot in the Simulation Window now uses a logarithmic y-axis for DeltaS.

• An Export and Open in Analyst-MP option is added to the Project Browser right-click context menu for Arbitrary 3DEM structures.

User Interface

• You can now Shift- double-click on a schematic node in the Project Browser to open the Layout View of the schematic

Wizard - Create New Process

• Linetypes are now mapped correctly in the STACKUP when using multiple ground spacing values.

What's New in AWR Design Environment 3–11

Minor Improvements

Page 28: What's New in AWR Design Environment v15

3–12 AWR Design Environment

Minor Improvements

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AWR VSS (VSS) FeaturesThe AWR® Visual System SimulatorTM (VSS) version 15 software includes the following new features, enhancements,and user interface changes. The AWR Design Environment® suite changes also apply to these specific products.

5G NR LibraryThe 5GNR library contains TX and RX functionality for Downlink and Uplinkmodes. It supports FR1 and FR2 frequencybands and configurations. A number of test benches are included as examples to jump-start the component design andevaluation process with pre-configured TX and RX blocks, as well as measurements. Test Model configurations definedin the 5G NR specifications are also included in the library, along with a complete set of corresponding test benches.

Documentation:

• NR_DL_TSIGE: “NR 5G Downlink Signal Source (with encoder): NR_DL_TSIGE”

• NR_DL_RX: “NR 5G Downlink Receiver (with decoder): NR_DL_RX”

• NR_DL_TSIG: “NR 5G Downlink Signal Source: NR_DL_TSIG”

• NR_DL_RXM: “NR 5G Downlink Receiver: NR_DL_RXM”

• NR_UL_TSIGE: “NR 5G Uplink Receiver (with encoder): NR_UL_TSIGE”

• NR_UL_RX: “NR 5G Uplink Receiver (with decoder): NR_UL_RX”

• NR_UL_TSIG: “NR 5G Uplink Signal Source: NR_UL_TSIG”

• NR_UL_RXM: “NR 5G Uplink Receiver: NR_UL_RXM”

• NR_DL_TSIG_TM: “NR 5G Downlink Test Model Signal Source: NR_DL_TSIG_TM”

• NR_DL_RXM_TM: “NR 5G Downlink Test Model Receiver: NR_DL_RXM_TM”

PHARRAY_F MIMO Bus SupportThe PHARRAY_F block now supports buses. This is available when operating in MIMO mode. Buses may be used oneither or both the circuit and the radiated sides of the array assembly. The CKTSIGTYP parameter is used to configurethe circuit side and the RADSIGTYP parameter is used to configure the radiated side. The use of buses is recommendedover the use of multiplexed signals, as more comprehensive RF modeling can be performed with buses.

Additional Information:

• Documentation: “Phased Array Assembly, Data-file based: PHARRAY_F ”

VSS Amplifier Model UpdatesUpdates to the VSS nonlinear amplifier blocks as well as the VSS linear blocks LIN_F2 and LIN_MDIF include:

• The NL_F block is replaced with the AMP_F block.

• Interpolation between independent variables is now supported for the data file blocks AMP_F, NL_MDIF, LIN_F2,and LIN_MDIF.

• NL_S support of interpolation between the independent variables of the co-simulated schematic.

• Extrapolation from the input power levels is now pinned to the lower power level.

What's New in AWR Design Environment 4–1

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• The algorithm used to generate the polynomial coefficients from PIn/POut curves in AMP_F/NL_F now presumesthe lowest PIn corresponds to linear gain and therefore gives more weight to matching the linear gain of the polynomialwith the gain of the lowest PIn entry.

• If the FLTRIMPL parameter of the nonlinear amps is explicitly set to "FIR" then the impedance mismatch filters nowalso use FIR filtering.

• Nonlinear amplifiers in Time Domain simulations now calculate their impedances similar to RFB/RFI. This primarilyaffects impedances when there is S12 in the nonlinearity.

• The DFTYP parameter is removed from NL_F.

Digital Pre-DistortionThe new digital pre-distortion (DPD) block offers several linearization algorithms that can be used to linearize nonlinearamplifiers. Supported models includememory polynomial, generalizedmemory polynomial, dynamic deviation reductionof 2nd order (DDR2), and look-up table. Solver choices include least-squares and damped Newton algorithms.

Analog-to-Digital Converter UpdateThe new ADC2 block implements an ideal sample and hold analog-to-digital converter (ADC). This model utilizes anadjustable threshold vector to convert input samples into digital symbols. Nonlinear distortions found in an analog-to-digitalconverter may be simulated by varying this threshold vector. ADC2 generates both, the digital and the quantized signals.

Additional Information:

• Documentation: “Analog to Digital Converter with Digital and Quantized Outputs: ADC2”

Minor ImprovementsAWR VSS v15 includes the following minor new features, enhancements, and user interface changes:

New/Updated Examples

The following are new or updated AWR Design Environment examples for v15. To find an example, choose File > OpenExample and type the example name.

• Downlink TX test bench: 5G_NR_DL_TX_Testbench.emp

• Downlink RX test bench: 5G_NR_DL_RX_Testbench.emp

• Uplink TX test bench: 5G_NR_UL_TX_Testbench.emp

• Uplink RX test bench: 5G_NR_UL_RX_Testbench.emp

• 5G_NR_FR1_TM1_1.emp

• 5G_NR_FR1_TM1_2.emp

• 5G_NR_FR1_TM2.emp

• 5G_NR_FR1_TM2a.emp

• 5G_NR_FR1_TM3_1.emp

• 5G_NR_FR1_TM3_1a.emp

• 5G_NR_FR1_TM3_2.emp

• 5G_NR_FR1_TM3_3.emp

4–2 AWR Design Environment

Digital Pre-Distortion

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• 5G_NR_FR2_TM1_1.emp

• 5G_NR_FR2_TM2.emp

• 5G_NR_FR2_TM3_1.emp

• ADC: ADC.emp

• AMP_F_Frequency_Dependence: AMP_F_Frequency_Dependence.emp

• AMP_F_Test_Benches: AMP_F_Test_Benches.emp

• Cascade_Damage: Cascade_Damage.emp

• Chirp_Radar_System: Chirp_Radar_System.emp

• Coffee_Can_Radar: Coffee_Can_Radar.emp

• Diplexer: Diplexer.emp

• DPD_OFDM: DPD_OFDM.emp

• Filter_Bank: Filter_Bank.emp

• IF_Subsampling_ADC: IF_Subsampling_ADC.emp

• LTE_DL_FDD_RX_TestBench: LTE_DL_FDD_RX_TestBench.emp

• LTE_DL_FDD_TX_TestBench: LTE_DL_FDD_TX_TestBench.emp

• LTE_DL_TDD_TX_TestBench: LTE_DL_TDD_TX_TestBench.emp

• LTE_UL_FDD_RX_TestBench: LTE_UL_FDD_RX_TestBench.emp

• Phased_Array: Phased_Array.emp

• Phased_Array_Generator: Phased_Array_Generator.emp

• Pulse_Doppler_Radar_System: Pulse_Doppler_Radar_System.emp

• Pulse_Doppler_Radar_System_Matlab: Pulse_Doppler_Radar_System_Matlab.emp

New/Updated System Blocks

The following new system blocks are included in VSS v15.

Digital Pre-Distortion

• “Digital Predistortion Block with Feedback: DPD”

NR 5G Blocks

• “NR Downlink Frame Assembler: NR_DL_FRMASM”

• “NR Downlink Frame Deassembler: NR_DL_FRMDASM”

• “NR Uplink Frame Assembler: NR_UL_FRMASM”

• “NR Uplink Frame Deassembler: NR_UL_FRMDASM”

Analog-to-Digital Converter

• “Analog to Digital Converter with Digital and Quantized Outputs: ADC2”

What's New in AWR Design Environment 4–3

Minor Improvements

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Amplifier Model

AMP_F is updated to support all file formats, including all the capabilities previously included only in the NL_F block.

• “Frequency Dependent Behavioral Amplifier (File-Based): AMP_F”

Frequency Controlled Switch

RFSW_FRQ is a frequency-controlled RF switch that can be useful in building filter banks.

• “RF Signal Frequency Controlled Switch: RFSW_FRQ ”

RF Blocks

• “Physical Spec: Grounded Shield: COAX”

• “Diplexer: DIPLEXER”

Libraries

RF Blocks

• “Image Rejection Behavioral Mixer: MIXER_IRM”

New System Measurements

The following new system measurements are included in AWR VSS v15.

RF Budget Measurements

• “Cascaded Damage Indicator: C_DAMAGE ”

Annotate System Measurements

• “Annotate VSS Characteristic Impedance: Z0 ”

Measurements

• RF Budget Analysis noise-based measurements and Time Domain spectrum-based measurements now support thespecification of a measurement noise floor.

System Block Updates

• The Element Options dialog box Filter Design tab for the VSS Filters such as BPFC and LPFB now includes a buttonthat centers the frequency range displayed using the edges of the filter.

4–4 AWR Design Environment

Minor Improvements

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Analyst 3D Editor FeaturesThe AWR® AnalystTM 3D Editor version 15 software includes the following new features, enhancements, and userinterface changes. Open Help from within the 3D Editor for documentation specific to the 3D Editor.

Environment

Search

Searching is now supported in the Navigator and Browser.

You can also control the types of items that are searched.

Structure

Ribbon Changes

The Structure ribbon includes the following changes:

• The active coordinate system is now specified via radio buttons in the Structure Browser instead of on the ribbonmenu.

What's New in AWR Design Environment 5–1

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• The buttons to create coordinate systems and set the working plane orientation and offset have shifted right.

• The Working Plane Visibility button is moved from the ribbon to the Structure view toolbar.

Solid Organization Browser Buttons

There are two new buttons on the Browser toolbar to provide quick access to controlling solid organization. These optionsremain in the Browser Geometry node context menu as well.

Custom Cameras

You can now create Custom camera presets for use within and across projects.

Solid References

A solid reference produces another instance of a solid, maintaining the referenced solid's geometric definition. As aresult, changing any of the creation parameters of the referenced solid impacts all references. Each reference containsseveral independent parameters, however, including

• Coordinate System

• Material

• Include in Simulation

• Visible

• Mesh Control Only

5–2 AWR Design Environment

Structure

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These parameters allow you to uniquely position each reference (either via a coordinate system or by applying atransformation), assign a different material for each reference, and other operations.

Attribute Application

When applying an attribute to entities, some of which already contain attributes, the resulting dialog box now offers anadditional option to apply the new attribute to only entities without other attributes. This can greatly simplify the applicationof attributes in complex situations.

Minor Improvements

Performance

Actions performed on large numbers of solids (such as changing materials, excluding, and including) are now muchfaster.

Pick Corresponding

The Structure view context menu contains commands to pick items that correspond to what is already picked.

• Pick > Corresponding Solids - Picks solids associated with currently picked edges, faces, and bodies.

• Pick > Corresponding Bodies - Picks bodies associated with currently picked edges, faces, and solids.

• Pick > Corresponding Faces - Picks faces associated with currently picked edges, bodies, and solids.

• Pick > Corresponding Edges - Picks edges associated with currently picked faces, bodies, and solids.

Solid Query

Solid queries now report the number of bodies in the solid(s).

What's New in AWR Design Environment 5–3

Structure

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Interactive Polyline/Spline Point Addition

Points can be added to wire and sketch polylines or splines and interactively placed with the mouse.

Scripting

Min/Max Function Changes

The min and max functions now take an arbitrary number of arguments (in previous versions the limit was 2 arguments).This allows for expressions such as min(a, b, 4.2).

Canceling

If you cancel a running script that has changed the model, you are prompted to undo or keep those changes.

Failure Behavior

If a script fails and has changed the model, you are prompted to undo or keep those changes.

5–4 AWR Design Environment

Scripting

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Version 15.03 UpdatesThe AWR Design Environment® version 15.03 software includes the following new features, enhancements, and userinterface changes.

Installation/Licensing• When the AWR Design Environment starts without a Layout license feature, editing a schematic element or systemblock no longer causes a potential crash.

Job Scheduler• Job Scheduler logs older than 14 days are now automatically deleted. On remote hosts with the Job Scheduler serviceinstalled, the maximum amount of time to retain logs is set in MaxLogFileAge.

• The JobMonitor performance is improved. The table now sorts job numbers from high to low, and is initially populatedwith only 50 jobs. Click Next 50 Jobs to display more jobs in descending order.

Layout• Improved the performance of deleting LPFs in projects that contain models with a large number of parameters.

Models - System• Using the AMP_F model with a data file whose primary data is frequency-based with behavioral parameters such asIP3 and P1dB, and with the IMPLTYP parameter set to "AM/AM-AM/PM" no longer potentially generates linear andincorrect results, particularly if the input power is high. This issue is also corrected with the PHARRAY_F model ifthe RF data files are both behavioral (for example: Gain or IP3) and harmonic/power based.

Wizards - Network Synthesis• Using the Network Synthesis Wizard with load-pull data having both swept source and load impedances no longercauses a crash.

Wizards - PCB Import• Added more robust support for Gerber import of .drl files.

What's New in AWR Design Environment 6–1

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6–2 AWR Design Environment

Wizards - PCB Import

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Version 15.02 UpdatesThe AWR Design Environment® version 15.02 software includes the following new features, enhancements, and userinterface changes.

API• Added aGlobalDefinitionDocuments.Copy()method andOutputEquationDocuments.Copy()method tomake duplicatingdocuments in these collections more convenient.

• Added API access for the schematic option Stackup for 3D view.

• Added API support for enabling/disabling measurements with use data source groups.

• Added a GlobalDefinitionDocuments.ImportFromProject() method which takes the path to an existing project, andopens that project and imports the GlobalDefinitionDocuments from that project into the current project.

• Added the Export3DCadFile method for exporting an EM structure 3D CAD file.

• Added the AddBoundary method to the Drawing objects collection for creating a 3D EM simulation boundary.

• Fixed an API regression where the FilePath property for an imported data file returned an empty path instead of theoriginal path of the file.

• Added a generic properties set (name/value pairs) to the process library records in the project, and access to theproperties through the new Properties method on the ProcessLibrary API object. Process library nodes in the ElementBrowser can be shown/hidden based upon the presence of these properties.

Cell Libraries• Shapes copied from a layout editor and pasted into an artwork cell editor are now mapped correctly from drawinglayers to model layers so that Boolean operations can be applied to the pasted shapes.

Data Files• Modified the Touchstone data file reader, so that it no longer enforces rules from the standard about the number ofdata pairs per line for data files that represent networks with three or more ports. This allows the AWR DesignEnvironment to read data files written by various tools that do not strictly follow the standard.

• End-of-line comments are now allowed in Touchstone v2.0 data files in the [Reference] and [Mixed-Mode Order]sections and on all keyword lines.

Equations• Made multiple performance enhancements to toggling the enable and deleting of equations in Global Definitionsdocuments in large projects.

• Pasting Global Definitions documents into the AWR Design Environment version 15.0x from earlier versions nowfunctions correctly.

• The SWPVAR block now supports variable names longer than 32 characters.

Geometry Simplification (SPP) Rules• Via shape thickness is now correctly calculated when applying SPP rules to via shapes in AWR®AnalystTM structures.

What's New in AWR Design Environment 7–1

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Graphs• Initial sweep values for markers on circular measurements located on rectangular real/imaginary graphs now displaycorrectly.

• Markers now stay at the points where they are placed when used with spectrum data plotted on non-rectangular graphs.

• Offset markers on graphs now return to the correct location when you drag the referenced marker to a new locationand it snaps back.

• Fixed a problem with vertical line marker values incorrectly being displayed as zero in the graph marker legend.

• The Undo and Redo commands now correctly restore optimization/yield goal values after the goal is moved or stretchedon a graph.

• Fixed a floating point overflow error/crash that occasionally occurred when left-clicking on a graph trace.

Import/Export• When illegal characters in a DXF cell name are automatically replaced, any cells containing an instance of that cellare now updated with the corrected name.

Job Scheduler• A Get Logs button in the Job Scheduler Admin tool now allows you to easily collect remote simulation log files.

• Added a Fetch Datasets button to the JobMonitor to retrieve non-swept data sets for the selected job(s) from the remotesimulation queue. Data sets for swept EM structures are not properly retrieved and are for future implementation. Thisbutton is used when data sets from remote jobs do not successfully transfer back to the user machine. You may needto reopen the project utilizing the retrieved data sets in order to load the new data sets.

• The SimulationWindow now displays information on why a job is deferred and in the Scheduled state. Reasons includelack of licenses, or limitations due to project level or queue level Job Scheduler settings.

• Remote computing file copy operations no longer time-out prematurely during intermittent network glitches.

• Fixed an intermittent remote computing issue where jobs remained stuck in a running state.

Layout• Pressing the Esc key mid-operation to terminate a pCell stretching operation no longer freezes the operation in a lockedangle or unlocked angle mode.

• Running the Connect Net Shapes command no longer causes routes with negative layers to become disassociated.

• Fixed issues with the schematic layout 3D view when a subcircuit uses a different LPF than the parent LPF.

• Fixed a schematic layout rendering issue when the schematic contains an EM subcircuit with de-embedded EM ports.

Layout - EM• Fixed a regression where the Drill Hole tab was missing from Shape Properties dialog box for drill holes drawn in theEM Layout Editor.

• Fixed a regression where changing the Pin ID for an EM port caused all ports to be assigned the same Pin ID.

• Fixed an arbitrary 3D EM structure issue where changes to a variable value in the 3D Editor did not propagate backto the AWR Design Environment correctly.

7–2 AWR Design Environment

Graphs

Page 41: What's New in AWR Design Environment v15

• The Options or Project Options dialog box Interpolation/Passivity tab Consider Passive for Noise Simulation option isnow enabled by default for new EM structures.

Measurements - Circuit• Using the Simulate forMeasurement command on ameasurement that uses a Switch List no longer triggers an unnecessarysimulation of EM structures replaced with a Switch View.

• The Add/Modify Measurement dialog no longer loses the settings of sweep properties when you change the data setselection.

• The dB modifier is now accounted for when deciding whether to display "Unstable" or "Stable" in the data cursortooltips for Stability measurements (K, B1, MU1, MU2).

Measurements - Systems• The application of the optional measurement thermal noise floor in RF Budget Analysis noise measurements nowoccurs just before the measurements are reported. Previously the noise floor was applied earlier in the flow, whichallowed it to be affected by mismatch. It now corresponds more to noise that might be expected in the measurementdevice.

Models - System• Fixed issues with using arbitrary N_RB values in 5GNR DL TSIG blocks.

• Added an option to overwrite carrier frequency settings in NR TSIG blocks so you can generate signals at IF and thenupconvert without running into issues with SCS/SSB_SCS settings.

• Fixed an occasional crash due to a simulation starting a second time on a system diagram that contains a LIN_S block,after moving a block on the system diagram.

• In FMULT_B or FMULT_B2 models, the HREJTYP parameter is no longer treated as "Relative to output" if theSPURS parameter is N > 5 or if more than 5 values are specified for the parameter.

• In FMULT_B or FMULT_B2 models, a floating point overflow error no longer occurs if the SPURS parameter is N> 5 or the number of values specified for SPURS is > 5 and the S22 parameter is specified.

• When operating near saturation, VGA_F no longer gives incorrect results when the data file containsfrequency-dependent data.

• Fixed a problem with NR_DL_FRMASM where PDSCH data during PDCCH symbols were missing in TM1.1, 3.1,and 3.1a.

• Fixed scaling of the input sample rate of OFDM_MOD and the output rate of OFDM_DMODwhen SCMAP is defined.

• Fixed scaling of the output power of OFDM_MOD when SCMAP is defined.

• Fixed a crash that occurred if the input port of an RFBPATH block was not connected to an output port.

Schematic Editor• The Edit Subcircuit command now displays an Edit Subcircuit dialog box that allows you to choose between availableSwitch Views if referenced in a document.

What's New in AWR Design Environment 7–3

Measurements - Circuit

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Scripts• The Scripts > VSS > Create_XML_Library script is replaced with the Scripts > Project > Create_XML_Library script whichcan generate XML libraries from both schematic and system diagrams.

• The Scripts > Project > Clean Project Choose Top Level Docs script now works with top level EM documents.

• Added an "Assume locked data sources are lowest level of hierarchy" option to the Scripts > Project > Clean Projectscript which allows locked documents to be deleted.

Simulation - Analyst• Swept Analyst EM structures now reuse previously simulated data points when new points are added to the SWPVARcontrol.

• Fixed the color scale for Analyst 3D annotations when the dB modifier is selected in the Add/Modify Measurementdialog box.

Simulation - APLAC• Fixed an AWR® APLAC® issue with the automatic detection of subcircuits to cache, which could cause subcircuitsto be excluded from caching without the SUBCKT_CACHE element.

• Improved APLAC subcircuit cache calculation time when noise measurements are enabled.

• Fixed a PINDRC diode APLAC simulation error that occurred when performing yield analysis and optimization.

Simulation - AXIEM• AWR® AXIEM® 3D planar EM analysis now reuses previously simulated frequency points with remote simulationswhen adding additional frequency points that do not trigger a new mesh.

• Swept AXIEM EM structures now reuse previously simulated data points when new points are added to the SWPVARcontrol.

• AXIEM simulations now consistently include the effect of conductor roughness.

• Fixed a crash that occurred when AXIEM ran out of memory.

Simulation - Linear• Fixed a "Factorization of matrix failed due to non-finite entries in matrix" error due to an issue withWindows 10 2004.

Simulation - System• Fixed an issue that occurred in certain scenarios where a VSS mixer is used with RF switches in such a way that themixer output could eventually find its way back to the mixer input, and the output signal generated in RF Inspectorsimulations was incorrect.

System Diagram Editor• Pasting a system diagram with a bus into the AWR Design Environment version 15.0x from an older version nowfunctions correctly.

7–4 AWR Design Environment

Scripts

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User Interface• Fixed a problem in the file browser displayed when creating a new schematic with the Create as a linked file check boxenabled. In some situations the Save as type field was empty and the .sch file extension was missing in the file browser.

Wizards - Network Synthesis• The Network SynthesisWizard no longer crashes if more than 32 threads (16 cores with hyperthreading) are available.

Wizards - OpenAccess Import/Export• The OpenAccess Import/Export Wizard has a number of improvements, including new options for specifying whichschematic symbols to export.

Wizards - PCB Import• Extraneous lines no longer appear in imported Gerber files.

• Fixed a crash that could occur when importing a Gerber file directory that contained a netlist.

What's New in AWR Design Environment 7–5

User Interface

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7–6 AWR Design Environment

Wizards - PCB Import

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Version 15.01 UpdatesThe AWR Design Environment® version 15.01 software includes the following new features, enhancements, and userinterface changes.

API• Added API Embed, LinkToFile, Reload, and Save methods for linked documents.

• Added API DrawingObject attribute "ZOffset3D", for accessing a subcircuit Z Offset parameter.

• Changing an offset setting of an offset marker on a rectangular real/imag graph through the API now correctly updatesthe marker's location.

• Fixed an issue in which EM simulation data was not marked as dirty when port excitation was changed by the API,resulting in re-use of incorrect data.

Cell Libraries• Importing a DXF file with layer names exceeding 32 characters no longer causes a crash.

Equations• Marker function results now update after auto-search marker movements.

• Fixed a problem with using equation function marker to reference offset markers.

Graphs• Precision used in the x-axis labels on rectangular graphs is now correctly computed.

• Fixed a problem with dragging graph markers on a measurement plotted with the swept value not on the x-axis.

• Template measurements now plot correctly on 3D Plots.

• Changes to font settings for the axis labels and the title for 3D Plots now work correctly.

• Special characters in document names no longer cause graphs to go blank and simulations to hang.

• Values now correctly display in the label for data markers on a circle measurement when "Use for x-axis" is notspecified for one of the measurement sweep properties.

• The location of parameter markers now correctly updates on a circle measurement that doesn't have a sweep propertywith a "Use for x-axis" setting.

Import/Export• Fixed a regression that prevented file browse dialogs from remembering the most recently selected file type.

• GDSII Import/Export now supports up to 32767 layers and data types.

• Importing a DXF file containing an invalid path object no longer causes a crash.

Job Scheduler• Improved migration of Job Scheduler setup files from v14 to v15 upgrades.

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• You now need to either Verify the remote host or set the transport option when adding a new remote Host entry in theJob Scheduler Admin dialog box. This change fixes the issue of hidden remote job options because the remote Hostdid not have the transport option set.

• Fixed a remote Host connection issue when multiple clients were connecting to the remote host.

Layout• Layout fill patterns consisting of diagonal parallel lines now have the correct upward/downward slope when GraphicsAcceleration is enabled for 2D layout in the Environment Options dialog box.

• The cursor now snaps to the nearest vertex when holding Ctrl while using the Stretch Area command.

• The Via Fill command no longer fills holes inside complex polygons.

• Group rotation of multi-selected shapes in layout is restored.

• Adding an explicit ground to a subcircuit element no longer makes the associated cell appear non-selectable.

• Fixed a Shape Properties dialog box issue in which values displayed using default LPF units instead of the documentLPF units.

Layout - EM• Flipped EM subcircuits are now oriented correctly in the Preview Geometry View of hierarchical AWR® AnalystTMEM structures.

Load Pull• Complex measurement modifiers real, imag, mag, and ang now work correctly with the G_LPGPM load-pullmeasurement.

Measurements - Circuit• The K_Port (propagation constant) measurement no longer has the real and imaginary components swapped.

• Fixed anAnalyst issue with the K_Port (port propagation) measurement, where the value was incorrect at onemid-sweepfrequency.

• When the ID of an X_SWP element is edited, any measurements that reference that element are now updated.

Measurements - Systems• The radiation pattern data file generated by the output file measurement AntPat_EF uses normalized E field values,but the VSS antenna blocks expected absolute E-field values. AntPat_EF is updated to indicate the data file hasnormalized E-field values, and the VSS antenna blocks now recognize those data files as having normalized E-fieldvalues. Also, some issues with the theta/phi angles in VSS antenna blocks when set to 180-degrees no longer occurwhen those angles are auto-set to -180 degrees.

Models - System• C_GA with AMP_F and frequency-dependencies now consistently use the current swept frequency for determiningthe operating point for computing available gain.

• The interpolations used by AMP_B/AMP_B2 are updated to match that of AMP_F when behavioral coefficients arespecified in the data file. Previously the interpolation for the polynomial coefficients were performed in the polynomial

8–2 AWR Design Environment

Layout

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coefficient space. AMP_F's interpolation however is based on the behavioral coefficients. This results in much smootherinterpolation of IM2 and IM3.

• The BFILE_SRC block now re-propagates propagated properties captured by BFILE_SNK, allowing its use withblocks such as RCVR.

• When using the RF_PID block with integration in RF Budget Analysis or RF Inspector simulations, the control outputwould sometimes latch onto an incorrect value. This occurred because during the first one or two passes through thecontrol iterations the measured input was the propagated signal power property, which at that point could be fairlyinaccurate. The inaccurate value was then being used as part of the integration for the next pass, and depending uponthe circumstances, triggering the convergence threshold, resulting in the control loop ending early. The RF_PID blockno longer includes measured input values when they are from propagated signal power in the integration.

Output Files• In some situations The MATLAB output file measurement no longer occasionally issues an error about being unableto create a linear simulator instead of writing out data.

Scripting Editor• An attempt to save a project with missing PDK models from the Scripting Editor now generates a warning rather thanoverwriting silently.

• An attempt to save a read-only project from the scripting window now generates a warning, rather than failing silently.

Scripts• Added a Scripts > Configuration > Match Cadence Colors/Hotkeys script which sets colors and hotkeys to match thoseof Virtuoso or Allegro .

Simulation - Analyst• Fixed an AWR® Analyst-MPTM crash that occurred when using the Export and Open in Analyst MP command in theAWR Design Environment from a project location containing characters such as Japanese characters in its path.

Simulation - APLAC• Fixed an issue with duplicate IDs in the AWR® APLAC® netlist with EMSight extraction when Hierarchy = On.

Simulation - AXIEM• Added many AWR® AXIEM® 3D planar EM analysis improvements to the mesh HARF healing, including healingof HARFs that are connected to port edges. Also added warnings/errors when the HARF healing is set too aggressively,and removes too many connected facets. The error handling is also updated to write error information into the datasets that Support uses to help determine errors in the mesh healing.

• The AXIEM log no longer fails to report previously simulated frequency points when modifying the frequency listand enabling the AFS option.

• AXIEM now detects internal non-conductor volumes that are fully enclosed within a metal volume, and now suppressesthe mesh on these interior surfaces.

What's New in AWR Design Environment 8–3

Output Files

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Simulation - RF Budget• When working with RF Budget Analysis measurements that measure noise power over a bandwidth such as C_SNR,if the noise was above the noise floor it was sometimes reported less than it actually was due to additional frequencypoints with noise set to the noise floor being added. This is fixed.

Simulation - Systems• VSS Time Domain data sets generated in pre-release builds prior to v15.0 build 9968 no longer cause a crash whenattempting to load them. This is fixed in builds 9996 and later. However, any data sets generated with a v15.0 buildbetween 9968 and 9995 must be regenerated.

• When the PHARRAY_ANT parameter DIAGDSP (Diagnostics to display) is set to "Full", the diagnostic output nowincludes steering phase information.

• In the VSS mixers, if LOHMAX was set below LOMULT, incorrect output was generated, as no LO harmonics atLOMULT would be generated. LOHMAX is now automatically increased to LOMULT if it is less than LOMULT.

• If anAMP_B/AMP_B2 blockwas set to use FIR filter implementations and the blockwasmodeling frequency-dependentimpedance mismatch, when measuring EVM the EVM was extremely poor due to extra delay being added to thesignal. This is fixed.

• If a VSS amplifier block was in a swept RF Budget Analysis or RF Inspector simulation, and the sweeps were suchthat at a particular sweep the order of the polynomial representation was less than the previous sweep's polynomialrepresentation, the polynomial coefficients above the new order were not cleared and were incorporated in the newsweep. This might also occur for frequency-dependent amplifiers. This is fixed.

Symbol Editor• The Save command now works for linked circuit symbol files.

Tuning, Yield Analysis and Optimization• The Lineup Optimizer now displays an error message if it cannot write the output file.

• Fixed an issue that caused the Kapu optimizer to hang when optimizing schematics containing MDIF files.

• Fixed a regression with APLAC tuning/optimization/yield simulations of MDIF data files.

• Fixed a crash that sometimes occurred when setting the DCPOUT parameter of AMP_F to "Yes".

• Fixed an issue that caused the optimizer to hang with APLAC solvers.

User Interface• Fixed a problem that could result in a crash on startup if a toolbar was customized with a button having an icon basedupon certain circuit symbols.

• Fixed a regression in which the Text Edit Process Definition command opened the LPF text editor in a read-only mode.

• The Open Project Item command now functions with circuit symbols.

• The Add Existing Item context-menu command for User folders now functions with circuit symbols.

• Fixed the non-responsive Add New > Circuit Symbol command available in the context menu accessed via the Projectin the Project pane.

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Simulation - RF Budget

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• Updated the Add Link To File context command for projects in the Project Browser to work with Global Definitionsfiles.

• The percent character "%" is now supported in rich text boxes.

• Improved the performance of deleting items in a project with a large number of schematics in hierarchy.

Wizards - Network Synthesis• Modified the Network Synthesis Wizard so that it disregards vendor library components that are selected for use at afrequency where the extracted component value is negative.

What's New in AWR Design Environment 8–5

Wizards - Network Synthesis

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8–6 AWR Design Environment

Wizards - Network Synthesis

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Migration IssuesThe following are issues you need to address when migrating from an AWR Design Environment® v14 release to anAWRDesign Environment v15 release. Not all topics apply to every user. If you are not familiar with a topic or programfeature included here, it probably does not apply to your use of the software. You should read about all of the issuesbefore developing your migration strategy. You can contact <[email protected]> with any questions.The path to the <Appdatauser> files referenced in this document is operating system dependent. To view the directorypath to your <Appdatauser> files, choose Help > Show Files/Directories to display the Directories dialog box, thendouble-click the Appdatauser folder.

AWR Design Environment v15 Specific Migration Issues

Licensing Changes

Generalized load pull measurements (measurements beginning with "G_") now require the LPL-100 Advanced LoadPull license feature. See Load Pull Licensing Change in Version 15 for details on enabling this feature.

Operating System

AWRDesign Environment v15 software no longer supportsWindows 7 andWindows Server 2008 R2 operating systems.

HSPICE

AWR® no longer includes HSPICE in future purchases, maintenance renewals, or term deals. If you are using HSPICE,please work with your local Sales team to investigate alternative options.

APLAC

The default value for the Circuit Options dialog box APLAC Sim tab Stability Options > Impedance Points for StabilityEnvelope option is increased to 360. The previous default of 50 is insufficient in many cases.

Remote Computing

In v15, IPC socket is introduced as an alternative transport type for remote computing. This new transport type is preferredover the original pipe transport since sockets do not require Windows credentials. When you add a new remote host withtransport type as "auto-detect", sockets is now the default transport type.

When migrating the AWR Design Environment from v14 to v15, Job Scheduler settings and remote host tables fromv14 also migrate from v14 to v15. Remote hosts that migrated over from v14 have pipes set as the transport type. Toupdate the transport type to socket on both user machines and scheduler nodes:

1. Choose Tools > Job Scheduler Admin to open the Job Scheduler Admin dialog box ,or open it from the Start menuAWRDE program folder.

2. In the Remote Hosts table, double-click on the remote host entry.

3. Change the Transport from awr_pipe_ipc to awr_socket_ipc.

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4. Click Verify to check the connection between the machines. Click OK to close the Host Verify dialog box, and OKagain to close the Host Details dialog box.

5. Repeat the steps for each entry in the Remote Host table. When all entries are updated, click Save, then Close.

Back-Saving to Previous Versions

Measurement Variables

Measurement variables, introduced in AWR Design Environment v14, are not compatible with v13 or earlier versions.Before saving a project as v13, you need to remove measurement variables from measurements.

VSS File-based Nonlinear Amplifier Blocks

The data file format for AMP_F and NL_F is expanded, and the two blocks are now interchangeable. Both blocks arebackwards-compatible, but the newly added data file tags are not. When back-saving to an older version of AWRDesignEnvironment software, see the documentation for that version for the correct data file format.

Version-Independent Migration IssuesThe items in this section address moving files and settings from one software version to another. Some of these files andsettings are automatically migrated. If the previous software version is not found, up to three major versions back aresearched. For example, if migrating to AWR Design Environment v15, AWR Design Environment 14, AWR DesignEnvironment v13, and AWR Design Environment v12 software are searched.

NOTE: Ensure that your Windows® Explorer program is set to show hidden and system files.

Files Automatically Migrated

The Appdatauser and Appdatacommon folders must be in their default locations for files or directories to auto-migrate.Changing their default locations would involve creating a redirect.ini file in the program directory, and is not common.

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Version-Independent Migration Issues

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Files in Appdatacommon

The migration of Appdatacommon is triggered based on the existence of the mwoffice.ini file in the Appdatacommonfolder for the newly installed version.

• If there is an existing mwoffice.ini file, no files or folders are migrated.

• If the mwoffice.ini file does not exist, it is copied from the previous location if found.

• If the mwoffice.ini file does not exist and an older version is not found, a new file is created.

The path to each PDK is stored in the mwoffice.ini file and is available for any user of that computer. The installationlocation of foundry libraries is typically version-independent; the default installation locations are not dependent on theAWR Design Environment version. These paths are used when opening a project using a PDK or by choosing File > Newwith Library.

All additional files and directories at this location are not copied since they should not be used with the new version ofthe software.

Files in Appdatauser

The migration of Appdatauser is triggered based on the existence of the user.ini file in the Appdatauser folder for thenewly installed version. If there is an existing user.ini file, no files/folder are migrated. No existing files or folders areoverwritten.

The following files/folders are migrated:

• All .ini files located at the top level directory of Appdatauser, including user.ini. The user.ini file contains environmentsettings, custom layout modes, and other environment defaults.

• All XML files located at the top level directory of Appdatauser. This includes:

• customizations.xml - contains your hotkey settings.

• UICustomizations.xml - contains your menu settings. You can reset the menus to the AWR Design Environmentv15 defaults.

• UIDockingLayout.xml - contains settings for how different windows are docked in the AWR Design Environmentsuite.

• UIToolBarLayout.xml - contains your toolbar settings. You can reset the toolbars to the AWR Design Environmentv15 defaults.

• materialdefs.xml - There are several pre-set materials such as FR4, alumina, and GaAs available in the EM interface.If you modify these settings, the changes are stored in materialdefs.xml.

• These directories:

• scripts - Global (available in any project) Visual Basic scripts.

• models/model64 - Custom models used in the AWR Design Environment suite.

• cells/cells64 - Custom cells used in the AWR Design Environment suite.

• symbols - Custom symbol files created in the AWR Design Environment suite.

• em_models - User-filled X-model tables.

• XML - XML libraries installed in the default location.

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All additional files and directories in this location are not copied since they should not be used with the new version ofthe software.

Files NOT Automatically Migrated

License File

TARGET: License Administrators

• AWRDesign Environment v15 software requires a new license file. You can request an updated license file by sendingan email to <[email protected]> with your company name and a copy of your current license file.

• Your AWR Design Environment v15 license file is also backwards-compatible to AWR 2006. If you use a floatinglicense server, your lmgrd.exe must be version 11.15.0 or later.

User-Defined XML Libraries

TARGET: Users who have local XML libraries (anything outside of the AWR web library)

• Many users either choose to install a local copy of the XML libraries or add to the default installation with othervendor-specific XML libraries. The default location is the <Appdatauser> folder. If your XML is in this location itcan be migrated automatically (see “Files Automatically Migrated ”).

• Starting in v11, the correct location for these libraries is :\Users\UserName\AppData\Local\AWR\DesignEnvironment\V11.0\XML. There are top level folders for 3D EM Elements, Circuit Elements and System Blocks. AnyXMLfile located in these top level directories is automatically used in the AWRDesign Environment suiteWITHOUTthe need to edit files in the installation folders.

The best way to migrate these libraries is to open your current lib.xml and sys_lib.xml files in the Library folder ofyour old installation and search for any paths you added to this library (perhaps compare with v14). Find those librariesand move the top level XML file to the directory listed above to break the cycle of needing to edit these install XMLfiles.

Other Concerns

Model Compatibility

TARGET: Designers

• When model changes are identified, the project can use a model compatibility flag. When you open an old project ina newer version of the AWR Design Environment software, the simulation results from the previous version do notchange. You can change the model compatibility setting to see simulation results with the old and new modelimplementation. A dialog box similar to the following displays when you open your design in a newer version if thereare models with a compatibility setting in your design.

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Version-Independent Migration Issues

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You can switch betweenmodel versions in the Circuit Options dialog box by choosingOptions > Default Circuit Options,then clicking the AWR Sim tab, clicking the Show Secondary button, and then selecting the desired modeling versionin Model compatibility version.

Multiple AWR Design Environment Versions

TARGET: AWR software installers

• Most users keep AWR Design Environment v14 software installed when upgrading to AWR Design Environmentv15 to ensure their designs upgrade properly before converting permanently to the latest version.

• When you install AWR Design Environment v15 software, both versions run. Uninstalling any version may result inregistry problems; therefore, when you uninstall, AWR recommends that you also repair your active installation. Oneway to repair your installation is to open the Control Panel and then click on the Apps group. Under Apps & features,locate your AWR Design Environment installation and select it. Click the Modify button to display a dialog box withoptions for repairing or uninstalling the software. Select the Repair/Modify option and follow the prompts.

Redirection

TARGET: Users of any type of file redirection (changing the default locations for any of the folders used by the AWRDesign Environment suite)

• In networked environments, some users may choose to change the default location for certain files.

• Complete information on redirection is available in the Installation Guide under "Configuring Program File Locations".If you use this capability, ensure that you make the same changes in AWR Design Environment v15 software that youset up for AWR Design Environment v14.

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9–6 AWR Design Environment

Version-Independent Migration Issues