wireless

Wireless Data Transceiver ________________________________________________________________________

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Introduction Electronic communication refers to sending receiving and

processing of information by electronic means. Communication started with the

introduction wire telegraphy in the eighteen forties, developing with telephony some

decades later and radio at the beginning of this century. Radio communication, made

possible by the invention of triode tube, was greatly improved by the work done during

the Second World War .It subsequently became ore widely used and refined through the

invention of the transistor, integrated circuits and other semiconductor devices. More

recently, the use of satellites and fiber optics has made communication more widespread,

with an increasing emphasis on computer and data communications.

A modern communication system is concerned more with the sorting,

processing and sometimes storing of information before its transmission. The actual

transmission then follows with the filtering of noise .Finally we have the reception which

may include processing steps such as decoding, storage and interpretation. There are

various types and systems for communication. While adopting a particular

communication system for a particular purpose the various human and environmental

factors should be considered, since they must always affect its design, planning and use.

Information Source

Transmitter Channel Receiver Destination

Noise Source

(Distortion)

Encoding Modulation (Distortion)

Decoding Demodulation (Distortion)


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1.1 What is our project? Our project deals with the transmission of information by the wireless

means. We know intercom systems are widely used in factories, chemical plants and

large apartments for communicating. Most of the wireless intercom systems use

frequency modulation system of base band signal (voice).The convenience of using such

systems depends on the environmental conditions. Most of the factories will have a

clamorous atmosphere due the noise produced by the working of the machinery. So there

should be some other means to achieve communication. This is exactly what is done by

the wireless data transceiver. Here the information is entered as plain text and received in

the visual format. The device is attached with a serial keyboard for composing a message

and the LCD screen helps in viewing the message on the receiver side. Also the device is

attached with led and buzzers for various indications.

1.2 How is it implemented? The operational concept involved is achieved by using a

microcontroller 89C52 .The 89C52 is a high performance FLASH microcontroller that

provides engineers with the highest design flexibility possible. The DTMF transceiver

chip MT8888C is an integrated DTMF encoder and decoder with micro interface.FM

modulation system m is used in the device. FM demodulation is achieved by the IC TEA

5591A, the integrated receiver module

The block diagram pictures two stations, each of which is capable of transmission as well

as reception. The hardware unit of each station consists of a microcontroller, DTMF

transceiver, LCD, serial keyboard, fm transmitter and receiver along with the LEDs and

buzzers.

The programming is implemented in ASM51 assembler and fused into the

microcontroller by a high voltage fusing provided by the chip.


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1.3 Block Diagram

FM Transmitter

FM receiver

DTMF Transceiver

LCD

LED and Alarm Indicator

MCU

Keyboard

Power Supply

FM Transmitter

FM receiver

DTMF Transceiver

LCD

LED and Alarm Indicator

MCU

Keyboard

Power Supply


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1.3.1 Block Diagram Description Keyboard: Keyboard 1&2 constitute keyboard module. User interacts with the

microcontroller through the keyboard when the station is in the transmitting mode, user

enters message. Serial keyboard is used in this project. The scan codes associated with

each key is illustrated in Appendix.

Microcontroller: Microcontroller 1&2 comprise this unit. In the transmitting mode of a

station, the microcontroller accepts the message from the keyboard, convert it into DTMF

format and transmit through FM.

In the receiving mode of a station the microcontroller stores message

and when the user enters the description key the original is displayed on the LCD.89C52

the flash version of 8051 family with 8kb internal ROM is used in this project.

Liquid Crystal Display:

While the station is in the transmitter mode, the LCD unit in that

station will display entire message. In the receiver mode the LCD display the received

message. A two line 16 character LCD display with embedded controller HD44780 from

Crystalonics is used.

LEDs and Buzzer:

These units are used as indicators to the user. When the power is ON

the blue LED blinks indicating that the system is ON. When press each key a red LED

blinks indicating the interruption the keyboard. Tone from the buzzer is indicating that a

message is received.

Power Supply:

Power Supply units are used to power the devices. A +5V & +12V

regulated DC supply are required for the functioning of the circuit. Capacitor filter is

used along with the regulator.

DTMF transceiver:

The MT8888C Integrated DTMF Transceiver consists of a high

performance DTMF receiver with an internal gain setting amplifier and a DTMF

generator. The message that stored microcontroller’s RAM is converted into DTMF code


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by the transmitter in the DTMF Transceiver. The received DTMF code from the other

station through FM is decoded by the DTMF receiver in the transceiver and that decoded

data (actual message) is displayed on the LCD screen.

FM Transmitter:

In this system, for transmitting DTMF data the modulation performed

is FM. The DTMF data from the DTMF Transceiver is transmitted with the help of an

FM transmitter. The transmitter is basically a reactance modulator which varies the

capacitance of a varactor diode and hence the resonant frequency of a tank circuit.

FM Receiver:

Data transmitted through FM is only detected by the FM receiver. The

receiver’s output is given to the DTMF Transceiver. An integrated receiver module is

used. The IC has special features like quadrature discrimination signal strength indication

and automatic AFC.


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2.1 FM modulation system The comparatively low cost of equipment for an FM broadcasting

station, resulted in rapid growth in the years following World War II. Within three years

after the close of the war, 600 licensed FM stations were broadcasting in the United

States and by the end of the 1980s there were over 4,000. Similar trends have occurred in

Britain and other countries. Because of crowding in the AM broadcast band and the

inability of standard AM receivers to eliminate noise, the tonal fidelity of standard

stations is purposely limited. FM does not have these drawbacks and therefore can be

used to transmit music reproducing the original performance with a degree of fidelity that

cannot be reached on AM bands. FM stereophonic broadcasting has drawn increasing

numbers of listeners to popular as well as classical music, so that commercial FM stations

draw higher audience ratings than AM stations.

The integrated chip has also played its part in the wide proliferation of

FM receivers, as circuits got smaller it became easier to make a modular electronic

device called the "Walkman", which enables the portability of a tape player and an

AM/FM radio receiver. This has resulted in the portability of a miniature FM receiver,

which is used in our project for reception of FM signal.

Frequency Designation Abbreviation Wavelength 3 - 30 kHz Very Low frequency VLF 100,000-10,000 m 30 - 300 kHz Low frequency LF 10,000 - 1,000 m 300- 3,000 kHz Medium frequency MF 1,000 - 100 m 30 - 30MHz High frequency HF 100 - 10 m 30 - 300 MHz Very High frequency VHF 10 - 1m

300 - 3,000 MHz Ultra-high frequency UHF 1m - 10m 3 - 30 GHz Super-high frequency SHF 10cm - 1cm 30 - 300 GHz Extremely-high frequency EHF 1cm - 1mm

The main frequencies of interest are from 88MHz to 108MHz with

wavelengths between 3.4 and 2.77 meters respectively.


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With a bandwidth of 200 KHz for one station, up to 100 stations can be

fitted between 88 & 108Mhz. Station 201 to 300 denotes the stations, from 88.1 MHz to

107.9 MHz. Station 201 to 220 (88Mhz to 91.2) are for non-commercial stations

(educational) which could be a good area to transmit in, but in recent years the band from

88MHz to 103Mhz has been filled by a lot of commercial channels, making the lower

frequencies very congested indeed.

2.2 FM equations

Angle and Amplitude Modulation are techniques used in

Communication to transmit Data or Voice over a particular medium, whether it is over

wire cable, fiber optic or air (the atmosphere). A wave that is proportional to the original

base band (a real time property, such as amplitude) information is used to vary the angle

or amplitude of a higher frequency wave (the carrier).

Where A is the amplitude of the carrier and f (t) is the angle of the

carrier, which constitutes the frequency ( fc ) and the phase (a) of the carrier. Angle

modulation varies the angle of the carrier by an amount proportional to the information

signal. Angle modulation can be broken into 2 distinct categories, frequency modulation

and phase modulation. Formal definitions are given below:


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Phase Modulation (PM): angle modulation in which the phase of a carrier is caused to

depart from its reference value by an amount proportional to the modulating signal

amplitude.

Frequency Modulation (FM): angle modulation in which the instantaneous frequency of

a sine wave carrier is caused to depart from the carrier frequency by an amount

proportional to the instantaneous value of the modulator or intelligence wave.

Phase modulation differs from Frequency modulation in one important

way. Take a carrier of the form A Cos(wCt + q) = Re{A.e j(wCt + q)} Pm will have the

carrier phasor in between the + and - excursions of the modulating signal. Fm modulation

also has the carrier in the middle but the fact that when you integrate the modulating

signal and put it through a phase modulator you get fm, and if the modulating wave were

put through a differentiator before a frequency modulator you get a phase modulated

wave.


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2.3 Transmission format

The 8 bit data obtained from the keyboard is DTMF signaled by

splitting the lsb and msb nibbles. First the lsb is signaled and then the msb .This is

followed for the remaining characters of the message.

D7 1

D6 0

D5 1

D4 1

D3 0

D2 1

D1 1

D0 0

* 6

Dh3 1

Dh2 0

Dh1 1

Dh0 1

Dl3 0

Dl2 1

Dl1 1

Dl0 0


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Signaling information

I tone (50ms)

Silent (20ms)

II tone (50ms)

I tone (50ms)

Silent (20ms)

II tone (50ms)

I character II character


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3.1 Hardware section Power Supply

FM Transmitter


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FM Receiver

DTMF Transceiver


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Microcontroller interface


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3.1.1 Design Design of current limiting resistors to LED Typical current required by the LED I1=10mA

Required Resistance = (Vp-1.5)/10mA

= 350 ohms

Therefore current limiting resistance required = 470 ohm std.

Design of transistor switch to drive buzzer

Transistor is operated in the saturation region.

Collector current Ic = 2mA

Base current Ib min = Ic/hfe

=2mA/100

=20micro A

Take overdriving factor =5

Required base current Ib=5x20micro A

= 0.1mA

Base resistance Rb=(5-0.7)/0.1mA

=43 Kohms

use 42K std.

Design of power supply

The major parts of the power supply are a transformer, a rectifier, a

filter and a regulator IC. The ac line voltage is reduced to the desired value using the

transformer. Then rectified and filtered using a capacitor filter. Then it is applied to the

regulator IC. The 78xx series regulators provide positive output voltages. It has an

unregulated input voltage applied to one terminal, a regulated output from the third

terminal and the second terminal is grounded .The input voltage may vary within the

permissible limits and the output voltage remains a constant. The 7805 requires a

minimum of 7.3 volts at the input to provide a 5V output voltage. The transformer output


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is rectified using a bridge rectifier. This is filtered using a capacitor. Then it is given to

the input of the regulators. We connect a capacitor between the input of the regulator and

ground. This is to minimize lead inductance. At the output also we put capacitors to

improve transient response.

We know that the minimum input voltage required by the Ic regulator Vi(min) = 7.3V.

In order to maintain Vi (min) >= 7.3V

Vr (peak) <= 12-7.3

<= 4.7 V

Vr (rms) <= 4.7/1.732

<= 2.71V

Take Vr (rms) = 1V

We have Vr(rms) = Idc/4√3 f C

Take Idc = 750 mA

Substituting the above values, we have C=1080 mfd

Take C= 1500micro F

As both KBD data and KBD clk are open collector I/O pins, two pull

up resistors of 10K each are connected. In lcd module in order to adjust the contrast a

10k preset is used

Design of steering circuit for DTMF transceiver

Threshold voltage Vtst = 2.5v

Guard time tone present Tgtp = R1c1 ln Vdd/(Vdd-Vtst)

Take Tgtp = 20ms

Take R1= 470kohm

Substituting the values, we have C1=0.1micro F

Design of FM transmitter circuit

Self made inductance L= N2 ( d2 / 18d+40b)

Where L inductance in micro Henry

D diameter of coil in inches


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B Coil length in inches

N Total number of turns

Resonant frequency of tank circuit F=1/2π√(LC)

Let the transmitting frequency be 100 MHz

Take L=0.1 micro H

Substituting we have C= 25.33 pF (use varacter diode BB 122)

X=XL||Xc= 31.6 ohms

Gain A= X/re=31.6/26 =1.21

For sustained oscillations Aβ=1

So β=0.824 = Re/(Re+Xfb)

Let Cfb = 4.7 pf => Xfb=338.6 ohm

Substituting the values we have Re=72 ohm use 68 ohm std.

Vb=Ic re+Vbe = 0.8v

9IbR2=0.8V => R2 = 9K ohm use 9.2 k ohm std.

10 Ib R1 = 12-0.8 => R1 = 129K ohm use 128 K ohm std.

Bias current for varacter = 70 micro A max.

R3 = 12/70 micro A = 171.4 K ohm take 180 K ohm std.

Take Rh1 = 47 K ohm.

3.1.2 Keyboard Module

The IBM keyboard sense scans codes to the microcontroller. The scan

code indicates what keys have been pressed or released. Take for example the ‘A’ key.

The ‘A’ key has a scan code of 1CH. When ‘A’ key is pressed the key board will sent

1CH down its serial line. If the keys held down for longer than its typematic delay

another 1CH will be sent. This keeps occurring until another key has been pressed or ‘A’

key has been released.

The keyboard only has one code for each key. It doesn’t care if the shift

key has been pressed. It will still send the same code. It is up to the software to determine

this and take appropriate action. The keyboard doesn’t even process the num lock, the


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caps lock and the scroll lock. When the caps lock is pressed for example, the keyboard

will send the scan code for caps lock. There are 101 keys and 8-bits make 256 different

combinations, thus we need to send one byte per key.

Scan codes

Whenever the power is turned on keyboard enters a BAT (Basic

Assurance Test) and set the default scan code. The diagram below shows the scan

assigned to individual keys. The scan cod is shown on bottom of the key. Example scan

code for ESC is 76H

The scan code assignments are quiet random. In many cases the easiest

way to convert scan code to ASCII code would be to use a lookup table. Below are the

scan codes for extended keyboard and numeric keypad.

The keyboards connector

The keyboard is connected to external equipment using 4 wires. These

wires are shown below for five pin din male plug and ps/2 plug. A fifth wire sometimes

can be found. This was once upon a time implemented as keyboard reset, but today is left

disconnected. Both KBD clock and KBD data are open collector bi-directional I/O lines.

If desired, the host can talk to keyboard using these lines.

Male

(Plug)

Female

(Socket)

5-pin DIN (AT/XT): 1 - Clock 2 - Data 3 - Not Implemented 4 - Ground 5 - Vcc (+5V)

Male

(Plug)

Female

(Socket)

6-pin Mini-DIN (PS/2): 1 - Data 2 - Not Implemented 3 - Ground 4 - Vcc (+5V) 5 - Clock 6 - Not Implemented


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Keyboard to Host communication The keyboard is free to send data to host when both the KBD data and

KBD clock lines are high. The transmission of data from keyboard to the host

Is done with a frame of 11 bits. The first bit is a start bit (logic 0) followed by 8 data bits

(LSB first) , one parity bit (odd parity) and a stop bit ( logic 1). Each bit should be read

on the falling edge of clock.

The above waveform represents a one byte transmission from the

keyboard. The keyboard may not change its data lines on the rising edge of clock as

shown in figure. The data line only has to be valid on the falling edge of clock. The

keyboard will generate the clock. The frequency of clock signal typically ranges from 20

to 30 KHz. The LSB is always sending first.

3.1.3 LCD module

The LCD module is a dot matrix liquid crystal display that displays

alpha numeric, characters and symbols. The built in controller HD44780 and driver LSI’s

provide convenient connectivity between the dot matrix and most of the microcontrollers.

All the functions required for the dot matrix display are internally provided. Internal

refresh is provided by the display module. The CMOS technology makes the device ideal

For applications in hand held, portable and other battery powered instruments with low

power consumptions

Features of CRYSTALLONICS CDM16216 LCD module

v Easy interface with a 4-bit or an 8-bit MPU

v Built in LCD dot matrix controller


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v Display data RAM of 80 characters

v Character generator ROM which can provide 160 characters with font size of 5X7

dots

v Both DDRAM and CGRAM can be read from the MPU

v Internal automatic reset at power on

v Built in oscillator

v Wide range of instruction functions

Interfacing the LCD module to microcontroller

The data bus with MCU is available either for 8-bits one operation or

4-bit two operations allowing the display module to be interfaced with an 8-bit or 4-bit

MCU. When the interface is 8-bit long, data bits DB0 to DB7 are all used and data

inputs/outputs is carried out simultaneously. The latched data controls the driver for

generating a drive waveform outputs. The transmission of serial data always starts at

display data character pattern, corresponding to the last address of the DDRAM.

Hardware design of LCD module The display module does not have conventional chip select terminal.

When the display module is correctly connected the data bus of a MCU, the enable has to

b derived from the CS or I/O.

When connecting the display module through a parallel I/O device, the

burden of ensuring proper operation falls on the software. Incorrect combination of data

CONTROLLER

L C D

DRIVER

E R/W RS D0 To D7 VDD VL VSS

COM

8

4

SEG40

BLOCK DIAGRAM


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bus direction and R/W pin logic can cause irreversible damage to display module as well

as the PIO.

DB0 to DB7 has the capacity of driving one TTL or capacitance of 130

pf. The data bus terminals have 3 state constructions. When the enable level is at low

level, these data bus terminals will remain in high impedance states. The data bus

terminals have pull-up MOS, so when the data bus is open, it produces high output

voltages.

At the interface of LCD module, there are 3 power supply terminals

VDD, GND, V0. The LCD is driven by the voltage which is determined by VDD-V0.

Since the optimum voltage for power supply for LCD shifts according to temperature

change, voltages at V0 terminal need to be adjusted. V0 also need to be adjusted for

optimum contrast at the angle at which the ODM is viewed.

LCD initialization

o The display module is automatically initialized (reset) when the power is turned

on using the internal reset circuit. The Busy Flag (BF) holds ‘high’ and does not

accept instructions until initialization ends. The following procedure should be

carried out, to initialize the module by instruction.

v Turn on the power

v Wait for more than 15 ms after VDD rises to 4.5 volts

v Set interface as 8-bits long (function set)

v Wait for more than 100µs

v Set interface as 8-bit long (function set)

v Busy Flag (BF) can be checked now. When BF is not checked the waiting time

between instructions should be longer than the instruction execution time (about

2ms on an average)

v Set interface as 4-bits / 8-bits, number of display lines and character font (function

set). The number of display lines and character font cannot be changed after this

point

v Check the Busy Flag or give a time delay of 2ms

v Set display off (display on or off control)



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v Set display clear ( clear display)


v Set cursor move direction and specify display shift (entry mode set)


v Initialization complete

Operational overview

Busy Flag When the busy flag is "1", the controller is in the internal operation

mode, and the next instruction will not be accepted. When R/W is ‘1’ and RS is ‘0’, the

busy flag is output from DB7. The next instruction must be written after the Busy Flag

goes low.

Address counter (AC)

The address counter (AC) assigns addresses to DD and CG RAM’s.

When an instruction for address is written in IR, the address information is sent from IR

to AC. Selection of either DD or CG RAM is also determined concurrently by the

instruction.

After writing into (or reading from) DD or CG RAM display data, AC

is automatically incremented or decremented by 1. AC contents are output as DB0-DB6

when RS = 0 and R/W = 1. ]

Display Data RAM (DD RAM)

The display data RAM (DD RAM) stores display data represented in

8-bit character codes. Its capacity is 80 x 8 bits, or 80 characters. On displays with fewer

than 80 characters, any DD RAM that is not used for display can be used as a general

data RAM. The DD RAM address is set in the Address Counter (AC) and is expressed in

hexadecimal.


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Character Generator ROM (CG ROM)

The Character Generator ROM generates 5 x 7 dot or 5 x 10 dot

character patterns from 8-bit character codes. It contains 192 5 x 7 dot character patterns

and 192 5 x 10 dot character patterns.

Character Generator RAM (CG RAM)

The Character Generator RAM is RAM with which the user can

redefine character patterns in software. With 5 x 7 dots, 8 user-defined character patterns

can be stored and with 5 x 10 dots, 4 user-defined character patterns can be stored

CG RAM Programming

CG RAM is organized as 8 blocks each constructed with a 5columns

by 8 rows pixel format. RAM address bits 3-5 correspond to selection of 1 out of these 8

blocks. Bits2-0 designates each row in that block. Note that the selection of these 8

blocks of CGRAM requires bit 7 to be ‘0’and bit 6 to be ‘1’.

These blocks can be programmed to generate character pattern as

required using bits 0-4.Bits 5-7 are not used. Once the address of the block is selected for

data packet generation, data is written using ‘Writ data to CGRAM’ command. The

address gets automatically incremented after each data is written,’1’for the CGRAM data

in the character patterns correspond to dark pixel of the display. The 8-th line is the

cursor position and display is performed in logical OR with the cursor.

During CGRAM Programming cursor appears randomly on the LCD

though it is meaningless. It will have to be positioned correctly after the CGRAM

programming is complete.

Underline/Blinking Cursor

Cursor is under the control of MCU programmer. The display of the

cursor on the LCD is made at position corresponding to the DDR RAM address set to


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the address counter (AC).The cursor is displayed randomly in any position when AC

selects CG RAM address through it is meaningless

Timing Generation Circuit The timing generation circuit is used to generate timing signals to

operate internal operations upon receipt of MCU instruction and also for such internal

circuit as the DD RAM, CG RAM and CG ROM

It is also designed that the external operation caused by accessing from

the MCU will not interfere with the internal operation caused by the LCD.Therefore,

when writing data into the DDRAM, for example, there will be no undesirable influence,

such as flickering on the display area. In addition, this circuit generates the transfer signal

to the externally connected driver chips for display character expansion.

Software Design of LCD Module Instruction code The instruction code is a command set through which the display module

is controlled by the MCU.Prior to internal execution of the instruction code, control

information is temporarily stored in the internal registers of the display module, to allow the

interface from the display module internal operations to various types of MCU’s which

operates at different speeds or to allow interface to peripheral control ICs.The display module

begins operation at the receipt of instruction code input from the MCU.

There are four types of instructions, those that:

1. Designate the display module functions such as display format, data length, etc.

2. Define internal RAM address.

3. Perform data transfer with internal RAM.

4. Others.

Clear Display

RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Code Higher Order Bits Lower Order Bits

When the instruction is executed, the LCD display is cleared and

returned to its original status if it was shifted. The cursor goes to the left edge of the

0 0 0 0 0 0 0 0 0 0


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display. Space code ‘20h’is written into all DD RAM address. Sets DD RAM address ‘0’

in the address counter. Sets I/D=’1’of the entry modes of the entry mode does not change.

Return Home RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Code Higher Order Bits Lower Order Bits The cursor or blink goes to the left edge of the display. The display

returns to its original status if it was shifted .DD RAM contents do not change .Sets the

DD RAM address ‘0’ in the address counter.

Entry Mode Set RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Code Higher Order Bits Lower Order Bits When the I/D is set, the 8-bit character code is written or read to and

from the DD RAM, the cursor shifts to the right by 1 character position or to the left by 1

character position. The address counter is incremented or decremented by ‘1’ this time

.Even after the character pattern code is written or read to and from the CG RAM, the

address counter is incremented or decremented by ‘1’.

S shifts the entire display either to the right or to the left when S is

‘1’, to the left when I/D are ‘1’ and to the right when I/D is ‘0’. Thus it looks as if the

cursor stands still and the display moves. The display does not shift when reading from

the DD RAM or when writing into or reading out from the CG RAM when S=0.

Display ON/OFF control RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Code Higher Order Bits Lower Order Bits

0 0 0 0 0 0 0 0 1 0

0 0 0 0 0 0 0 1 I/D S

0 0 0 0 0 0 1 D C B


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The display is ON when D=1 and OFF when D=0. When OFF due to

D=0, display data remains in DD RAM. It can be displayed immediately by setting D=1.

The cursor is displayed when C=1 and goes OFF when C=0. Even if the cursor

disappears, the function of I/D, etc. does not change during display data write. The cursor

is displayed using 5 dots in the 8th line when the 5X7 dot character font is selected and 5

dots in the 11th line when 5X10 dot character font is selected. The character indicated by

the cursor blinks when B=1. The blink is displayed by switching between all black dots

and display characters at 406.6ms. Interval when fcp or fosc=250 kHz. The cursor and

the blink can be set to display simultaneously. (The blink interval changes according to

the reciprocal of fcp of fosc 409.6*250/270=379.2ms when fcp= 270 kHz.)

Cursor or Display Shift RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Code Higher Order Bits Lower Order Bits Shifts cursor position to the right or left without writing or reading

display data. The function is used to correct or search for the display. In a 2-line display,

the cursor moves to the 2nd line when it passes the 40th digit of the 1st line. Notice that the

1st and 2nd line displays shift at the same time. When the displayed data is shifted

repeatedly each line only moves horizontally. The 2nd line display does not shift into the

1st line position. Address counter does not change if the only action performed is shift

display.

S/C R/L

0 0 Shifts the cursor position to the left 0 1 Shifts the cursor position to the right 1 0 Shifts the entire display to the left 1 1 Shifts the entire display to the right

0 0 0 0 0 1 S/C R/L 0 0


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Function Set RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Code Higher Order Bits Lower Order Bits When DL=’1’, the data I/O to and from the MCU is carried out by the means of

8-bits from DB7 to DB0. When DL=0, the data I/O to and from the MCU is carried out in

two steps through the 4-bits DB7 to DB4. The ‘N’ sets the number of display lines. The

two line display mode of the LCD is selected when N=’1’, while the one line display

mode of the LCD is selected when N=’0’. The ‘F’ sets the character font. The 5X7 dots

character font is selected when F=’0’, while 5X10 dots character font is selected when

F=’1’. This instruction is executed at the start of the program. From this point the

function set instruction cannot be executed unless the interface data length is changed i.e.

software reset is performed.

Set CG RAM address RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Code Higher Order Bits Lower Order Bits Sets the CG RAM address into the address counter in binary A5 to A0. In the

5X10 font mode A5 and A4 define the CG RAM block number while A3-A0 defines the

row within the block. In the 5X7 font mode A5-A3 define the CG RAM block number

while A2-A0 defines the row within the block.

Set the DD RAM Address RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Code Higher Order Bits Lower Order Bits

0 0 0 0 1 DL N F 0 0

0 0 0 1 A5 A4 A3 A2 A1 A0

0 0 1 B6 B5 B4 B3 B2 B1 B0


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Sets the DD RAM address into the address counter in binary B6 to B0.

Data then written or read from the ODM pertains to the DD RAM. However, when N=’0’

B6 to B0 is ‘00’ to ‘4F’, when N=’1’ B6 to B0 is ‘00’ to 27H for the first line, and

40~67H for the 2nd line.

Read Busy Flag and Address RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Code Higher Order Bits Lower Order Bits Reads the busy flag that indicates the system is now internally

executing a previously received instruction. BF=1 indicates that internal operation is in

progress. The next instruction will not be accepted until BF goes ‘0’. Check the BF status

before the next write operation.

At the same time, the value of the address counter expressed in binary

C6 to C0 is read. The address counter is used by both CG and DD RAM addresses, and

its value is determined by the previous instruction.

Write Data to CG or DD RAM RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Code Higher Order Bits Lower Order Bits Writes binary 8 data DDDDDDDD to the CG or the DD RAM.

Whether the CG or DD RAM is to be written in to is determined by the previous

specification of CG or the DD RAM address setting. After write the address is

automatically incremented or decremented by one according to the entry mode. The entry

mode also determines display shift.

Read Data from CG or DD RAM RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Code Higher Order Bits Lower Order Bits

0 1 BF C6 C5 C4 C3 C2 C1 C0

1 0 D D D D D D D D

1 1 D D D D D D D D


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Reads binary 8 data DDDDDDDD from the CG or the DD RAM. The

previous designation whether the CG or DD RAM is to be read. Before entering the read

instruction you must execute either the CG or DD RAM address set instruction. If you

don’t, the first data will be invalid. The address set instruction need not be executed just

before the read instruction when shifting the cursor by cursor shift instruction (when

reading out DD RAM). The cursor shift instruction operation is same as that of the DD

RAM’s address set instruction. After a read the entry mode automatically increases the

address by one. However display shift is not executed no matter what the entry mode is.

Instruction and Display Relationship The display module functions must be set by Function Set prior to

display. Since the display data RAM can store data for 80 characters, as explained before,

the RAM can be used for displays like moving messages when combined with displays

shift operation. Since the display shift operation changes display position only and DD

RAM contents remains unchanged, displayed data can be entered 1st can be output when

the return operation is performed.

3.1.4 DTMF transceiver module

Dual tone multi frequency

The purpose of DTMF decoding is to detect sinusoidal signals in the

presence of noise. There are plethoras of cost effective integrated circuits on the market

that do this quite well. In many (most?) cases, the DTMF decoder IC interfaces with a

microcontroller. In these instances, why not use the microcontroller to decode the

sinusoids? Well the answer is because the typical microcontroller based decoder requires

an A/D converter. Furthermore, the signal processing associated with the decoding is

usually beyond the scope of the microcontroller's capabilities. So the designer is forced to

use the dedicated IC or upgrade the microcontroller to perhaps a more costly digital

signal processor


________________________________________________________________________


In DTMF there are 16 distinct tones. Each tone is the sum of two

frequencies: one from a low and one from a high frequency group. There are four

different frequencies in each group.

Your phone only uses 12 of the possible 16 tones. If you look at your

phone, there are only 4 rows (R1, R2, R3 and R4) and 3 columns (C1, C2 and C3). The

rows and columns select frequencies from the low and high frequency group respectively.

The exact value of the frequencies is listed in Table 3 below:

TABLE 3: DTMF Row/Column Frequencies LOW-FREQUENCIES

ROW # FREQUENCY (HZ)

R1: ROW 0 697 R2: ROW 1 770 R3: ROW 2 852 R4: ROW 3 941 HIGH-FREQUENCIES

COL # FREQUENCY (HZ)

C1: COL 0 1209 C2: COL 1 1336 C3: COL 2 1477 C4: COL 3 1633 C4 not used in phones

Thus to decipher what tone frequency is associated with a particular

key, look at your phone again. Each key is specified by its row and column locations. For

example the "2" key is row 0 (R1) and column 1 (C2). Thus using the above table, "2"

has a frequency of 770 + 1336 = 2106 Hz The "9" is row 2 (R3) and column 2 (C3) and

has a frequency of 852 + 1477 = 2329 Hz.


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The following graph is a captured screen from an oscilloscope. It is a

plot of the tone frequency for the "1" key:

You can see that the DTMF generated signal is very distinct and clear.

The horizontal axis is in samples. The frequency of the tone is about 1900 Hz - close to

the 1906 Hz predicted by Table 3 (697+1209).

DTMF transceiver module – MT 8888C

The MT8888C is a monolithic DTMF transceiver with call progress

filter. It is fabricated in CMOS technology offering low power consumption and high

reliability. The receiver section is based upon the industry standard MT8870 DTMF

receiver while the transmitter utilizes a switched capacitor D/A converter for low

distortion, high accuracy DTMF signaling. Internal counters provide a burst mode such

that tone bursts can be transmitted with precise timing. A call progress filter can be

selected allowing a microprocessor to analyze call progress tones. The MT8888C utilizes

an Intel micro interface, which allows the device to be connected to a number of popular

microcontrollers with minimal external logic.


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3.1.5 FM Transmitter Introduction When creating a system for transmitting a frequency modulated wave a

number of basic building blocks have to be considered, the diagram below gives a very

broad impression of the transmitter and its individual parts.

Exciter/modulator

· Carrier Oscillator generates a stable sine wave for the carrier wave. Linear

frequency even when modulated with little or No amplitude change

· Buffer amplifier acts as a high impedance load on oscillator to help stabilise

frequency.

· The Modulator deviates the audio input about the carrier frequency. The peak + of

audio will give a decreased frequency & the peak - of the audio will give an

increase of frequency


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Frequency multiplier

· Frequency multipliers tuned-input, tuned-output RF amplifiers. In which the

output resonance circuit is tuned to a multiple of the input. Commonly they are *2

*3*4 & *5.

Power output

· This develops the final carrier power to be transmitter.

· Also included here is an impedance matching network, in which the output

impedance is the same as that on the load (antenna).

Pre-emphasis

Improving the signal to noise ratio in FM can be achieved by filtering,

but no amount of filtering will remove the noise from RF circuits. But noise control is

achieved in the low frequency (audio) amplifiers through the use of a high pass filter at

the transmitter (pre-emphasis) and a low pass filter in receiver (de-emphasis) The

measurable noise in low- frequency electronic amplifiers is most pronounced over the

frequency range 1 to 2KHz. At the transmitter, the audio circuits are tailored to provide a

higher level, the greater the signal voltage yield, a better signal to noise ratio. At the

receiver, when the upper audio frequencies signals are attenuated t form a flat frequency

response, the associated noise level is also attenuated.

The Oscillator

The carrier oscillator is used to generate a stable sine-wave at the

carrier frequency, when no modulating signal is applied to it . When fully modulated it

must change frequency linearly like a voltage controlled oscillator. At frequencies higher

than 1MHz a Colpitts (split capacitor configuration) or Hartley oscillator (split inductor

configuration) may be deployed.

A parallel LC circuit is at the heart of the oscillator with an amplifier

and a feedback network (positive feedback). The Barkhausen criteria of oscillation


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require that the loop gain be unity and that the total phase shift through the system is

360o. I that way an impulse or noise applied to the LC circuit is fed back and is amplified

(due to the fact that in practice the loop gain is slightly greater than unity) and sustains a

ripple through the network at a resonant frequency of Hz.

The Barkhausen criteria for sine-wave oscillation maybe deduced from the following

block diagram

Condition for oscillation

xo+ yo = 0o or 360o

i.e. the total phase shift produced by the amplifier and the feed back network should be 00 in order to produce sustained oscillation

Condition for Sine-wave generation A1 * A2 = 1


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The above circuit diagram is an example of a colpitts oscillator; an LC

(L1, C1 &C2) tank is shown here which is aided by a common emitter amplifier and a

feedback capacitor (C_fb) which sustains oscillation. From the small signal analysis in

order for oscillation to Kick off and be sustained the frequency of the

oscillator is found to be , where C* is .

Reactance modulator

The nature of FM as described before is that when the base band signal

is Zero the carrier is at it's "carrier" frequency, when it peaks the carrier deviation is at a

maximum and when it troughs the deviation is at its minimum. This deviation is simply a

quickening or slowing down of frequency around the carrier frequency by an amount

proportional to the base band signal. In order to convey the characteristic of FM on the

carrier wave the inductance or capacitance (of the tank) must be varied by the base band.

Normally the capacitance of the tank is varied by a varactor diode. The varactor diode

(seen below) when in reverse bias has a capacitance across it proportional to the


________________________________________________________________________


magnitude of the reverse bias applied to it. The formula for working out the instantaneous

capacitance is shows that as the reverse bias is increased the capacitance is decreased.

CD: Instantaneous capacitance about the Diode's terminals CO: is the capacitance at zero Reverse bias voltage

Applying this to an LC tank: as the capacitance decreases the frequency

increases. So placing a fixed reverse bias on the varactor will yield a fixed capacitance

which can be placed in parallel capacitor and inductor. A bypass capacitor can be used to

feed the base band voltage to the varactor diode, the sine-wave base band voltage has the

effect of varying the capacitance of the varactor up and down from the level set by the

fixed reverse voltage bias. As the base band peaks the varactor's capacitance is at a

minimum and the overall frequency will increase, applying this logic to when the base

band troughs the frequency will decrease. Looking at the three cases for the varactor

diode, Maximum capacitance, and Nominal capacitance set by V_bias (no modulation)

and Minimum capacitance and observing the frequency will show that by modulating the

reactance of the tank circuit will bring about Frequency Modulation.

With no base band influence (the carrier frequency)


________________________________________________________________________


With peak negative base band influence.

With peak positive base band influence.

The diagram above show's a proposed modulation scheme, with the

amplifier and phase network discussed earlier in the oscillator section.

Buffer Amplifier

The buffer amplifier acts as a high input impedance with a low gain

and low output impedance associated with it. The high input impedance prevents loading

effects from the oscillator section, this high input impedance maybe looked upon as RL

in the analysis of the Colpitts Oscillator. The High impedance RL helped to stabilize the

oscillator frequency.

Looking at the Buffer amplifier as an electronic block circuit, it may

resemble a common emitter with low voltage gain or simply an emitter follower

transistor configuration.


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Frequency Multipliers

Frequency modulation of the carrier by the base band can be carried

out with a high modulation index, but this is prone to frequency drift of the LC tank, to

combat this drift, modulation can take place at lower frequencies where the Q factor of

the tank circuit is quite high (i.e. low bandwidth or less carrier deviation) and the carrier

can be created by a crystal controlled oscillator. At low frequency deviations the crystal

oscillator can produce modulated signals that can keep an audio distortion under 1%. This

narrow-band angle modulated wave can be then multiplied up to the required

transmission frequency, the deviation brought about by the base band is also multiplied

up, which means that the percentage modulation and Q remain unchanged. This ensures a

higher performance system that can produce a carrier deviation of ±75Khz.

Frequency multipliers are tuned input, tuned output RF amplifiers,

where the output resonant tank frequency is a multiple of the input frequency. The

diagram of the simple multiplier below shows the output resonant parallel LC tank which

is a multiple of the input frequency.


________________________________________________________________________


The circuit above is good for low multiplying factors (i.e. *2 ), for

triplers and especially quadruplers, current idlers are used to improve efficiency. These

series resonant LC's help in the output filtering of the input, but more importantly they

aid in the circulation of harmonic currents to enhance the transistor's non-linearity. The

idlers can be tuned to fi, 2fi , N-1(fi), the final output tank is tuned to fo = N(fi).

Other devices can be used instead of the transistor, one of which is

called a Step Recovery Diode (SRD) or snap diode: it accumulates part of the input cycle

and then releases it with a snap. The circuit efficiency or power loss is proportional to

1/N as opposed to 1/N2 for a good transistor multiplier. Of course the transistors current

gain will make up for some of the loss provided by the transistor multiplier circuit.

So for high efficiency transistor power amplifiers, it is important to

realize that most of the non-linearity is provided in the collector-base junction (varactor

diode behavior) and not the base-emitter, in order to maintain a high current gain.

Driver Amplifier

The driver amplifier can be seen to do the same function as the buffer

amplifier, i.e. a high input impedance, low gain (close to unity) and low output

impedance between the frequency multiplier and power output stages of the transmitter.

The circuitry is the same as discussed in the Buffer amplifier description.


________________________________________________________________________


Power Output Amplifier

The power amplifier takes the energy drawn from the DC power supply

and converts it to the AC signal power that is to be radiated. The efficiency or lack of it in

most amplifiers is affected by heat being dissipated in the transistor and surrounding

circuitry. For this reason, the final power amplifier is usually a Class-C amplifier for high

powered modulation systems or just a Class B push-pull amplifier for use in a low-level

power modulated transmitter. Therefore the choice of amplifier type depends greatly on

the output power and intended range of the transmitter.

Antenna

The final stage of any transmitter is the Antenna, this is where the

electronic FM signal is converted to electromagnetic waves, which are radiated into the

atmosphere. Antennas can be Vertically or Horizontally polarized, which is determined

by their relative position with the earth's surface (i.e. antenna parallel with the ground is

Horizontally polarized). A transmitting antenna that is horizontally polarized transmits

better to a receiving antenna that is also horizontally polarized; this is also true for

vertically polarized antennas. One of the intended uses for the transmitter is as a tour

guiding aid, where a walkman shall be used as the receiver, for a walkman the receiving


________________________________________________________________________


antenna is the co-axial shielding around the earphone wire. The earphone wire is

normally left vertical; therefore a vertically polarized whip antenna will be the chosen

antenna for this particular application.

Radiation Resistance

The power radiated by an antenna is given by the Pointing vector

theorem r = E X H watts/m2 Getting the cross product of the E (electric field strength)

and H (magnetic field strength) fields ,multiply it by a certain area (p.r2) and equating the

resulting power to I2.Rr , Rr the radiation resistance maybe obtained.

Where dl is the length of the antenna, l is the wavelength and n is an exponent value that

can be found by using (dl/l) on the y-axis and then n can be found on the x-axis.

Taking a centre fed dipole with a length of approximately half a

wavelength, due to a capacitive effect at the ends of the antenna the overall length in

practice is shorter (95% of the theoretical length). For dl half the wavelength, n is found

to be 3.2. Rr = 789.5 * (0.5 * .95)3.2 = 72.9 » 73W .

For an end fed half wavelength making a few elementary changes to

the above equation, i.e. making the length 97.5% and halving and then negating the


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exponent to give n = -1.6 which results in the radiation resistance equal to 789.5 * (0.5 *

.975)-1.6 = 2492 » 2.5KW

Power transfer

Maximum power transfer between the antenna and the electronics

circuitry will have to be looked at in order to produce an antenna that will be efficient in

transmitting an audio signal to a receiver. Taking the case of the receiver with an antenna

of impedance Zin connected with the input terminal, which is terminated with a resistor

Rg. The maximum power transfer theorem shows that with a voltage induced in the

antenna the current flowing into the receiver will be I = V / (Zin + Rg). The power

transferred will be I2.Rg, differentiating the power with respect to Rg and letting the

derivative equal to Zero for max. Power transfer, it is shown that Zin + Rg = 2Rg, which

means that Rg will be equal to Zin.

Reciprocity

The theorem for reciprocity states that if an emf is applied to the

terminals of a circuit A and produces a current in another circuit B, then the same emf

applied to terminals B, will produce the same current at the terminals of circuit A. Simply

put means that every antenna will work equally well for transmitting and receiving. So

applying the same logic of max. Power transfer at the receiver to a transmitter circuit, the

output impedance of the transmitter must match the input impedance of the antenna,

which can be taken as the radiation resistance of the antenna.

Now that a qualitative view of some of the characteristics of an antenna

have been looked at, it is now time to look at some of the basic types of antenna that can

be considered for this project.

Hertz Dipole

The Hertz Antenna provides the best transmission of electromagnetic

waves above 2 MHz, with a total length of ½ the wavelength of the transmitted wave.


________________________________________________________________________


Placing the + and - terminals in the middle of the antenna and ensuring

that the impedance at the terminals is high (typically 2500W ) and the impedance at the

open ends is low (73W ). This will ensure that the voltage will be at a minimum at the

terminal and at a maximum at the ends, which will efficiently accept electrical energy

and radiate it into space as electromagnetic waves. The gap at the centre of the antenna is

negligible for frequencies above 14 MHz.

Monopole or Marconi Antenna

Gugliemo Marconi opened a whole new area of experimentation by

popularizing the vertically polarized quarter wave dipole antenna, it was theorized that

the earth would act as the second quarter wave dipole antenna. Comparing the signal

emanating from the quarter wave antenna in mV/m, it has been shown experimentally that

for a reduction in the antenna from l/2 to l/4 a reduction of 40 % (in mV/m) takes place,

for a reduction l/4 to l/10 a reduction of only 5% (in mV/m). This slight reduction of .05

in transmitted power for a decrease of .75 in antenna length seems impressive, but there

is a decrease in the area of coverage.

When considering an antenna type and size for this project 2 things

have to be taken into account, the frequency of transmission and the portability of the

antenna.

Transmitting in a frequency range of 88 to 108 MHz, the mean

frequency is (88 * 108)½ = 97.5MHZ. Rounding this off to 100MHz, calculating the

wavelength gives (3*108 / 100*106 ) yields a wavelength of approximately 3 meters. l/2

= 1.5 m ; l/4 = .75m ;l/10 = 30cm

The above analysis concludes that the use of an adjustable end fed

whip antenna with an affective length of 30 to 75 cm could be used with considerable

affect.


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Impedance matching

Between the final power amplifier of the transmitter and the antenna,

an impedance matching network may be considered. One of the possible surprises in

power amplifiers is the realization that output impedance matching is not based on the

maximum power criteria. One reason for this is the fact that matching the load to the

device output impedance results in power transfer at 50% efficiency.

An impedance matching system maybe merely a special wide-band

transformer which is used for broadband matching (i.e. between 88 & 108Mhz), which

maybe a two pole LC band-pass or low pass resonant circuits to minimize noise and

spurious signal harmonics. The purpose of the impedance matching network is to

transform load impedance to impedance appropriate for optimum circuit operation.

Detailed analysis and calculations will be used latter on when evaluating the final design

of the system.

Here are a few equations that determine the inductance and capacitor values from the above figure, when RL (Rantenna) and Ro (the output impedance of the amplifier) are known.

Quality factor : determines the bandwidth


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The impedance of the inductor @ the designed frequency

The impedance of the capacitor @ the designed frequency

The use of this matching network is predicted on the fact that Ro < RL

according to the equation for calculating the inductance XL. This method of matching is

similar to the so called quarter wave transformer for transmission lines.

3.1.6 FM receivers The FM receiver is basically a super heterodyne receiver; the block

diagram is shown in figure. The basic differences with the AM receiver are that FM has a

higher operating frequency and requires de-emphasis networks. The FM system has a

completely different demodulation method. Also the AGC voltage is obtained differently.

RF Amplifier

Mixer IF Amplifier

Limiter Discriminator

De-emphasis

Power Amplifier

Local Oscillator


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The integrated receiver module – TEA 5591A The TEA5591A is a 24-pin integrated radio circuit, derived from the

TEA5591 and is designed for use in AM/FM portable radios and clock radios. The

TEA5591A differs from the TEA5591 in that it has:

· Separate IF input pins for AM and FM

· A split-up AM-IF stage (for distributed selectivity)

· An LED driver indicator

The main advantage of the TEA5591A is its ability to operate over a wide range of

supply voltages (1.8 to 15 V) without any loss of performance.

The FM circuit incorporates:

· An RF input amplifier

· A double balanced mixer

· A ‘one-pin’ oscillator

· Two IF amplifiers (for distributed selectivity)

· A quadrature demodulator for a ceramic filter

· Internal AFC

Features

· LED AM/FM indicator

· A DC AM/FM switch facility

· Three separate stabilizers to enable operation over a wide range of supply

voltages (1.8 to 15 V)

· All pins (except pin 10) are ESD protected

A detailed description of the IC is given in the datasheet.

3.1.7 Microcontroller module- Atmel 89C52 The AT89C52 is a low power, high performance CMOS 8-bit

microcontroller with 8Kbytes of Flash programmable and erasable read only memory

(PEROM). This device is compatible with the industry standard 8051 and 8052


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instruction set and pin out. The on-chip Flash allows the program memory to be quickly

reprogrammed using a nonvolatile memory programmer.

By combining an industry standard 8-bit CPU with Flash on a

monolithic chip, the 8952 is a powerful microcomputer which provides a highly flexible

and cost effective solution to many embedded control applications. The 8952 provides

the following features:

~ 8 Kbytes of Flash

~ 256 bytes of RAM

~ 32 I/O lines

~ three 16-bit timer/counters

~ six vector, two-level interrupt architecture

~ full duplex serial port

~ on chip oscillator and clock circuitry


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In addition, the 8952 is designed with static logic for operation down to

zero frequency and supports two software selectable power saving modes. The Idle Mode

stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system

to continue functioning. The Power Down Mode saves the RAM contents but freezes the

oscillator disabling all other chip functions until the next hardware reset.


________________________________________________________________________


Port 0 Port 0 is an 8-bit open drain bi-directional I/O port. As an output port,

each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be

used as high impedance inputs. Port 0 can also be configured to be the multiplexed low

order address/data bus during accesses to external program and data memory. In this

mode, P0 has internal pullups.Port 0 also receives the code bytes during Flash

programming and outputs the code bytes during program verification. External pull-ups

are required during program verification.

Port 1 Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1

output buffers an sink/source four TTL inputs. When 1s are written to Port 1 pins, they

are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins

that are externally being pulled low will source current (IIL) because of the internal

pullups.In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external

count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as

shown in the following table. Port 1 also receives the low-order address bytes during

Flash programming and verification.


output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they


that are externally being pulled low will source current (IIL) because of the internal

pullups.Port 2 emits the high-order address byte during fetches from external program

memory and during accesses to external data memory that use 16-bit addresses (MOVX

@ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s.

During accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2

emits the contents of the P2 Special Function Register. Port 2 also receives the high-order

address bits and some control signals during Flash programming and verification.


output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they


________________________________________________________________________



that are externally being pulled low will source current (IIL) because of the pullups.Port 3

also serves the functions of various special features of the AT89C51, as shown in the

following table.

Port 3 also receives some control signals for Flash programming and

verification.

Interrupts The AT89C52 has a total of six interrupt vectors: two external

interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port

interrupt Each of these interrupt sources can be individually enabled or disabled by

setting or clearing a bit in Special Function Register IE. IE also contains a global disable

bit, EA, which disables all interrupts at once. Figure below shows the bit positions of the

IE special function register.

3.1.8 Printed circuit board layout The connections on the PCB should be identical to the circuit diagram,

but while the circuit diagram is arranged to be readable, the PCB layout is arranged to be

functional, so there is rarely any visible correlation between the circuit and the layout.

PCB layout can be performed manually (using CAD) or in combination

with an auto router. The best results are usually still achieved using at least some manual

routing-simply because the design engineer has a far better judgment of how the

components to be arranged .Surprisingly, many auto routed boards are often completely

illogical in their track routing-the program has optimized connections, and sacrificed any

small amount of order that may have been put in place by manual routing. Generally auto

routed boards are slightly harder for a technician to repair or debug, for this reason,


________________________________________________________________________


historically,PCBs used to be laid out by drawing or using stick on paper shapes on Mylar

film,- that really was manual routing!.

The CAD PCB layout consists of several layers, for illustration

purposes the holes, outline and the component identification layers can be combined into

one diagram. When we produce PCBs for clients, we use an actual size check plot and

placing it in the enclosure; you can see how it will be positioned in relation to other parts.

We can also place components up against the pad markings as a quick double check of

sizing.

When we put a bit of effort in to the PCB designing –it is somewhere

where quality of the design can make a difference. These days most circuit boards are

automatically assembled and tested – but you will still have people working on your

circuit boards, and having a quality design can make all the difference between a product

that is pleasant to work and that you will hate.

We put a complete silk screen identification overlay on most of the

boards, and quality of this is another way we can make a better product. The silk screen

contains important information that assists people to service and install the product.

Aside from functionality the overlay is the chief distinguishing feature between purpose-

built products.

For dense surface mounts, we often need to leave off component

values, and sometimes need to omit the component designators. The silk screen is a

primary method for labeling connectors, replaceable parts, orientation, and even

installation notes. The PCB layouts also need to take account of EMI and ESD

compliance.


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________________________________________________________________________


3.2 Software section 3.2.1 General Description The assembly language programming for the microcontroller was done in

ASM51, an 8051 assembler by Metalink Inc. Simulation of the program was done in the

simulator provided and the hex file was downloaded on to the chip.

Features of the Programmer Kit 1. The Programmer Tool to program INTEL 8051,PHILIPS 8051, ATMEL,

89C51/52/55 Series Flash Microcontroller.

2. The Programmer Tool gets connected to PC on one of the Com Port. It also contains

Power Circuit &5vdc supply output for testing purpose

3. The Programmer Tool runs on WIN - 9x and NT Operating System only.

4. The up loader application helps to download Hex files from PC to target Micro

controller.

Programmer Board Hardware Detail

Power Supply: Built in inside.

Connection with PC : Use only the connector supplied with the card. Please connect the 9

pin D type male connector with card and other end PC may have 9 pins D type male or

25 pins D type male connector. Please select the cable as per PC side connector.

PC Having 9 Pin D Type Male Serial Port Programming Steps 1. You can prepare your program in notepad and save that program in extension with .asm for

example (blink.asm) note: save the program in ASSEMBLER folder only

PC 9 Pin D Type Male

Programmer Card

9 Pin D Type Female 9 Pin D Type 9 Pin D Type Female


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2. To assemble the program click the asm51 .exe to execute, then type program name

3. After assembled, hex file will be created

4. To upload the hex file to the programmer just click the up loader which is supplied in your CD

5. click on send and select the hex file extension then the program file is downloaded

C PROGRAMMING

[If you want to write in C programming follow the steps given in SDCC in Compiler]

NOTE:

1. Please be sure about the connection as shown in above figure.

2. After making all connections please switch on power supply


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3.2.2 Flow chart Main Program

Delay 100 ms

Initialize LCD

Initialize dtmf transceiver

Delay 100 ms

Clear all ports Enable int0 & int1

Display the message” wireless data transceiver”

Display on LCD “F1-compose” “F2-sent message” “F3-read”

A

B

C

C

START

Int0 Interrupt 0(Edge triggered)

Interrupt 1(Edge triggered)

Int1


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LCD Initialization Subroutine

Write function Set (38h)

A

Wait 5ms

Wait 100µs

Is busy Flag =1?

Is busy Flag =1?

X

Set display ON Command

Set font size

Set 8bit 2line right Right entry mode Command

A

A

A

A

NO

YES

YES

NO


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X

Is busy Flag =1?

Set display clear Command

Set cursor move Direction command

Is busy Flag =1?

A

A

Retn

YES

NO

YES

NO


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Initialization Subroutine Of DTMF Transceiver

B

Set EN=1, read=1 RS=1, write=0

Write dtmf mode set port=0DH

Delay ms

Set write = 1

Output 01H to port0

Set EN=1, read=1 RS=1, write=0

Delay ms

Set write = 1

Retn


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Display message on LCD Subroutine(C)

C

Set RS=1, R/W=0

Output ASCII value To port1

Wait a ms

Set R/W = 1

Retn


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Interrupt Routine-int 0(Keyboard)

Int 0

Read keyboard

Is it a valid Scan code?

Is it a Command?

Search the look up table for Corresponding ASCII

Display the letter on LCD Screen

Store the ASCII in the Scratchpad RAM

Retn Interrupt

Retn Interrupt

Is Key=’f1’

Is Key=’f2’

Clear Screen

I1

I2

NO

YES

YES

NO

NO

YES

NO

(COMPOSE)

(SEND

)

(READ)

YES


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Transmit Subroutine

I1

Take the byte

Is it ‘EOS’

Take LSB of byte

Write to dtmf Transceiver

Wait 50 ms

Take MSB of byte

Write to dtmf Transceiver

Wait 50 ms

I3

I3

Ret i

YES

NO


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Receive Data Interrupt Routine (int1)

Read data register of Transceiver

Int 1

Clear status flag bit (Interrupt)

Store the result in temporary Register

Delay 50 ms

Read next nibble

Clear status flag bit

Combine the LSB and MSB

Store first byte

Ret i


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Delay Loop

Delay ms

Load Acc. = 0ffH

Dec Acc.

Is Acc=0

Retn

YES

NO


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3.2.3 Program ;//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// ; Assembly language program for Wireless data transceiver ;//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// ; FILE: WDT.ASM ; Created on 10.04.2004 ;///////////////////////////////////////////// Hardware details ///////////////////////////// //////////////////// ; micro controller Atmel 89C52 ; Peripherals MT 8888C, CDM 16216 2x16 LCD module, ps/2 keyboard ;//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// ;////////////////////////////////////////////// Assembler directives /////////////////////////////////////////////// $MOD52 $DEBUG ;//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// ;///////////////////////////////////////////// variables /////////////////////////////////////////////////////// EN EQU P3.7 RS EQU P3.6 RW EQU P3.5 DAT EQU P1 ;//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// ;//////////// Main program starts here. ORG 0000H ajmp start ;////////// INT 0 ----- keyboard interrupt. ORG 0003H mov ie,#080H mov r0,#009H mov b,#000H mov p3,#0ffh mov p2,#0ffh mov a,#000H jmp x ;///////////// INT1 ------ receive subroutine ORG 0013h mov ie,#080h mov r5,#0h ajmp recive


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;////////// interrupt0 service routine.. X: lcall kbdelay mov a,b rl a mov b,a mov a,#000h mov p2,#0ffh jnb p2.0,skp setb acc.0 jmp k skp:clr acc.0 k: orl a,b mov b,a djnz r0,X lcall clear_lcd mov a,b K: orl a,b mov b,a djnz r0,X lcall clear_lcd mov a,b mov r0,#array mov r0,#(scancode-getscan) mov r1,b mov r2,#0h initloop1: mov a,r0 inc r0 inc r2 cjne r2,#02bh,lost lost:jnc esc movc a,@a+pc getscan:xrl a,r1 jnz initloop1 mov r0,#(ascii-getascii) mov a,r0 add a,r2 subb a,#001h movc a,@a+pc


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getascii: nop lcall write_text escmov r0,#0h lcall delayhs mov ie,#081H reti ;/////////////////////////////////////// lookup table starts here… scancode: db 070h db 098h db 00dh db 089h db 04ch db 0a9h db 058h db 099h db 083h db 087h db 0b9h db 082h db 0a7h db 0a5h db 0b8h db 019h db 042h db 067h db 065h db 051h db 069h db 0b1h db 068h db 078h db 0a8h db 071h db 08ch db 059h db 0b0h db 0d0h db 0f0h db 0c8h db 049h db 0e8h db 0d8h db 0d9h db 079h


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db 0f8h db 0c6h db 0c2h db 047h db 029h db 0e4h db 055h db 0a6h db 027h db 003h ascii: db 061h db 062h db 063h db 064h db 065h db 066h db 067h db 068h db 069h db 069h db 06ah db 06bh db 06ch db 06ch db 06dh db 06eh db 06fh db 070h db 070h db 071h db 072h db 073h db 074h db 075h db 076h db 077h db 078h db 079h db 07ah db 031h db 032h db 033h db 034h


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db 035h db 036h db 036h db 037h db 038h db 039h db 039h db 030h db 020h db 0b0h db 02eh db 02fh db 0a5h db 02ch lcall delayhs mov ie,#081h reti ;////////// Main program continues START: mov sp,#030h mov tcon,#00h mov r3,#0h mov p3,#0ffh lcall init_lcd lcall clear_lcd mov a,#' ' lcall write_text mov a,#' ' lcall write_text mov a,#' ' lcall write_text mov a,#' ' lcall write_text mov a,#'W' lcall write_text mov a,#'I' lcall write_text mov a,#'R' lcall write_text mov a,#'E' lcall write_text mov a,#'L' lcall write_text mov a,#'E'


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lcall write_text mov a,#'S' lcall write_text mov a,#'S' lcall write_text mov a,#' ' lcall write_text mov a,#' ' lcall write_text mov a,#' ' lcall write_text mov a,#' ' lcall write_text lcall linetwo mov a,#' D' lcall write_text mov a,#'A ' lcall write_text mov a,#'T ' lcall write_text mov a,#'A ' lcall write_text mov a,#' ' lcall write_text mov a,#' T' lcall write_text mov a,#' R' lcall write_text mov a,#'A ' lcall write_text mov a,#'N ' lcall write_text mov a,#' S' lcall write_text mov a,#'C ' lcall write_text mov a,#'E ' lcall write_text mov a,#'I ' lcall write_text mov a,#'V ' lcall write_text mov a,#' E' lcall write_text mov a,#' R' lcall write_text


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lcall delayhs lcall delayhs lp: lcall clear_lcd mov a,#'F ' lcall write_text mov a,#'1 ' lcall write_text mov a,#' ' lcall write_text mov a,#'C ' lcall write_text mov a,#'O ' lcall write_text mov a,#'M ' lcall write_text mov a,#'P ' lcall write_text mov a,#'O ' lcall write_text mov a,#'S ' lcall write_text mov a,#'E ' lcall write_text mov a,#' ' lcall write_text mov a,#'F ' lcall write_text mov a,#'2 ' lcall write_text mov a,#' ' lcall write_text mov a,#'S ' lcall write_text mov a,#'E ' lcall write_text mov a,#'N ' lcall write_text mov a,#'D ' lcall write_text mov a,#' ' lcall write_text lcall linetwo mov a,#'F ' lcall write_text mov a,#'3 ' lcall write_text


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mov a,#' ' lcall write_text mov a,#'R ' lcall write_text mov a,#'E ' lcall write_text mov a,#'A ' lcall write_text mov a,#'D ' lcall write_text mov a,#' ' lcall write_text mov a,#'S ' lcall write_text mov a,#'E ' lcall write_text mov ie,#081h lcall delayhs jmp lp end ;//////////// Subroutine to initialise LCD init_lcd: clr rw mov dat,#038h clr rs setb en acall delayms clr en setb rs acall delayms acall delayms acall delayms acall delayms acall delayms mov dat,#038h clr rs setb en acall delayms acall delayms acall delayms clr en setb rs acall delayms mov dat,#038h


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clr rs setb en acall delayms acall delayms acall delayms clr en setb rs acall wait mov dat,#038h clr rs setb en acall delayms clr en setb rs acall wait mov dat,#00eh clr rs setb en acall delayms clr en setb rs acall wait mov dat,#001h clr rs setb en acall delayms clr en setb rs acall wait mov dat,#006h clr rs setb en acall delayms clr en setb rs acall wait ret ;///////////// wait loop wait: clr rs setb rw setb en mov dat,#0ff h mov a,dat jb acc.7,wait


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clr en clr rw ret ;/////////// ms delay delayms: mov r7,#0h loop: inc r7 mov a,r7 nop cjne a,#0ffh,loop ret delayhs: mov r6,#000h mov r5,#002h loopb: inc r6 acall delayms mov a,r6 jnz loopb dec r5 mov a,r5 jnz loopb ret ;//////////// lcd clear command clear_lcd: clr rw clr rs mov dat,#001h setb en acall delayms clr en lcall wait setb rs ret ;/////////// display text command write_text: setb rs mov dat,a setb en acall delayms clr en lcall wait ret ;/////////// next line command linetwo:


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clr rs mov dat,#0bfh setb en acall delayms clr en lcall wait ret ;/////////// delay loop for kbd kbdelay: mov r2,#0h ag: inc r2 mov a,r2 cjne a,#008h,ag ret ;//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// ;//////// Assembled in ASM51 ;///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

wireless

Documents

wireless data transceiver

serial keyboard

receiver mode

keyboard module

microcontroller 89c52

microcontroller stores

lcd unit

transmitter mode