wiz811mj datasheet v1.2

WIZ811MJ Datasheet (Ver. 1.2)

© 2013 WIZnet Co., Ltd. All Rights Reserved.

For more information, visit our website at www.wiznet.co.kr

http://www.wiznet.co.kr/

WIZ811MJ Datasheet

© Copyright 2013 WIZnet Co., Ltd. All rights reserved

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Document History Information

Revision Data Description

Ver. 1.0 March 11, 2008 Release with WIZ811MJ Launching

Ver. 1.1 January 28, 2009 Added temperature specification

Ver. 1.2 January 25, 2013 Hardware revision(Rev1.1) Changed operation temperature range, Partlist and schematic as H/W revision.

WIZnet’s Online Technical Support

If you have something to ask about WIZnet Products, Write down your question

on Q&A Board in WIZnet website (www.wiznet.co.kr). WIZnet Engineer will give an

answer as soon as possible.

http://www.wiznet.co.kr/

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Table of Contents

1. Introduction .............................................................................. 4

1.1. Features ............................................................................. 4

1.2. Block Diagram ...................................................................... 4

1.3. Difference between WIZ810MJ and WIZ811MJ .............................. 5

2. Pin Assignments & descriptions ................................................... 6

2.1. Pin Assignments ................................................................... 6

2.2. Power & Ground ................................................................... 6

2.3. MCU Interfaces ..................................................................... 7

2.4. Miscellaneous Signals ............................................................ 8

3. Timing Diagrams ....................................................................... 9

3.1. Reset Timing ...................................................................... 9

3.2. Register/Memory READ Timing ................................................. 9

3.3. Register/Memory WRITE Timing .............................................. 10

3.4. SPI Timing......................................................................... 10

4. Dimensions ............................................................................. 11

5. Schematic .............................................................................. 12

6. Partlist ................................................................................... 13

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1. Introduction

WIZ811MJ is the network module that includes W5100 (TCP/IP hardwired chip, include PHY), MAG-JACK (RJ45 with X’FMR) with other glue logics. It can be used as a component and no effort is required to interface W5100 and Transformer. The WIZ811MJ is an ideal option for users who want to develop their Internet enabling systems rapidly. For the detailed information on implementation of Hardware TCP/IP, refer to the W5100 Datasheet. WIZ811MJ consists of W5100 and MAG-JACK.

TCP/IP, MAC protocol layer: W5100

Physical layer: Included in W5100

Connector: MAG-JACK(RJ45 with Transformer)

1.1. Features Supports 10/100 Base TX

Supports half/full duplex operation

Supports auto-negotiation and auto cross-over detection

IEEE 802.3/802.3u Compliance

Operates 3.3V with 5V I/O signal tolerance

Supports network status indicator LEDs

Includes Hardware Internet protocols: TCP, IP Ver.4, UDP, ICMP, ARP, PPPoE, IGMP

Includes Hardware Ethernet protocols: DLC, MAC

Supports 4 independent connections simultaneously

Supports MCU bus Interface and SPI Interface

Supports Direct/Indirect mode bus access

Supports Socket API for easy application programming

Interfaces with two 2.54mm pitch 2 x 10 header pin

Temperature :

[PCB rev1.0] : 0 ~ 70℃ (Operation), -40 ~ 85℃ (Storage)

[PCB rev1.1] : -40 ~ 85℃ (Operation), -40 ~ 85℃ (Storage)

1.2. Block Diagram

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1.3. Difference between WIZ810MJ and WIZ811MJ

WIZ810MJ WIZ811MJ

Two 2mm pitch 14x2 header Two 2.54mm pitch 10x2 header

Not has PCB through Hole Two PCB Through Hole(Ø 3.00mm)

52 x 25 x 21mm (W x H x D) 55.5 x 25 x 23.5mm (W x H x D)

Share SPI and BUS signal pin (need to control SPI_EN pin)

Separate SPI signal pin (SPI_EN controlled automatically by /SCS signal)

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2. Pin Assignments & descriptions

2.1. Pin Assignments

I : Input O : Output I/O : Bi-directional Input and output P : Power

2.2. Power & Ground Symbol Type Pin No. Description

VCC P J1:12 , J2:1 Power : 3.3 V power supply

GND P J1:11, J2:9, J2:10, J2:19, J2:20

Ground

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2.3. MCU Interfaces

Symbol Type Pin No. Description

SCLK I J2:3 SCLK(Serial Clock) This pin is used to SPI Clock Signal pin.

/SCS I J2:4 /SCS (Slave Select) * This pin is used to SPI Slave Select signal Pin. This pin controls SPI_EN signal of W5100. When /SCS signal assert low, W5100 drive SPI mode by SPI_EN signal toggled high.

MOSI I J1:1 MOSI (Master Out Slave In) * This pin is used to SPI MOSI signal pin.

MISO I/O J1:2 MISO (Master In Slave Out) * This pin is used to SPI MISO signal pin.

A14~A8 I J1:13 ~ J1:19

Address Used as Address[14-8] pin

A7~A0 I J2:11 ~ J2:18 Address Used as Address[7-0] pin

D7~D0

I/O

J1:3 ~ J1:10

Data 8 bit-wide data bus

/CS I J2:7 Module Select : Active low. /CS of W5100

/RD I J2:6 Read Enable : Active low. /RD of W5100

/WR I J2:5 Write Enable : Active low /WR of W5100

/INT O J2:8 Interrupt : Active low After reception or transmission it indicates that the W5100 requires MCU attention. By writing values to the Interrupt Status Register of W5100 the interrupt will be cleared. All interrupts can be masked by writing values to the IMR of W5100 (Interrupt Mask Register). For more details refer to the W5100 Datasheet

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2.4. Miscellaneous Signals Symbol Type Pin No. Description

/RESET I J2:2

Reset : This pin is active low input to initialize or re-initialize W5100. By asserting this pin low for at least 2us, all internal registers will be re-initialized to their default states.

NC - J1 : 20 Not Connect

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3. Timing Diagrams WIZ811MJ provides following interfaces of W5100. -. Direct/Indirect mode bus access -. SPI access

3.1. Reset Timing

Description Min Max

1 Reset Cycle Time 2 us -

2 /RESET to internal PLOCK - 10 ms

3.2. Register/Memory READ Timing

Description Min Max

1 Read Cycle Time 80 ns -

2 Valid Address to /CS low time 8 ns -

3 /CS low to /RD low time - 1 ns

4 /RD high to /CS high time - 1 ns

5 /RD low to Valid Data Output time - 80 ns

6 /RD high to Data High-Z Output time - 1 ns

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3.3. Register/Memory WRITE Timing

Description Min Max

1 Write Cycle Time 70 ns -

2 Valid Address to /CS low time 7 ns -

3 /CS low to /WR high time 70 ns -

4 /CS low to /WR low time - 1 ns

5 /WR high to /CS high time - 1 ns

6 /WR low to Valid Data time - 14 ns

3.4. SPI Timing

Description Mode Min Max

1 /SS low to SCLK Slave 21 ns -

2 Input setup time Slave 7 ns -

3 Input hold time Slave 28 ns -

4 Output setup time Slave 7 ns 14 ns

5 Output hold time Slave 21 ns -

6 SCLK time Slave 70 ns

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4. Dimensions

A B C

E

F G

H I J

K

L

D

M

Symbols Dimensions (mm)

A 25.00

B 22.46

C 17.00

D 3.00

E 4.00

F 52.00

G 3.20

H 9.00

I 2.54

J 2.54

K 15.90

L 13.50

M 6.00

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5. Schematic

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SN

74A

HC

1G

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NC

1

A2

GN

D3

Vcc

5

Y4

/SC

SS

PI_

EN

3V

3D

R1

14

.7K

3V

3D

C1

70

.1uF

3V

3D

C1

83

.3uF

/16V

C1

91

0u

F/1

6V

C2

01

0u

F/1

6V

FDX_LED

1V

8_O

UT

C2

10

.1uF

C2

20

.1uF

1V

8D

D5D4D3D2

CH

GN

D

D7

1V

8D

XTL

P

D6

R1

1M

C2

15pF

Y1

25M

Hz

(SM

D)

C2

40

.1uF

C2

30

.1uF

C1

15pF

C2

50

.1uF

XTLP

C2

60

.1uF

R6

12K

(1

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R7

300

(1

%)

XTLN

3V

3D

XTL

N

VC

C

RS

ET_

BG

FD

X_

LE

D

LIN

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1V

8D

1V

8D

3V

3A

3V

3D

1V8D

RXIP

1V8D

/RE

SE

T

C1

2

0.1

uF

3V

3D

RXIN

R2

49.9

R3

49.9

C3

0.1

uF

C4

0.1

uF

R8

49.9

R9

49.9

TXO

P

C5 0

.1uF

R5

200

R4

200

SPI_EN

TXO

N

C1

3

0.1

uF

SCLK

C1

4

0.1

uF

1V8A MOSI/SCS

C6

0.1

uF

C1

0

0.1

uF

CH

GN

D

CH

GN

D

/WR

/RD

MISO

/CS

/IN

T

1V

8A

A2

A1

A0

A4

A3

A5

A7

A6

TXO

P

RXIP

A8

RXINTXO

N

U1

W5

10

0

RS

ET_

BG

1

VC

C3

V3

A2

NC

3

GN

DA

4

RXIP

5

RXIN

6

VC

C1

V8

A7

TXO

P8

TXO

N9

GN

DA

10

1V

8_O

UT

11

VC

C3

V3

D12

GN

DD

13

GN

DD

14

VC

C1

V8

D15

VC

C1

V8

D16

GN

DD

17

VC

C3

V3

D18

DA

TA

719

DA

TA

620

DATA521

DATA422

DATA323

DATA224

DATA125

DATA026

MISO27

MOSI28

/SCS29

SCLK30

SEN31

GNDD32

VCC1V8D33

TEST_MODE334

TEST_MODE235

TEST_MODE136

TEST_MODE037

ADDR1438

ADDR1339

ADDR1240

AD

DR

11

41

AD

DR

10

42

GN

DD

43

VC

C3

V3

D44

AD

DR

945

AD

DR

846

AD

DR

747

AD

DR

648

AD

DR

549

AD

DR

450

AD

DR

351

AD

DR

252

AD

DR

153

AD

DR

054

/CS

55

/IN

T56

/WR

57

/RD

58

/RE

SE

T59

NC

60

NC61 NC62 OPMODE063 OPMODE164 OPMODE265 LINKLED66 SPDLED67 GNDD68 VCC1V8D69 FDXLED70 COLLED71 RXLED72 TXLED73 VCC1V8A74 XTLN75 XTLP76 GNDA77 NC78 NC79 NC80

A9

U2

BS

-RB

10

00

5

TD

+1

TD

-2

TC

T3

NC

14

NC

25

NC

36

RD

+7

RD

-8

L1+

12

L2-

11

L3+

10

L4-

9

CH

_G

ND

113

CH

_G

ND

214

3V

3D

1V

8_O

UT

LINK_LED

A10

3V

3A

3V

3D

A13A12

A11

A14

FB

21uH

1V

8A

C1

11

0u

F/1

6V

C7

10u

F/1

6V

C9

0.0

1u

F

FB

11uH

3V

3D

1V

8A

3V

3A

D1D0

J1

HE

AD

ER

10X2

2.5

4 P

itch

1 3 5 7 911

13

15

17

19

2 4 6 8 10

12

14

16

18

20

J2

HE

AD

ER

10X2

2.5

4 P

itch

1 3 5 7 911

13

15

17

19

2 4 6 8 10

12

14

16

18

20

MO

SI

D3

D5

D7

MIS

O

D2

D4

D6

D0

GH

3

CO

N1

1

GH

1

CO

N8

1 2 3 4 5 6 7 8

3V

3D

CH

GN

D

GH

2

CO

N8

1 2 3 4 5 6 7 8

CH

GN

D

/SC

S/R

ES

ET

/IN

T/R

D/C

S/W

RS

CL

K

A0

A1

A2

A4

A6

A3

A5

A7

A8

A9

A10

A11

A12

A13

D1

A14

3V

3D

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6. Partlist

Item Q.ty Reference Part Tech. Characteristics Package

1 2 C1,C2 15pF 50V-20% Ceramic CASE 0603

2 15

C3,C4,C5,C6,C10,C12,C13,C14, C17,C21,C22,C23,C24,C25,C26

0.1uF 50V-20% Ceramic CASE 0603

3 4 C7,C11,C19,C20

10uF/16V 16Vmin 10% EIA/IECQ 3216

4 1 C9 0.01uF 50V-20% Ceramic CASE 0603

5 1 C18 3.3uF/16V 16Vmin 10% EIA/IECQ 3216

6 2 FB1,FB2 1uH Chip Ferrite Inductor CASE 0805

7 2 J1,J2 2X10 20PIN 2.54mm DIP STRAIGHT Header

2 X 10 2.54mm pitch

8 1 R1 1M 1/10W-5% SMD CASE 0603

9 4 R2,R3,R8,R9 49.9 (1%) 1/10W-1% SMD CASE 0603

10 2 R4,R5 200 1/10W-5% SMD CASE 0603

11 1 R6 12K (1%) 1/10W-1% SMD CASE 0603

12 1 R7 300 (1%) 1/10W-1% SMD CASE 0603

13 1 R11 4.7K 1/10W-5% SMD CASE 0603

14 1 U1 W5100 WIZnet Hardware TCP/IP LQFP80

15 1 U2 BS-RB10005 Transformer + RJ45

16 1 U4 74AHC1G04GW Inverting Buffer TSSOP5

17 1 Y1 25MHz (SMD) SMD Type, CL=18pF, Industrial SX-1

18 1 PCB WIZ811MJ REV1.1 1.6T 4LAYER

wiz811mj datasheet v1.2

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