Welsh, V. 22~ Annual Microelectronic Engineering Conference, May 2004

Work Function Engineering With Molybdenum andMolybdenum-Nitride Gate PMOS

Valarie Welsh

Abstract — The motivation for the creation of PIT metal gatePMOS process transistors was to investigate and prove thework function of molybdenum can be changed throughreactive sputtering and thermal processing. The existing PITmetal gate PMOS process was adapted to form Molybdenumand Molybdenum-Nitride PMOS transistors. Processing ofthe molybdenum films affected the final composition of thegate electrode and ultimately its work function. Throughtheoretical and real analysis, the work functions of Mo andMoN gates were extracted and compared with one another aswell as to Al. Examination of the extracted work functionsrevealed the presence of other phenomena accountable forl.5-2.OV shift in Vt from one gate type to another. While nosingle mechanism is identified as the source of extra charge,contamination of the Mo/Si02 interface, oxidation of the Mo,work function difference, or some combination of all three arelikely to explain the shifts in threshold voltages.

Index Terms — Work function, PMOS, Amorphization

I. INTRODUCTIONThe 2003 International Technology Roadmap for

Semiconductors predicts that by 2005-2007, the CMOSindustry will steer toward several paradigm shifts instandard processing to meet the projections of Moore’sLaw. Specifically it is projected that the polysilicon gateelectrode and SiO2 gate dielectric will be replaced withalternate materials. A major goal of replacement gatetechnology is the ability to tine the threshold voltage viathe gate metal work function independently for PMOS andNMOS transistors. With a focus on reducing gateresistance and preventing tunneling and leakage current, amodification of the currently used RIT Metal Gate P-typeMOS process has been created. The modificationconcentrates on the replacement of the Aluminum gate withthe mid-gap work function metal of Molybdenum andMoly-nitride. Research shows Mo and MoN to becompatible with other dielectric films. Because so muchattention is given in research to hi-k dielectrics, it isimportant to recognize that alternative gate materials mustbe well suited for them. The Mo work function of 4.5eVmakes it a promising candidate material for use withSilicon substrates. Because it is a metal, it ensures the

prevention of gate depletion and offers significantreduction in resistance. However, in using metal gatematerials, the work function required for a desiredthreshold voltage is not so easily achieved or changed andeither must be varied with an alloy mixture and/ordimension. By conducting this project, the furtherestablishment of an alternative gate process at the RITSMFL will be achieved. Additional knowledge of thebenefits and drawbacks of alternative gate materials will berealized.

II. MOTIVATIONAs scaling of integrated circuits continues, new

challenges for engineers arise. As channel lengths becomesmaller, the issues with polysilicon as gate electrode tendsto grow. Resistance at the gate becomes an issue, as thischaracteristic does not scale equally with channel length.Also, with existing CMOS technology thresholdadjustment doping at the gates can be hard to control. Ifthe gate material is doped to heavily, excessiveconcentrations of dopant in the gate can punch through thingate oxides (assuming SiO,). If doped too lightly,depletion of dopant from the gate/dielectric interface mayoccur. This gives rise to the poly depletion effect.

fr

‘/tI

Correctly doped poiy I;;r ~————~——

t~I

Figure 1: Polysilicon Depletion Effect

Inadequate concentrations of dopant at this region caninterfere with traditional carrier movement at the gate anddielectric interface when biased into strong inversion. This

Manuscript received May 19, 2004. This work was supported inpart by the Rochester Institute of Technology, Department ofMicroelectronic Engineering. V. Welsh is with the RochesterInstitute of Technology, Rochester, NY 14623 USA (e-mail:vcd6212@rit.edu).

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Welsh, V. 22fld Annual Microelectronic Engineering Conference, May 2004

mechanism is responsible for degradation of drive currentand increases the effective oxide thickness. Scribe, 4pt probe, RCA Clean

~ Masking Oxide Growth 5000A

III. DEVELOPMENTUsing Molybdenum as the gate electrode would resolve

these issues. As a highly conductive metal, Mo offers lowgate resistance. Its thermally resilient melting temperatureof 2610°C and thermal coefficient of expansion of 5E-6/ °C

20°C allow for much greater latitude with thermal budgetand alleviates concerns regarding interfacial lattice stress.These characteristics make Mo attractive for self-alignedgate technology. Molybdenum also has a stable contactwith SiO, up to 1000°C again fitting nicely with existingand aging technology. Most importantly however, is therange of work functions this material is reported to have.

According to Ranade, the reported work function valuesfor Molybdenum range from 4.2 to 4.7 electron volts.When implanted or otherwise combined with othermaterials and processed this range has been seen to vary4.0-5.OeV[l]. Ranade’s work has shown that post sputterannealing alone (400-900C) will raise the Mo workfunction by .7or .8 volts indicating that thermal processinghas an effect on Molybdenum films. According to hiswork, “annealing in argon ambient produced results similarto annealing in forming gas ambient even after taking theeffects of oxide fixed charge into account,”. This workfunction has been altered by almost a volt beforeimplanting or reactively sputtering it with anything else. Itis generally accepted that the work function formolybdenum in device applications is dependent upon theconditions of its deposition and subsequent processing.Sputtering is the most widely used method for deposition.It is surmised that only plasma is feasibly capable ofdepositing refractory metal films. While literature isscarce, it is believed that the work function of Mo isinitially determined at the initial deposition [2]. Themorphology of the film at the dielectric interface istheorized to determine the work function of the film in thisarea. Naturally then the initial state of the film morphologywill ultimately influence the final arrangement of the filmand the measured work function.

A high percentage of the research available addressesthe implantation of nitrogen and argon into sputteredmolybdenum films. The formation of Moly-nitride throughimplantation is theorized to amorphize the Mo filmstructure. The breakage of surface bonds is detected by anegative shift in the flatband voltage. The correspondingwork function is therefore lowered.

ProcessAdapted from RIT’s metal gate PMOS process, onelithography mask was substituted and one added toincorporate Aluminum contacts and Molybdenum andMolybdenum-nitride gate electrodes.The metal gate PMOS process:

Figure 2: Representative Cross-section through pattern oxide growth

~ Level 1 Lithography opens S/D regions~ Pattern Oxide through BOE

~ ~ I~~I

Figure 3: Representative Cross-sectioii through S/P opening

O RCA Clean, Spin on Boron Dopant0 Furnace Pre-deposition

o drives dopant into surfaceo consumes Si in S/D region

I

Figure 4: Representative Cross-section through SOG application

0 BOE all material from surface

I

Figure 5: Representative Cross-section through SIP predeposition

O Grow Field Oxide 5000A while drivingin S/D

.1 IFigure 6: Representative Cross-section through Field Oxide growthand S/I) drive-in

0 Level 2 Lithography opens active devicearea

0 Pattern Oxide through BOE

Figure 7: Representative Cross-section through active area definition

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Welsh, V. 22~ Annual Microelectronic Engineering Conference, May 2004

F~~—~JRFigure 8: Representative Cross-section through gate oxide growth

Level 3 Lithography defines gate area~ Pattern gate through BOE

I ~ I

I~zA~1~Io Level 4 Lithography defines only S/D

contact regionsO Pattern SID contacts with Aluminum wet

etch

‘~~I

O Split LotO Sputter deposit isooA Molybdenum or

r~a~nFigure 12: Representative Cross-section through Gate materialdeposition

0 Level 5 Lithography to define the gateand contacts

0 Pattern with Al wet etch

I ~

IV. FABRICATIONThe current PMOS process uses Al for the gate and

source drain contact. Recently Boise State University inconjunction with RIT has conducted research usingalternative gate materials and had ordered a lithographymask for this process that patterned the gate separately.The process uses a spin on glass for the source and drainformation followed by a drive in and field oxide growthprocess that gives a junction depth of about l.Sum.Aluminum was used for the source and drain to ensure andohmic contacts in these regions. The aluminum patternwas followed by a lot split where some wafers received Mosputter deposition and others were reactively sputtered withMoN.

A separate designed experiment with reactive sputteringwas conducted to determine what ratio of nitrogen wasappropriate in the creation of a Moly-nitride film. Asnitrides are classically insulators, the DOE was used toestablish what percentage of nitrogen in the sputter wouldgive provide the lowest resistivity.

Figure 14: Sheet Resistance Measurements for MoN formation

At the lower limit of the nitrogen flow, resistivity in theMoly-nitride film dropped from independently sputteredMolybdenum. As the incorporation of nitrogen in the filmincreased, tensile stress in the film was more and moreevident and resistivity appeared to increase linearly. Whilethe experiment was not repeated, the substrates used wereof various oxide thicknesses in attempts to normalize theresults. The theory is that plasma induced damage wouldhave the same amorphizing effect on the sputtered film asthe nitrogen implantation of previous research. A 3%ambient content of Nitrogen was concluded to give thelowest resistance.

Once the gate electrode material was deposited theoriginal RIT metal gate PMOS gate and contact mask wasused. This resulted in the formation of a double contact tothe source and drain, the wafers were then etched with thesame phosphorous wet Al etch chemistry and sintered informing gas at low temp.

V. RESULTSFollowing the sinter process, the appearance of the devicesshowed corrosion and contamination of the gate material.

O RCA Clean0 Grow 700A Dry Gate Oxide

Figure 9: Representative Cross-section through gate oxide definition

0 RCA Clean0 Evaporate Aluminum 1 SOOA

Figure 10: Representative Cross-section through Al Deposition

Sheet Resistance vs. %N

0 5 10 15 20

%N

Figure 11: Representative Cross-section through SID contactdefinition

MoN

Figure 13: Representative Cross-section through Gate electrodeformation

0 Sinter, Test

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Welsh, V. 22’~ Annual Microelectronic Engineering Conference, May 2004

Microscopic inspection revealed the gate material wasbrown “spongy” in appearance and easily removed.

In fact, the films were so weakened between thelithography and sinter process that the gate could easily bescratched off. Initial supposition was that the Molybdenumand MoN films had oxidized and were no longerconductive. The ease with which the gate came off led tospeculation of adhesion issues, supported by the earlierstress observations. In light of the present situation, theMoN wafers were prepared for re-work from metalization.The Molybdenum gate wafer was brought to the test lab todetermine whether the remaining film was conductive atall.

Initial device tests conducted on the wafer of figure 15proved not only a conductive gate film, but also thepresence of working transistors.

Molybdenum Gate Family of Curves-0.00030-0.00025-0.00020-0.00015

~ -0.00010-0.00005 — —~ —,—<~ ~

0.00000 -~ ~‘ ~, ~, ~, ., ~, ~, ~, ~—

0.000050.0 -2.0 -4.0 v~V) -8.0 -10.0 -12.0

Figure 16: “Molybdenum” Gate Family of Curves

Indeed, further research proved Molybdenum is “highlyprone to oxidation at elevated temperatures “[1].

In fact, “Mo02 is known to be conductive and hence aslong as the Mo02 is formed without chemical reaction atthe interface, oxidation is unlikely to alter the oxidecapacitance.” --Ranade[l].

Without an without timely access to (EDS) analysis onecannot definitively say whether Mo or MoO2 is present onthe gate.

Further analysis a threshold voltage shift from Al to Mogate transistors on the same chip. With “documented”work functions of Al4.1 & Mo4.5 The calculateddifference between the metals should be approximately.4volts. It stands to reason identically manufacturedtransistors would be expected to exhibit just this shift.Even with a widely ranging work function for the Mo,there remains a 1.5- 2 volt shift in positive direction for Vt.This amount of charge must then be accounted for with Nss& substrate doping. Understanding that almost allincidental are positive in nature, and that those encounteredwould push the threshold voltage to be more negative therearises the question of where negative charge could havebeen picked up and trapped after the aluminum deposition.

Notice again the process flow used. With this sequence,the gate oxide cannot be cleaned once the aluminum isapplied. Using the aluminum etch followed by an IPA/IPOresist removal process offered the first and best possibilityfor source contamination. The threshold voltage andflatband equations are typically used to extract the quantityof excess charges in a device when the gate work functionis already known. Using the documented value for the Alwork function, the excess trap charge density wascalculated to be 1 .26E 19/cm. Using this estimation for theadjacent Molybdenum gate device the work function of thegate electrode was calculated to be 5.99eV.

MoN Re-process DescriptionRecognizing that only two processes were performed withMolybdenum (pattern and sinter) the remaining waferswere re-processed to determine whether the wet Al etch orthe sintering would give rise to this same Vt shift. Bothwafers were cleaned, and l500A of Al evaporated,patterned and etched with the same Phosphorous Al etchbath. Again the IPA/IPO solvent resist removal wasperformed. Then one of the remaining two wafers wassintered at 400°C 30mm and both reactively sputtered with1700A of Molybdenum-nitride (3%). The MoN gates werethen patterned and the sintered wafer etched again with theAl wet etch. The other wafer was plasma etched with SF6for 3mm, solvent removal performed again followed by itsown sinter.

The wafer that received no MoN thermal processproduced a comparable family of curves to the original Mogate devices, but looked very different.

Figure 15: “Molybdenum” Gate electrode post sinter

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Welsh, V. 22’~ Annual Microelectronic Engineering Conference, May 2004

Molybdenum Nitride (3%) Family of CurvesAl Sinter Only

-8.00E-05

~ -6.OOE-05~

~

-4.00E-05

-2.00E-05

0.00 E+00

0.0 -5.0 -10.0 -15.0Vd (V)

Figure 18: “Molybdenum-nitride” Gate Family of Curves

Indeed, the threshold voltage was lower than that of theMo gate device as predicted. The wafer that received theplasma MoN etch followed by a sinter in forming gasappeared as expected upon emergence from the furnace.Unexpectedly though, none of the devices tested have yetyielded.

VI. CONCLUSIONSRegarding the comparison of Mo to MoN gate transistors,the extracted work functions for each were found to be —0.7and —2.0 volts respectively. While the work function ofthe gate materials has shifted 1.3 volts, the Al to Mo gatecomparison and the appearance of the Mo post sintercannot be ignored. The threshold voltage difference ismore likely the result of a combination of work functiondifference, contamination from negative charges in the wetmetal etchant, and the nature of the oxidized film at thegate. The last of these hypothesis is supported by the beliefthat oxidized Molybdenum would raise the work functionof the gate electrode.

The first, best solution to guarantee a Mo to MoN gateelectrode comparison would be the manufacture of the gatefirst as is ideal in self-aligned gate processes. Further workshould also be done to ensure that the Mo is not oxidizedduring subsequent processing.

REFERENCES[1] P Ranade et at., “Molybdenum as a Gate Electrode for

Deep Sub-micron CMOS Technology,” MaterialsResearch Society, Mat. Res. Soc. Symp. Vol.611,C3.2.l-6, (2000).

[2] T.-J. King et at., “Novel Materials and Processes forMOS Devices,” Department of Electrical Engineeringand Computer Sciences, Department of MaterialsScience and Engineering University of California,Berkeley, California, Final Report 1998-99 forMICRO Project 98-071.

[3] R.W. Murto, et at. “Challenges in gate stackengineering,” SST October (2003).

[4] A. Kawamoto, et at., “Challenges for Atomic ScaleModeling in Alternative Gate Stack Engineering,”IEEE Transactions on Electron Devices, Vol. 47, No.10, October (2000).

[5] T. Amada, et at., “Degradation in a Molybdenum-GateMOS Structure Caused by i~t Ion Implantaion forWork Function Control,” Materials Research Society,Mat. Res. Soc. Symp. Vol.7 16, ,(2002).

[6] F. Mendoza, et at., “Dry Etch Technology for LargeArea Flat Panels,” Semiconductor International, June1999.

[7] S.Kurinec, “Gate Depletion Effect,” Rochester Instituteof Teclmology, Microelectronic EngineeringAdvanced CMOS Lecture 12, (2004)

ACKNOWLEDGMENTSThe author acknowledges Dr. L. Fuller for advisement on

this project. Dr. K. Hirshmann, Dr. S. Kurinec, andDr. J. Moon for research guidance. M. Aquilino, R.Vega, and J. Steinfelt for questions, and T. Prevost, B.Curanovic, and J. Cabacungan for support. Also theSMFL staff for direction and tool solutions.

~J;~ ~ ;•~ ~ LFigure 17: “Molybdenum-nitride” Gate Transistors

I Valarie Welsh Graduated from the RochesterInstitute of Technology with a B.S. inMicroelectronic Engineering. She has worked for

L National Semiconductor in South Portland, Maine inUnit Process Development and Eastman Kodak Coin Rochester, New York in their Integrated Systems

Solutions division. She plans to eventually move with her husbandto Texas.

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