zero skew clock tree implementation ─ the delay model

11
Zero Skew Clock Tree Implementation ─ The Delay Model

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Zero Skew Clock Tree Implementation ─ The Delay Model. Outline. The Delay Model Linear Delay Model Elmore Delay Model The Delay Model under DME algorithm. Linear Delay Model. Delay is proportion to wirelength T LD (u, w)= ∑ |e v |. u. e v. e v ∈ path(u, w). …. e v. w. - PowerPoint PPT Presentation

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Page 1: Zero Skew Clock Tree Implementation ─  The Delay Model

Zero Skew Clock Tree Implementation ─ The Delay Model

Page 2: Zero Skew Clock Tree Implementation ─  The Delay Model

Outline• The Delay Model

– Linear Delay Model– Elmore Delay Model

• The Delay Model under DME algorithm

Page 3: Zero Skew Clock Tree Implementation ─  The Delay Model

Linear Delay Model• Delay is proportion to wirelength

• TLD(u, w)= ∑ |ev|ev

w

ev path(u, w)∈…

u

ev

Page 4: Zero Skew Clock Tree Implementation ─  The Delay Model

Elmore Delay Model• Delay=resistance * downstream capacitance• r’ = resistance per unit length

c’= capacitance per unit length• For edge ev

– rev = r’ × |ev| – cev = c’ × |ev|

• Ted(u,w)= ∑ rev(1/2cev+Cv)

– Delay grows as square of wire length

ev

Cv

u

cev

ev path(u, w)∈

v

Page 5: Zero Skew Clock Tree Implementation ─  The Delay Model

Elmore Delay Model• Lumped circuit approximations for distributed RC lin

es– π–model(most popular)– T–model– L–model.

Page 6: Zero Skew Clock Tree Implementation ─  The Delay Model

Elmore Delay Model

Page 7: Zero Skew Clock Tree Implementation ─  The Delay Model

DME algorithm• Phase 1 :Procedure Build_Tree_of_Segments

Input Topology G.

Output Tree of merging segments TS containing ms( v ) for each node v in G, and edge length |ev| for each v≠s0.

For each node v in G ( button-up order )

If v is a sink node Then ms(v) = { pl( v ) } Else Let a and b be the children of v

Calculate_Edge_Length( |ea|, |eb| ) Create TRRs trra and trrb as follows:

core( trra ) = ms( a ) radius( trra ) = |ea| core( trrb ) = ms(b) radius( trrb ) = |eb| ms(v) = trra ∩ trrb

Calculate_Edge_Length( |ea|, |eb| )

ea

eb

msa.delay+ea= msb.delay+eb

A

B

Page 8: Zero Skew Clock Tree Implementation ─  The Delay Model

DME algorithm• Phase 2 :Procedure Find_Exact_Placements

Input Output of Phase 1

Output Zero skew tree ( ZST ) T(S)

For each node v in G ( button-up order )

If v is the root Then Choose any pl(v) ∈ ms(v) Else Let p be the parent node of v Construct trrp as follows:

core( trrp ) = { pl( p ) } radius( trrp ) = |ev| Choose any pl(v) ∈ms(v) ∩ trrp

Page 9: Zero Skew Clock Tree Implementation ─  The Delay Model

DME : Linear Delay Model• Calculate_Edge_Length( |ea|, |eb| )

Linear delay model : let k=d( msa , msb ) // shortest distance between two segments If | msa.delay - msb.delay | k≦

msa.delay + |ea| = msb.delay + |eb||ea| + |eb| = k ( |eb| = k - |eb| )|ea| = ½ × ( k + msb.delay - msa.delay )

Else If msa.delay > msb.delay |ea| = 0 |eb| = msa.delay - msb.delayElse |ea| = msb.delay - msa.delay |eb| = 0

msa.delay msb.delay

ea eb

ea + eb = k

msa.delay+ea= msb.delay+eb

Page 10: Zero Skew Clock Tree Implementation ─  The Delay Model

DME : Elmore Delay Model• Calculate_Edge_Length( |ea|, |eb| )

Elmore delay model :let r’ = resistance per unit length c’= capacitance per unit length rea = r’ × |ea| reb = r’ × |eb| cea = c’ × |ea|

ceb = c’ × |eb| k = d( msa , msb ) // shortest distance between two segments

rea(1/2 cea+C1) + msa.delay= reb(1/2 ceb+C2) + msb.delay => |ea| = ( msb.delay- msa.delay+r’k(C2+1/2c’k) ) / ( r’(C1+C2+c’k) )

If |ea| < 0, means msa.delay > msb.delaymsa.delay = r’ k’ (1/2c’ k’ +C2)+ msb.delay=> k’ = (((r’C2)2+2r’c’(msa.delay- msb.delay))1/2-r’C2)/r’c’ |ea| = 0|eb| = k’ If |ea| > kk’ = (((r’C1)2+2r’c’(msb.delay- msa.delay))1/2-r’C1)/r’c’ |ea| = k’|eb| = 0

msa.delay msb.delay

ea eb

C1 C2

rea(1/2 cea+C1) + msa.delay= reb(1/2 ceb+C2) + msb.delay

ea + eb = k

Page 11: Zero Skew Clock Tree Implementation ─  The Delay Model

Thank You