1 combinational circuits. 2 overview signal naming decoders encoders – binary, priority...
TRANSCRIPT
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Combinational Circuits
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Overview
• Signal Naming
• Decoders
• Encoders
– Binary, priority
• Multiplexers
• Three-state buffers
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Active States and Bubbles
• Primarily applies to control signals; used to denote when a condition is active or enabled
• Active State - signal state (0 or 1) that indicates the assertion of some condition or action
– A signal is asserted when it is in the active state
– A signal is negated when it is in the inactive state
– Active-1 (active high) is when active state is logic 1
– Active-0 (active low) is when active state is logic 0
• Symbol pins without bubbles denote active-1 signals
• Symbol pins with bubbles denote active-0 signals
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Signal Naming Conventions
• The problem is how to distinguish between active-1 and active-0 signals.
– Use suffix of ‘_0’; (i.e A_0) after signal name
– Use suffix of ‘_LO’ or ‘_L’
– Use suffix of ‘_BAR’
• No matter what you use, BE CONSISTENT!
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Signal Naming
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Active Levels For Pins
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Be Careful!
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What is a decoder?
• Decoder: A combinational circuit with an n-bit code word applied toits inputs and m-bit (m=2^n) code word appearing at the outputs.
– Detect which of the 2^n input code words is represented at the inputs
– Produce m outputs, only one of which is asserted
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1-to-2 (Line) Decoder
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2-to-4 Decoder
• A 2-to-4 decoder operates according to the following truth table
– The 2-bit input is called S1-S0, and the four outputs are Q0-Q3
• If the input is the binary number i, then output Qi is uniquely true
– For instance, if the input S1 S0 = 10 (decimal 2), then output Q2 is true,
and Q0, Q1, Q3 are all false
• This circuit “decodes” a binary number into a “one-of-four” code
S1 S0 Q0 Q1 Q2 Q3
0 0 1 0 0 00 1 0 1 0 01 0 0 0 1 01 1 0 0 0 1
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How can you build a 2-to-4 decoder?
• Follow the design procedures from last time! We have a truth table, so we can write equations for each of the four outputs (Q0-Q3)
• In this case there’s not much to be simplified. Here are the equations:
S1 S0 Q0 Q1 Q2 Q3
0 0 1 0 0 00 1 0 1 0 01 0 0 0 1 01 1 0 0 0 1
Q0 = S1’ S0’Q1 = S1’ S0Q2 = S1 S0’Q3 = S1 S0
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2-to-4 Decoder
S1 S0 Q0 Q1 Q2 Q3
0 0 1 0 0 00 1 0 1 0 01 0 0 0 1 01 1 0 0 0 1
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Enable Inputs
• Many devices have an additional enable input, which is used to “activate” or “deactivate” the device
• For a decoder,
– EN=1 activates the decoder, so it behaves as specified earlier. Exactlyone of the outputs will be 1
– EN=0 “deactivates” the decoder. By convention, that means all of the decoder’s outputs are 0
• We can include this additional input in the decoder’s truth table:
EN S1 S0 Q0 Q1 Q2 Q3
0 0 0 0 0 0 00 0 1 0 0 0 00 1 0 0 0 0 00 1 1 0 0 0 0
1 0 0 1 0 0 01 0 1 0 1 0 01 1 0 0 0 1 01 1 1 0 0 0 1
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An aside: abbreviated truth tables
• In this table, note that wheneverEN=0, the outputs are always 0,
regardless of inputs S1 and S0.
• We can abbreviate the table bywriting x’s in the input columns
for S1 and S0
EN S1 S0 Q0 Q1 Q2 Q3
0 0 0 0 0 0 00 0 1 0 0 0 00 1 0 0 0 0 00 1 1 0 0 0 0
1 0 0 1 0 0 01 0 1 0 1 0 01 1 0 0 0 1 01 1 1 0 0 0 1
EN S1 S0 Q0 Q1 Q2 Q3
0 x x 0 0 0 0
1 0 0 1 0 0 01 0 1 0 1 0 01 1 0 0 0 1 01 1 1 0 0 0 1
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2-to-4 Decoder with Enable
Y0 = (S1’ S0’) ENY1 = (S1’ S0) ENY2 = (S1 S0’) ENY3 = (S1 S0) EN
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A variation of the standard decoder
• The decoders we’ve seen so far are active-high decoders.
• An active-low decoder is the same thing, but with an inverted EN input and inverted outputs
EN S1 S0 Q0 Q1 Q2 Q3
0 x x 0 0 0 0
1 0 0 1 0 0 01 0 1 0 1 0 01 1 0 0 0 1 01 1 1 0 0 0 1
G A B Y0 Y1 Y2 Y3
1 x x 1 1 1 1
0 0 0 0 1 1 10 0 1 1 0 1 10 1 0 1 1 0 10 1 1 1 1 1 0
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2-to-4 Active-Low Decoder
G A B Y0 Y1 Y2 Y3
1 x x 1 1 1 1
0 0 0 0 1 1 10 0 1 1 0 1 10 1 0 1 1 0 10 1 1 1 1 1 0
Y0 = (S1 + S0) + GY1 = (S1 + S0’) + GY2 = (S1’ + S0) + GY3 = (S1’ + S0’) + G
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Complete 74x139 Decoder
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3-to-8 decoder
• Larger decoders are similar. Here is a 3-to-8 decoder
– A truth table (without EN) is below
– Output equations are at the bottom right
• Again, only one output is true for any input combinationS2 S1 S0 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
0 0 0 1 0 0 0 0 0 0 00 0 1 0 1 0 0 0 0 0 00 1 0 0 0 1 0 0 0 0 00 1 1 0 0 0 1 0 0 0 01 0 0 0 0 0 0 1 0 0 01 0 1 0 0 0 0 0 1 0 01 1 0 0 0 0 0 0 0 1 01 1 1 0 0 0 0 0 0 0 1
Q0 = S2’ S1’ S0’Q1 = S2’ S1’ S0Q2 = S2’ S1 S0’Q3 = S2’ S1 S0Q4 = S2 S1’ S0’Q5 = S2 S1’ S0Q6 = S2 S1 S0’Q7 = S2 S1 S0
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74x138 3-to-8 Active-Low Decoder
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Cascading - 3-to-8 Active-High Decoder
• You can use enable inputs to string decoders together. Here’s a 3-to-8decoder constructed from two 2-to-4 decoders:
S2 S1 S0 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
0 0 0 1 0 0 0 0 0 0 00 0 1 0 1 0 0 0 0 0 00 1 0 0 0 1 0 0 0 0 00 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 01 0 1 0 0 0 0 0 1 0 01 1 0 0 0 0 0 0 0 1 01 1 1 0 0 0 0 0 0 0 1
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Cascading - 4-to-16 Active-Low Decoder
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So what good is a decoder?
• Do the truth table and equations look familiar?
• Decoders are sometimes called minterm generators
– For each of the input combinations, exactly one output is true– Each output equation contains all of the input variables– These properties hold for all sizes of decoders
• Arbitrary functions can be implemented with decoders. If a sum ofminterms equation for a function is given, a decoder (a minterm generator)is used to implement that function
S1 S0 Q0 Q1 Q2 Q3
0 0 1 0 0 00 1 0 1 0 01 0 0 0 1 01 1 0 0 0 1
Q0 = S1’ S0’Q1 = S1’ S0Q2 = S1 S0’Q3 = S1 S0
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Design example: Addition
• Let’s make a circuit that adds three 1-bit inputs X, Y and Z
• We will need two bits to represent the total; let’s call them C and S, for “carry” and “sum.” Note that C and S are two separate functions of the same inputs X, Y and Z
• Here are a truth table and sum-of-minterms equations for C and SX Y Z C S
0 0 0 0 00 0 1 0 10 1 0 0 10 1 1 1 01 0 0 0 11 0 1 1 01 1 0 1 01 1 1 1 1 1 + 1 + 1 = 11
0 + 1 + 1 = 10 C(X,Y,Z) = m(3,5,6,7)
S(X,Y,Z) = m(1,2,4,7)
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• 3-to-8 decoders implement C(X,Y,Z) = m(3,5,6,7) and S(X,Y,Z) = m(1,2,4,7)
Decoder-based Adder
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Active-Low Decoders
• The output equations for an active-low decoder are mysteriously similar, yet somehow different
• It turns out that active-low decoders generate maxterms
• So we can use active-low decoders to implement arbitrary functions too, but as a product of maxterms, i.e., f(x,y,z) = M(4,5,7)
Q3’ = (S1 S0)’ = S1’ + S0’Q2’ = (S1 S0’)’ = S1’ + S0Q1’ = (S1’ S0)’ = S1 + S0’Q0’ = (S1’ S0’)’ = S1 + S0
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Summary of Decoders
• A n-to-2n decoder generates the minterms of an n-variable function
– As such, decoders can be used to implement arbitrary functions
– Later on we’ll see other uses for decoders too
• Some variations of the basic decoder include:
– Adding an enable input
– Using active-low inputs and outputs to generate maxterms
• We also talked about:
– Applying our circuit analysis and design techniques to understand and work with decoders
– Using block symbols to encapsulate common circuits like decoders
– Building larger decoders from smaller ones
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Binary Encoders
• An encoder is a digital function that performs the inverse operationof a decoder
Only one input can have the value of 1 at any given time
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Octal-to-Binary Encoder
• This encoder has eight inputs, one for each of the octal digits.
• Three outputs that generate the corresponding binary number.
Encoder
D7D6D5D4D3D2D1D0
A2
A1
A0
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Octal-to-Binary Encoder
A0= D1 + D3 + D5 + D7, A2= D4 + D5 + D6 + D7A1= D2 + D3 + D6 + D7
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Priority Encoder
• A priority encoder is a combinational circuit that implements a priorityfunction
More than one inputlines are asserted
Code of highest priority line asserted
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4-Input Priority Encoder
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4-Input Priority Encoder
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4-Input Priority Encoder
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74x148 8-input priority encoder
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Cascaded Priority Encoders
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Multiplexers
• Multiplexers, or muxes, are used to choose between resources
• A real-life example: in the old days before networking, several computerscould share one printer through the use of a switch.
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Multiplexers
• A n-to-1 multiplexer sends one of n input lines to a single output line
– A multiplexer has two sets of inputs:
• n data input lines
• s=log2n select lines, to pick one of the n data inputs
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2-to-1 Mux
• The select bit S controls which of the data bits D0-D1 is chosen:
– If S=0, then D0 is the output (Q=D0).
– If S=1, then D1 is the output (Q=D1).
• Here is another kind of abbreviated truth table
– Input variables appear in the output column
– This table implies that when S=0, the output Q=D0, and when S=1 the output Q=D1
– This is a pretty close match to the equation
S D1 D0 Q
0 0 0 00 0 1 10 1 0 00 1 1 1
1 0 0 01 0 1 01 1 0 11 1 1 1
Q = S’ D0 + S D1
S Q
0 D01 D1
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2-to-1 Mux
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74x157 Quad 2-to-1 Mux
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4-to-1 Mux
Y= (S1’S0’) I0 + (S1’S0) I1 + (S1S0’) I2 + (S1S0) I3
Decoder
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4-to-1 Mux
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Quad 4-to-1 Mux
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74x151 8-to-1 Multiplexer
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74x151 8-to-1 Multiplexer
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Expanding Multiplexers
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Implementing functions with multiplexers
• Muxes can be used to implement arbitrary functions
• One way to implement a function of n variables is to use an 2^n-to-1 mux:
– For each minterm mi of the function, connect 1 to mux data input Di.
Each data input corresponds to one row of the truth table
– Connect the function’s input variables to the mux select inputs. These
are used to indicate a particular input combination
• For example, let’s look at f(x,y,z) = m(1,2,6,7).
x y z f
0 0 0 00 0 1 10 1 0 10 1 1 01 0 0 01 0 1 01 1 0 11 1 1 1
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A more efficient way
• We can actually implement f(x,y,z) = m(1,2,6,7) with just a 4-to-1 mux, instead of an 8-to-1
• Step 1: Find the truth table for the function, and
group the rows into pairs. Within each pair of rows,
x and y are the same, so f is a function of z only.
– When xy=00, f=z
– When xy=01, f=z’
– When xy=10, f=0
– When xy=11, f=1
• Step 2: Connect the first two input variables of the truth table (here, x and y) to the select bits S1 S0 of the 4-to-1 mux.
• Step 3: Connect the equations above for f(z) to thedata inputs D0-D3.
x y z f
0 0 0 00 0 1 1
0 1 0 10 1 1 0
1 0 0 01 0 1 0
1 1 0 11 1 1 1
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Example: multiplexer-based adder
• Let’s implement the adder carry function, C(X,Y,Z), with muxes
• There are three inputs, so we’ll need a 4-to-1 mux
• The basic setup is to connect two of the input variables (usually the firsttwo in the truth table) to the mux select inputs
X Y Z C
0 0 0 00 0 1 00 1 0 00 1 1 11 0 0 01 0 1 11 1 0 11 1 1 1 With S1=X and S0=Y, then
Q=X’Y’D0 + X’YD1 + XY’D2 + XYD3
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Multiplexer-based carry
• We can set the multiplexer data inputs D0-D3, by fixing X and Y and finding equations for C in terms of just Z.
C = X’ Y’ D0 + X’ Y D1 + X Y’ D2 + X Y D3= X’ Y’ 0 + X’ Y Z + X Y’ Z + X Y 1= X’ Y Z + X Y’ Z + XY= m(3,5,6,7)
X Y Z C
0 0 0 00 0 1 0
0 1 0 00 1 1 1
1 0 0 01 0 1 1
1 1 0 11 1 1 1
When XY=00, C=0
When XY=01, C=Z
When XY=10, C=Z
When XY=11, C=1
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Multiplexer-based sum
• Here’s the same thing, but for the sum function S(X,Y,Z)
X Y Z S
0 0 0 00 0 1 1
0 1 0 10 1 1 0
1 0 0 11 0 1 0
1 1 0 01 1 1 1
S = X’ Y’ D0 + X’ Y D1 + X Y’ D2 + X Y D3= X’ Y’ Z + X’ Y Z’+ X Y’ Z’ + X Y Z= m(1,2,4,7)
When XY=00, S=Z
When XY=01, S=Z’
When XY=10, S=Z’
When XY=11, S=Z
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Summary of Muxes
• A n-to-1 multiplexer routes one of n input lines to a single output line
• Just like decoders,
– Muxes are common enough to be supplied as stand-alone devices for use in modular designs.
– Muxes can implement arbitrary functions
• We saw some variations of the standard multiplexer:
– Smaller muxes can be combined to produce larger ones
– We can add active-low or active-high enable inputs
• As always, we use truth tables and Boolean algebra to analyze things
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Three-state Buffers
• Output = LOW, HIGH, or Hi-Z
• Wire can be considered disconnected
• Can tie multiple outputs together if at most one at a time is enabled
• Different flavors:
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Selecting based on 3-state buffers
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Sharing a Wire
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Three-State Drivers – 74x541
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Driver Application
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Three-State Transcievers
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Transciever Application