Institute ofMicroelectronicSystems

1. Introduction

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Institute ofMicroelectronicSystems1: Introduction

0.02 0.05 0.1 0.5 1

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0.2

0.5

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2

5

10

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2

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20

50

tOX

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MOSFET channel length (µm)

CMOS feature size 0.1 µm

0.9-1.2 V

Chip size 750 mm 2

Transistors/cm 2 100 M

17.2 G

Future VLSI chip 20112005

Core voltage (V)

0.05 µm

0.5-0.6 V

520 mm 2

40 M

275 GDRAM bits /chip

Number of wiring levels 7 - 8 9

(Source: International Technology Roadmap for Semiconductors 1998 update)

Status of Microelectronics Technology

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Institute ofMicroelectronicSystems1: Introduction

ASIC Outlook 1997: Semiconductor and Electronic Equipment Sales Trends (1992 - 2001)

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Institute ofMicroelectronicSystems1: Introduction

Technology Requirements:Inductive effects will become increasingly importantAdditional metal patterns or ground planes for inductive shieldingThinner metallizationLower line-to-line capacitanceIncreasing pitch and thickness at each conductor level to alleviate the impact of interconnect delay

Passivation

Dielectric

Etch stop layer

Dielectric diffusionbarrier

Copper conductorwith metalbarrier liner

Pre-metaldielectric

Tungstencontact plug

Global

Local

Intermediate

Source: SIA Roadmap 1999

Interconnect

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Institute ofMicroelectronicSystems1: Introduction

Productivity Gap: Technology vs. CAD

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Institute ofMicroelectronicSystems1: Introduction

Need to increase Designers Productivity in order to make use of new TechnologiesSIA Roadmap for the Design Technology Requirements (near term)

Productivity Gap: Technology vs. CAD

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Institute ofMicroelectronicSystems1: Introduction

SIA Roadmap for the Design Technology Requirements (far term)

Productivity Gap: Beyond 2008

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Institute ofMicroelectronicSystems1: Introduction

EDA: High-Level Design

architecture structural of first_tap is

signal x_q,red : std_logic_vector(bitwidth-1 downto 0);signal mult : std_logic_vector(2*bitwidth-1 downto 0);

begin

delay_register: process(reset,clk) begin if reset='1' then x_q <= (others => '0'); elsif (clk'event and clk='1') then x_q <= x_in; end if; end process;

mult <= signed(coef)*signed(x_q);

VHDL-Description

RTL-Synthesis(Synopsys)

Gate-LevelNetlist

Layout

Placement &Routing

(Cadence/Mentor)Production

ASIC

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Institute ofMicroelectronicSystems1: Introduction

Challenge: System-on-a-Chip Design ?

Design Complexity

Design Productivity

1975 1980 1985 1990 1995 2000

Gates

RTL

Place & Route

Synthesis

Reuse, IP Cores

System on a Chip

Transistors

Polygons Masks

Chasing the design gap

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Institute ofMicroelectronicSystems1: Introduction

Traditional ASIC market

ASICs are customer specific IcsIf application-specific processor: ASIPThe product is made only once an application is found

Non-standard IC

Semicustom

Custom

(application specific)

ASIP

(customer specific)

ASIC

Programmable

One or more customised layers

All layers customised

Circuit with fuse, antifuse or memory that can be programmed

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Institute ofMicroelectronicSystems1: Introduction

SoC: Silicon Components Categories

Silicon components

Integrated circuitsDiscrete devices

and optoelectronics

Analog andMixed signal

Logic• Logic• Gate arrays• Cell based• FPLDs• SoC

Memory• DRAMs• SRAMs• Flash• Other

Microcomponets• Microprocessors• Microcontrolers• Microperipherals

Silicon components

Integrated circuitsDiscrete devices

and optoelectronics

Analog andMixed signal

Logic• Logic• Gate arrays• Cell based• FPLDs• Other

Memory• DRAMs• SRAMs• Flash• Other

Microcomponents• Microprocessors• Microcontrollers• Microperipherals

Modern SoCs can integrate different components

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Institute ofMicroelectronicSystems1: Introduction

Market for Systems-on-a-Chip

Area Examples:

MultimediaMobile CommunicationAutomotive...

SoC

-> Domain Specific Computing

WWW

JavaConfigurable

Multi-StandardInfo Plug...

LAN

BroadbandNetwork

Services

MPEG 4-7100 Gop/s 5 Gtr/s 10 Watt

100Mb/sWLAN

<1 Watt

RF20Gop/s

??

Source:Hugo De ManEIS´99, Darmstadt

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Institute ofMicroelectronicSystems1: Introduction

Application: Single-Chip Integrated CMOS Radio

Conventional cellular Phone Solution

• Research into Technology and Design Methodologies for CMOS single Chip Radios

• Exploring future Applications of wireless Technology, 4th Generation and beyond

Berkeley Wireless Centre

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Institute ofMicroelectronicSystems1: Introduction

Application Example: Transceiver Design

Low NoiseAmplifier

Mixer

AD/DAConverter Memory CMOS

Logic

Filter

Modulator

Demodulator

MixerPower

Amplifier

Receiver

Digital BasebandAD/DA

Converter

Transmitter

Filter

Oscillator

Oscillator