1 stochastic logic beyond cmos... prof. mingjie lin
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Stochastic Logic
Beyond CMOS ...
Prof. Mingjie Lin
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Computing Beyond CMOSComputing Beyond CMOS
Intense research into novel materials and devices:
Carbon Nanotubes…
Molecular Switches…
Biological Processes…
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Computing Beyond CMOSComputing Beyond CMOS
Many technologies still in exploratory phase:
b
a
XOR(a, b) !
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Nanoscale CircuitsNanoscale Circuits
• Topological constraints.• Inherent randomness.• High defect rates.
Features:
Challenges:
• High density of bits.
Identify general traits that impinge upon logic synthesis:
{
{
N Wires
M Wires
carbon nanowire crossbar
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Circuit Modeling Circuit Modeling
logic
0
1
0
0
1
Characterize probability of outcomes.
inputs outputs
Model defects, variations, uncertainty, etc.:
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Circuit Modeling Circuit Modeling
logic
),,( 11 mxxf a
),,( 12 mxxf a
),,( 1 mn xxf a
1x
2x
mx
Functional description is Boolean:
inputs outputs
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1x
2x
mx
Consider a probabilistic interpretation:
),,( 11 mxxp
),,( 12 mxxp
),,( 1 mn xxp
logicstochastic
logic
inputs outputs
Circuit Modeling Circuit Modeling
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stochasticlogic
Stochastic Logic Stochastic Logic
inputs outputs
0
1
0
0,1,1,0,1,0,1,1,0,1,…
1,0,0,0,1,0,0,0,0,0,…
p1 = Prob(one)
p2 = Prob(one)
serial bit streams
Consider a probabilistic interpretation:
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stochasticlogic
Stochastic Logic Stochastic Logic
inputs outputs
0
1
0 51
52
Consider a probabilistic interpretation:
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stochasticlogic
Stochastic Logic Stochastic Logic
0
1
0
01001
01000
p1 = Prob(one)
p2 = Prob(one)
parallel bit streams
Consider a probabilistic interpretation:
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stochasticlogic
Stochastic Logic Stochastic Logic
0
1
0
parallel bit streams
51
52
Consider a probabilistic interpretation:
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stochasticlogic
Stochastic Logic Stochastic Logic
Interpret outputs according to fractional weighting:
0
1
0
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Synthesis of Stochastic LogicSynthesis of Stochastic Logic
• Circuit that computes a probability distribution corresponding to a logical specification.
Given a technology characterized by:
Synthesize:
• High degree of structural parallelism.• Inherent randomness in logic/interconnects.
• Cast problem in terms of arithmetic operations.• Perform synthesis with binary moment diagrams.
Strategy:
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A real value x in [0, 1] is encoded as a stream of bits X.For each bit, the probability that it is one is: P(X=1) = x.
Probabilistic BundlesProbabilistic Bundles
01001
xX
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Arithmetic OperationsArithmetic Operations
AND
A
BC
A
BC
MUX
S
Multiplication (Scaled) Addition
ba
BPAP
CPc
)()(
)(
)
)1(
()](1[)()(
)(
bsas
BPSPAPSP
CPc
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When A is a high, a FET-like region causes high resistance between the VDD and A.
A
VDD
A{
{N Wires
M Wires
Nanowire Crossbar (Nanowire Crossbar (idealizedidealized))
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Nanowire Crossbar (Nanowire Crossbar (idealizedidealized))
{{N Wires
M Wires
Randomized connections,yet nearly one-to-one.
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a0
a1
a2
a3
VDD
b0
b1
b2
b3
a3b2
a0b1
a1b3
a2b0
Inversion Occurs a0 a1 a3 a2
VDD VDD
b3 b2 b0 b1
Shuffled ANDShuffled AND
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A1
A2
{}B
{
Takes the AND of randomly chosen pairs.Takes the AND of randomly chosen pairs.
MultiplicationMultiplication
Shuffled AND
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VDD
a0
a1
a2
a3
b0
b1
b2
b3
Densit
y of 1
/4
a0
a1
b1
a3
VDD
Densit
y of 3
/4
BundleplexingBundleplexing
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Scaled AdditionScaled Addition
a0
a1
a2
a3
b0
b1
b2
b3
a3
a2
b2
a1
Randomly selection of wires from different bundles, Randomly selection of wires from different bundles, according to a fixed ratio..
¾ Bundleplexer
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Stochastic LogicStochastic Logic
Shuffled ANDs,Bundleplexers
Shuffled ANDs,Bundleplexers
{{
A0
A1
.
.
.
{An
} B
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Stochastic LogicStochastic Logic
Shuffled ANDs,Bundleplexers
Shuffled ANDs,Bundleplexers
{{{
}...
1
0
1
5
2
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Lecture schedule
See Webpage:
www.eecs.ucf.edu/~mingjie/EEL4783
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Final issues
• Come by my office hours (right after class)
• Any questions or concerns?