1190948120898

EE3113_L1 1

EE 3113INTRODUCTION INTO RF

CIRCUIT DESIGN

Lecture Notes for A-term 1999LECTURE 1

Prof. R. LudwigDepartment of Electrical and Computer Engineering

Worcester Polytechnic InstituteWorcester, MA

Copyright, 1998 R. Ludwig

EE3113_L1 2

EE 3113: Lecture 1

Importance of RF circuit design wireless communications (explosive growth of

cell phones) global positioning systems (GPS) computer engineering (bus systems, CPU,

peripherals exceeding 600 MHz)

Why this course??? lumped circuit representation no longer applies!

EE3113_L1 3

What do we mean by going from lumped to distributed theory?

Example: INDUCTOR

Low-frequency

(lumped)

LjRZ w+=

High-frequency

Z = ?

EE3113_L1 4

Current and voltage vary spatially over the component size

Upper MHz to GHz range

-1-0.5

00.5

1x-1

-0.5

0

0.5

1

y0

2

4

6

z

-1-0.5

00.5

1x

E (or V) and H (or I) fields

EE3113_L1 5

Frequency spectrum RadioFrequency (RF)

TV, wireless phones, GPS 300 MHz 3 GHz operational frequency 1 m 10 cm wavelength in air

MicroWave (MW) RADAR, remote sensing 8 GHz 40 GHz operational frequency 3.75 cm 7.5 mm wavelength in air

EE3113_L1 6

Design FocusCell phone transceiver circuit

Typical frequencyrange:

950 MHz

1.9 GHz

EE3113_L1 7

Implementation

matching networks

BJT/FET active devices

biasing circuits

printed circuit board

mircostripline realization

surface mount technology

EE3113_L2 1


CIRCUIT DESIGN





EE3113_L2 2

RF Behavior of Passive Components

Conventional circuit analysis R is frequency independent Ideal inductor: Ideal capacitor:

Evaluation Impedance chart

LjXL w=

CXC w1=

EE3113_L2 3

Impedance Chart(impedance of C & L vs frequency)

ZC=1/(2pfC)

ZL=2pfL

EE3113_L2 4

How does a wire behave at high frequency?

Example: Resistorsp 2a

lRDC =

d2/

aRR DC = d

w2

/a

RL DC =

mspd

f

1=

High frequency results in skin-effect whereby current flow ispushed to the outside

EE3113_L2 5

How exactly is the current distribution as a function offrequency?

Low frequency showsuniform currentdistribution

medium to highfrequency pushescurrent to the outside

RF sees currentcompletely restrictedto surface

EE3113_L2 6

Impedance Measurement ExampleCapacitor going through resonance

CapacitorCharacteristics

EE3113_L2 7

Equivalent Circuit Analysis

EE3113_L3 1


CIRCUIT DESIGNLecture Notes for A-term 1999

LECTURE 3Prof. R. Ludwig

Department of Electrical and Computer EngineeringWorcester Polytechnic Institute

Worcester, MA 01619copyright 1999, R. Ludwig


EE3113_L3 2

Transmission Line Analysis

Propagating electric field

Phase velocity

Traveling voltage wave

)cos(0 kztEE XX -= w

Time factor

Space factor

rp

cfv

eeml ===

1

kkzt

EtzV X)sin(

),( 0-

=w

EE3113_L3 3

High frequency implies spatial voltage distribution

Voltage has a time andspace behavior

Space is neglected for lowfrequency applications

For RF there can be a largespatial variation

EE3113_L3 4

Generic way to measure spatial voltage variations

For low frequency (1MHz)Kirchhoffs laws apply

For high frequency (1GHz)Kirchhoffs laws do notapply anymore

EE3113_L3 5

Kirchhoffs laws on a microscopic level

Over a differential sectionwe can again use basiccircuit theory

Model takes into accountline losses and dielectriclosses

Ideal line involves only Land C

EE3113_L3 6

Example of transmission line: Two-wire line

Alternating electric fieldbetween conductors

alternating magnetic fieldsurrounding conductors

dielectric medium tendsto confine field insidematerial

EE3113_L3 7

Example of transmission line: Coaxial cable

Electric field iscompletely containedwithin both conductors

Perfect shielding ofmagnetic field

TEM modes up to acertain cut-off frequency

E

H

EE3113_L3 8

Example of transmission line: Microstip line

Cross-sectional view

Low dielectric medium High dielectric medium

EE3113_L3 9

Triple-layer transmission line

Conductor is completely shielded between twoground planes


EE3113_L4 1


CIRCUIT DESIGN



Worcester Polytechnic InstituteWorcester, MA 01609

copyright 1999, R. Ludwig


EE3113_L4 2

General Transmission Line Equations

Detailed analysis of a differential section

Note: Analysis applies to all types of transmission lines such ascoax cable, two-wire, microstrip, etc.

EE3113_L4 3

Kirchhoffs laws on a microscopic level

Over a differentialsection we can againuse basic circuit theory

Model takes intoaccount line losses anddielectric losses

Ideal line involvesonly L and C

EE3113_L4 4

Advantages versus disadvantages ofelectric circuit representation

Clear intuitivephysical picture

yields a standardizedtwo-port networkrepresentation

serves as buildingbocks to go frommicroscopic tomacroscopic forms

Basically a one-dimensional representation(cannot take into accountinterferences)

Material nonlinearities,hysteresis, and temperatureeffects are not accountedfor

EE3113_L4 5

)()()(

))()(

( zILjRdz

zdVz

zVzzVLim w+=-=

D-D+

-

Derivation of differential transmission line form

)()()()( zzVzzILjRzV D++D+= wKVL :

KCL :)()()()( zzIzzzVCjGzI D++D+D+= w

)()()(

zVCjGdz

zdIw+=-

CoupledDE

EE3113_L4 6

Traveling Voltage and Current Waves

0)()( 2

2

2

=- zVkdz

zVd

where

))(( CjGLjRjkkk ir ww ++=+=

kzkz eVeVzV +--+ +=)( kzkz eIeIzI +--+ +=)(

0)()( 2

2

2

=- zIkdz

zId

Left traveling wave

Right traveling wavePhasor expressions

EE3113_L4 7

General line impedance definition

)()(

)( kzkz eVeVLjR

kzI +--+ -

+=

w

-

-

+

+

-==++

=IV

IV

CjGLjR

Z)()(

0 ww

?

Characteristic line impedance

EE3113_L5 1


CIRCUIT DESIGN






EE3113_L5 2

Lossless Transmission Line Model

Line representation

)()(

0 CjGLjR

Zww

++

=Characteristic impedance:

Note: R, L, G, C are given per unit length and depend on geometry

Lossless implies:R = G = 0!

EE3113_L5 3

Transmission Line Parameters for different line types

2-wire coax

sdpa1

)2

(1aD

ch-pm

R

L

G

C

)11

(2

1ba

+psd

parallel-plate

))2/((1 aDch-ps

))2/((1 aDch-pe

sdw2

wd

m

dw

s

dw

e

)ln(2 a

bpm

)/ln(2

abps

)/ln(2

abpe

EE3113_L5 4

Microstrip line

1/),4

8ln(2

/ 000

EE3113_L5 5

What is a voltage reflection coefficient?

0

00 ZZ

ZZ

L

L

+-

=GReflection coefficientat the load location

)(10 =G LZ

)0(10 -=G LZ

EE3113_L5 6

Standing Waves

)()( djdj eeVdV bb -++ -=

)2/cos()sin(2),( pwb += + tdVtdv

EE3113_L5 7

Standing wave ratio

||1||1

||||

||||

0

0

min

max

min

max

G-G+

===II

VV

SWR

SWR is a measure of mismatch of theload to the line

SWR=1 (matched) or SWR (total mismatch)

match

EE3113_L6 1


CIRCUIT DESIGN






EE3113_L6 2

Special Termination Conditions

Lossless transmission line

CL

Z =0

)tan()tan(

)(0

00 djZZ

djZZZdZ

L

Lin b

b++

=

Characteristic impedance

EE3113_L6 3

Input impedance of short circuit transmission line

)tan()( 0 djZdZin b=Impedance

Voltage:

)sin(2)( djVdV b+=

Current:

)cos(2

)(0

dZV

dI b+

=

EE3113_L6 4

Input impedance of open circuit transmission line

Voltage:

Current:

Impedance

)cos(2)( dVdV b+=

)sin(2

)(0

dZjV

dI b+

=

)cot()( 0 djZdZin b-=

EE3113_L6 5

Quarter-wave transmission line

LL

Lin Z

ZjZZjZZ

ZZ2

0

0

00 )4/tan(

)4/tan()4/( =

++

=blbl

l

Quarter-wave transformer model:

given input and output impedances

Predict lineimpedance

inLZZZ =0

EE3113_L6 6

What should you know? Input impedance: Page 80, equation (2.71) Example 2.6 on page 82 Example 2.7 on page 84 Example 2.8 on page 87

Matching works only forparticular frequencies

500 MHz 1.5 GHz

EE3113_L7 1


CIRCUIT DESIGN






EE3113_L7 2

Sourced and Loaded Transmission Lines Lossless transmission line with source

)()1(Gin

inGininin ZZ

ZVVV

+=G+= +

Voltage at the beginning of the transmission line iscomposed of an incident and reflected component!

0

0

ZZZZ

G

G

+-

=0

0

ZZZZ

L

L

+-

=

EE3113_L7 3

Power considerations

}Re{21 *

ininin IVP =

)1( ininin VV G+=+ )1(

0in

inin Z

VI G-=

+

)||1(||

21 2

0

2

inin

in ZV

P G-=+

)||1(|1|

|1|||81 2

2

2

0

2

ininS

SGin Z

VP G-

GG-G-

=

EE3113_L7 4

Two special cases:

Load and sourcematched line 00 =G=G S

0

2||81

ZV

P Gin =

Mismatch at source,but match at load 00 =G

2

0

2

|1|||

81

SG

in ZV

P G-=

How to measure power?mWWP

dBmP1

][log10][ =

EE3113_L7 5

Return and insertion losses

Return loss: ||log20||log10)log(10 2 inini

r

PP

RL G-=G-=-= [dB]

Insertion loss: )||1log(10)log(10)log(10 2ini

ri

i

t

PPP

PP

IL G--=-

-=-= [dB]

No reflection Full reflection

0

dB10 dB

1RL

SWR

EE3113_L8 1


CIRCUIT DESIGN






EE3113_L8 2

From Reflection Coefficient to LoadImpedance (Smith Chart)

Reflection coefficient in phasor form

Ljir

L

L ejZZZZ q|| 000

0

00 G=G+G=+

-=G

The load reflectioncoefficient is identified inthe complex domain

0G

EE3113_L8 3

Normalized impedance

ir

irinin j

jdd

jxrzZdZG-G-G+G+

=G-G+

=+==11

)(1)(1

/)( 0

irdjj jeed L G+G=G=G - bq 20 ||)(

22

22

)1(1

ir

irrG+G-

G-G-=

22)1(2

ir

ixG+G-

G=

Real part of normalizedimpedance

Imaginary part ofnormalized impedance

EE3113_L8 4

Inversion of complex reflection coefficient(constant normalized resistance)

222 )1

1()

1(

+=G+

+-G

rrr

ir

EE3113_L8 5

Inversion of complex reflection coefficient(constant normalized reactance)

222 )1

()1

()1(xxir

=-G+-G

EE3113_L8 6

Combined display: Smith Chart

EE3113_L9 1







EE3113_L9 2

Impedance Transformation(Smith Chart)

Reflection coefficient in phasor form

Ljir

L

L ejZZZZ q|| 000

0

00 G=G+G=+

-=G

0G

ir

irinin j

jdd

jxrzZdZG-G-G+G+

=G-G+

=+==11

)(1)(1

/)( 0

EE3113_L9 3

Generic Smith Chart computation

Normalize load impedance find reflection coefficient rotate reflection coefficient record normalized input impedance de-normalize input impedance

LL zZ

0GLz)(0 dGG

)(dzin)()( dZdz inin

EE3113_L9 4

Graphical display

EE3113_L9 5

How to create ideal capacitors and inductors with atransmission line?

Start oftransformation

Capacitivedomain

Inductivedomain

EE3113_L9 6

Start oftransformation

EE3113_L10 1


CIRCUIT DESIGN

Lecture Notes for A-term 1999LECTURE 10Prof. R. Ludwig




EE3113_L10 2

Admittance Transformation(Smith Chart)

impedance representation in Smith Chart

0G

)(1)(1

dd

jxrzin G-G+

=+=

admittance representation in Smith Chart

)(1)(1

)(1)(11

0 dede

dd

zYY

y jj

in

inin G-

G+

G+G-

=== --

p

p

180 degreephase shift

EE3113_L10 3

Transformation21

21

11 jyjz inin -=+=

EE3113_L10 4

Alternative: re-interpretation

Instead of rotating the reflection coefficient about180 degree, we keep the location fixed and rotate theentire Smith Chart by 180 degree.

EE3113_L10 5

Re-interpretation leads to ZY-Smith Chart

The Smith Chart inits original form iskept for impedancedisplay,

but a second SmithChart is rotated by180 degree foradmittance display.

EE3113_L11 1







EE3113_L11 2

Parallel Connection of R and L Elements(Smith Chart)

parallel connection of R and L elements

0

1)(

LYjgy

LLin w

w -=

EE3113_L11 3

Parallel connection of R and C elements

CjZgy LLin ww 0)( +=

EE3113_L11 4

Series connection of R and L elements

0

)(Z

Ljrz LLinw

w +=

EE3113_L11 5

Series connection of R and C elements

0

1)(

CZjrz

LLin w

w -=

EE3113_L11 6

Practical case: BJT connected viaa T-network

EE3113_L12 1


CIRCUIT DESIGN





EE3113_L12 2

Single and Multi-Port Networks

basic current and voltage definitions definitions

EE3113_L12 3

Impedance and admittance networks

}]{[}{ IZV = }]{[}{ VYI =

}]{][[}{ IYZV =

][][ 1 ZY =-

EE3113_L12 4

Example Z-representation of Pi-network

+

+++

=)(

)(1][

PBPAPCPCPA

PCPAPCPBPA

PCPBPA ZZZZZ

ZZZZZ

ZZZZ

)(0| mkim

nnm ki

vz ==

EE3113_L12 5

Additional networks

-

=

2

2

1

1

i

v

DC

BA

i

v Chain or ABCD network

(often used for cascading)

=

2

1

2221

1211

2

1

v

i

hh

hh

i

v Hybrid or h-network

(often used for active devices)

Typical exampleof h-network(small signal, lowfrequency model)

EE3113_L13 1


CIRCUIT DESIGN





EE3113_L13 2

Interconnecting Networks

Certain networks are more advantageous tointerconnect.

Example: series connection

]"[]'[][ ZZZ +=

EE3113_L13 3

Hybrid representation

]"[]'[][ hhh +=

Typical example

EE3113_L13 4

ABCD parameter representation

Very useful when cascading networks

-

=

2

2

1

1

"

"

""

""

''

''

i

v

DC

BA

DC

BA

i

v

EE3113_L13 5

ABCD network is very useful for transmission linerepresentations

=

)cos(

)sin()sin()cos(

0

0

lZ

lj

ljZl

DC

BAb

bbb

Example:

EE3113_L14 1


CIRCUIT DESIGN





EE3113_L14 2

Scattering parameters There is a need to establish well-defined

termination conditions in order to find thenetwork descriptions for Z, Y , h, andABCD networks

Open and short voltage and currentconditions are difficult to enforce

RF implies forward and backward travelingwaves which can form standing wavesdestroying the elements

EE3113_L14 3

Solution: S-parameters

Input-output behavior of network is definedin terms of normalized power waves

Ratio of the power waves are recorded interms of so-called scattering parameters

S-parameters are measured based onproperly terminated transmission lines (andnot open/short circuit conditions)

EE3113_L14 4

Basic configuration

11

| 01

111 2 portatwavepowerincident

portatwavepowerreflectedab

S a == =

12

| 01


portatwavepowerdtransmitteab

S a == =

22

| 02


portatwavepowerreflectedab

S a == =

21

| 02

11 portatwavepowerincident

portatwavepowerdtransmitteab

S a == =

EE3113_L14 5

Set-up for measuring S-parameters

Properly terminated output

Properly terminated input side

Load impedance =line impedance

input impedance =line impedance

EE3113_L15 1

EE 3113INTRODUCTION TO RF

CIRCUIT DESIGN





EE3113_L15 2

Scattering parameters There is a need to establish well-defined

termination conditions in order to find thenetwork descriptions for Z, Y , h, andABCD networks

Open and short voltage and currentconditions are difficult to enforce

RF implies forward and backward travelingwaves which can form standing wavesdestroying the elements

EE3113_L15 3

Solution: S-parameters

Input-output behavior of network is definedin terms of normalized power waves

Ratio of the power waves are recorded interms of so-called scattering parameters

S-parameters are measured based onproperly terminated transmission lines (andnot open/short circuit conditions)

EE3113_L15 4

Measurements of ScatteringParameters

01

111 2

| == aab

S

01

221 2

| == aab

S

02

222 1

| == aab

S

02

112 1

| == aab

S

Require proper terminationon port 2

Require proper terminationon port 1

EE3113_L15 5

Arrangement for measuring S-parameters

Properly terminated port 2 in order to makeS11 and S21 measurements

Properly terminated port 1 in order to makeS22 and S12 measurements

Load impedance =line impedance

input impedance =line impedance

EE3113_L15 6

Example: S-parameters of T-network

Port 1 measurements Port 2 measurements

EE3113_L16 1


CIRCUIT DESIGN





EE3113_L16 2

Working with S-parameters For network computations it is easier to

convert from the S-matrix representation tothe chain scattering matrix notation

=

2

1

2221

1211

2

1

a

a

SS

SS

b

b

=

2

2

2221

1211

1

1

a

b

TT

TT

b

a

.,,1 2111212111 etcSSTST ==

EE3113_L16 3

Advantage: cascading just like in the ABCDform

=

B

B

BB

BB

AA

AA

A

A

a

b

TT

TT

TT

TT

b

a

2

2

2221

1211

2221

1211

1

1

EE3113_L16 4

Signal flow chart computations

Complicated networks can be efficiently analyzed in amanner identical to signals and systems and control.

in general

EE3113_L16 5

Arrangement for flow-chart analysis

GG

S VZZ

Zb

0

0

+=

EE3113_L16 6

Analysis of most common circuit

Sba1

Determination ofthe ratio

EE3113_L16 7

Important issue: what happens to the S11 parameter ifport 2 is not properly terminated?

LL

in SSS

Sab

GG-

+==G22

211211

1

1

1

Note: Only GL = 0 ensures that the S11 can be measured!

EE3113_L17 1


CIRCUIT DESIGN





EE3113_L17 2

Semiconductor fundamentals Basic semiconductor lattice structure

intrinsic, n and p-type semiconductors

EE3113_L17 3

Space charge formation across the pn junction

Behavior of junction due to an applied voltage

EE3113_L17 4

Voltage-Current response of conventional diode

V-I current behavior

II =

)1( /0 -= TAVVeII

EE3113_L17 5

Key terms

Concentrations (nn, np, pp, pn) Band model, Fermi energy Barrier voltage Space charge, junction capacitance reverse and forward biasing V/I characteristics

EE3113_L18 1


CIRCUIT DESIGN



Worcester, MA


EE3113_L18 2

RF diodes Key equation: Schottky diode equation

diode analysis involves typically threemodels: DC model small signal ac model small signal RF model

)1(0 -= TA

nVV

eII

EE3113_L18 3

Small signal ac model

Dynamic resistance (junction resistance)

dQ

dQA

iII

vVV

+=

+=

0IInV

RQ

Tj +

=

Note: dynamic resistance depends on biasand is strongly temperature dependent

EE3113_L18 4

Small signal RF model

Schottky diode metal-n semiconductor majority carrier only

+

+

+

Applications: mixers, detectors, rectifiers

+ -

EE3113_L18 5

PIN diode

P+ N+I

Intrinsic (low doped) n, p, orpn layer

Major property: Variable resistance behavior

Forward bias:

Isolation state

Zero bias:

Insertion loss state

Applications: attenuating, switching, modulating, limiting,and phase shifting.

EE3113_L18 6

Electric behavior of PIN diode

Forward bias (low resistance)Reverse bias (capacitance)

Circuitapplication

EE3113_L19 1


CIRCUIT DESIGN





EE3113_L19 2

RF Transistors BJT: low noise, linear power amplification,

power applications (bipolar operation)

GaAs FET: very low noise, low power (monopolar operation)

HEMT (High electron mobility transistor): very high frequency (f > 20 GHz) (electron gas)

EE3113_L19 3

Major issue when dealing with RF transistors: NOISE shot noise in emitter-base shot noise in collector system thermal noise in base resistance

How to reduce noise minimize current flow across pn-junction minimize resistance

Solution Finger structure of base, emitter configuration

EE3113_L19 4

Finger structure of BJT


Top-down view

(see pp. 325 - 342)

EE3113_L19 5

Functionality of BJT

EE3113_L19 6

Structure of MESFET

(see pp. 344 - 355)

Functionality of MESFET

EE3113_L19 7

Modeling efforts for BJT Non-linear models

Ebers-Moll Gummel-Poon

Low frequency h-parameter model

High frequency modified hybrid model with additional Cbeand

Cbecapacitances Miller effect is used to convert Cbc into input

capacitance

EE3113_L19 8

Non-linear BJT model

Dynamic Ebers-Moll chip model

RBLB C

E

Cbe

Ebers-Moll Model

RCL

REL

Cce

Cbc

LBL LCL

LEL

RF model with parasitic effects

See notes, pp. 374 - 397

EE3113_L19 9

Small-signal BJT model

Hybrid-PI Ebers-Moll model (p. 384)

RF-model (p. 387)

Decoupled RF-model (Miller effect)

EE3113_L19 10

Performance analysis

Hybrid Pi-model (see p. 392)

EE3113_L19 11

S-parameter modeling of BJT

Hybrid model can be converted into S-parameters via input/output impedance and voltage relations

S-parameters can also be directly measured for certain biasing and operating frequency condition (values are provided by manufacturer)

EE3113_L19 12

How to measure S-parameters?

Vector voltmeter

Dual directional coupler

EE3113_L19 13

Alternative: Network analyzer with S-parameter test set

EE3113_L20 1


CIRCUIT DESIGN





EE3113_L20 2

Matching Networks

MNsare critical for at least two critical reasons maximize power transfer: minimize

Primary goal of a MN is to achieve

0=Gin

)||1( 2inirit PPPP G-=-=

||1||1

in

inSWRG-G+

=

EE3113_L20 3

MN strategy

Pick an appropriate two-element MN for which matching is possible (based on a given load impedance or S-parameter)

find the L, C values from the ZY Smith Chart

convert discrete values into equivalent microstriplines

EE3113_L20 4

Region of matching for shunt L, series C matching network

EE3113_L20 5

Region of matching for series C shunt L matching network

EE3113_L20 6

Region of matching for series L shunt C matching network

EE3113_L20 7

Region of matching for shunt C and series L matching network

EE3113_L21 1


CIRCUIT DESIGN





EE3113_L21 2

There are two strategies

A) Source impedance -> conjugate complex load impedance

B) Load impedance -> conjugate complex source impedance

EE3113_L21 3

A) General two-element approach

0.2

0.2

0.2

0.50.5

0.5

1.01.0

1.0

2.02.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.0

2.00.2

0.2

0.2

0.5

0.5

0.5

1.0

1.0

1.0

2.0

2.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.0

2.0

2.0

2.0

0.2

0.2

0.2

0.50.5

0.5

1.01.0

1.0

2.02.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.0

2.0

0010

-10

20-20

30-30

40-40

50

-50

60

-60

70

-70

80

-80

90

-90

100

-100

110

-110

120

-120

130

-130

140

-140

150

-150

160

-160

170

-170

180

0.

01

0.01

0.02

0.02

0.03

0.03

0.04

0.04

0.05

0.05

0.06

0.06

0.07

0.07

0.08

0.08

0.09

0.09

0.1

0.1

0.11

0.11

0.12

0.12

0.13

0.13

0.14

0.14

0.15

0.15

0.16

0.16

0.17

0.17

0.18

0.18

0.19

0.19

0.2

0.20.21

0.210.22

0.220.23

0.23

0.24

0.24

0.25

0.25

0.26

0.26

0.27

0.27

0.28

0.28

0.29

0.29

0.3

0.3

0.31

0.31

0.32

0.32

0.33

0.33

0.34

0.34

0.35

0.35

0.36

0.36

0.37

0.37

0.38

0.38

0.39

0.39

0.4

0.4

0.41

0.41

0.42

0.42

0.43

0.43

0.44

0.44

0.45

0.45

0.46

0.46

0.47

0.47

0.48

0.48

0.49

0.49

0.0

0.0

zS

zL*

A D

B C

Source impedance transformation to conj. comp. load

EE3113_L21 4

B) Load impedance to conjugate complex source impedance ( )W== 50*SS ZZ

ZLZS

ZLZSZLZS

ZLZS

(c)

(b)

0.2

0.2

0.2

0.50.5

0.5

1.0

1.0

1.0

2.02.0

2.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.0

2.0

0.2

0.2

0.2

0.5

0.5

0.5

1.0

1.0

1.0

2.0

2.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.0

2.0

2.0

2.0

0.2

0.2

0.2

0.50.5

0.5

1.0

1.0

1.0

2.02.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.0

2.0

0.2

0.2

0.2

0.50.5

0.5

1.01.0

1.0

2.02.0

2.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.02.0

0.2

0.2

0.2

0.5

0.5

0.5

1.0

1.0

1.0

2.0

2.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.0

2.0

2.0

2.0

0.2

0.2

0.2

0.50.5

0.5

1.01.0

1.0

2.02.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.02.0

0.2

0.2

0.2

0.50.5

0.5

1.0

1.0

1.0

2.02.0

2.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.0

2.0

0.2

0.2

0.2

0.5

0.5

0.5

1.0

1.0

1.0

2.0

2.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.0

2.0

2.0

2.0

0.2

0.2

0.2

0.50.5

0.5

1.0

1.0

1.0

2.02.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.0

2.0

0.2

0.2

0.2

0.50.5

0.5

1.0

1.0

1.0

2.02.0

2.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.0

2.0

0.2

0.2

0.2

0.5

0.5

0.5

1.0

1.0

1.0

2.0

2.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.0

2.0

2.0

2.0

0.2

0.2

0.2

0.50.5

0.5

1.0

1.0

1.0

2.02.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.0

2.0

(a)

(d)

EE3113_L21 5

The art of designing MNs

0.2

0.2

0.2

0.50.5

0.5

1.01.0

1.0

2.02.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.02.0

0.2

0.2

0.2

0.5

0.5

0.5

1.0

1.0

1.0

2.0

2.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.0

2.0

2.0

2.0

0.2

0.2

0.2

0.50.5

0.5

1.01.0

1.0

2.02.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.02.0

zS

zL

A

B

VS

RS=50W

RL

CL

L nH=10

C pF=2.6Vout

VS

RS=50W

RL

CLL nH=9.75

C pF=0.6

Vout

Frequency , GHzf

Inpu

t ref

lect

ion

coef

fici

ent |

|G Circuit in

Figure 8-8(b)

Circuit inFigure 8-8(c)

(b)

(c)

Frequency , GHzf

Tran

sfer

func

tion

, dB

H

Circuit inFigure 8-8(b)

Circuit inFigure 8-8(c)

2.16.1 jzL +=

2.16.1 jzL +=

f = 1GHz

Z0= 50 Ohm

EE3113_L21 6

More complicated networks

Three-element Pi and T networks permit the matching of almost any load conditions

Added element has the advantage of more flexibility in the design process (fine tuning)

Provides quality factor design (see Ex. 8.4)

0.2

0.2

0.2

0.50.5

0.5

1.01.0

1.0

2.02.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.0

2.0

0.2

0.2

0.2

0.5

0.5

0.5

1.0

1.0

1.0

2.0

2.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.0

2.0

2.0

2.0

0.2

0.2

0.2

0.50.5

0.5

1.01.0

1.0

2.02.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.0

2.0

Qn=2

zL

B

A

zin Qn=2

EE3113_L21 7

MN realizations in microstripline

TL1TL2TL3

C1C2 ZL

Zin

Distributed microstip lines and lumped capacitors

less susceptible to parasitics

easy to tune

efficient PCB implementation

small size for high frequency

EE3113_L21 8

Microstip line procedure

0.2

0.2

0.2

0.50.5

0.5

1.01.0

1.0

2.02.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.0

2.0

0.2

0.2

0.2

0.5

0.5

0.5

1.0

1.0

1.0

2.0

2.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.0

2.0

2.0

2.0

0.2

0.2

0.2

0.50.5

0.5

1.01.0

1.0

2.02.0

2.0

5.0

5.0

5.0

0.5

0.5

0.5

0.5

2.02.0

2.0

2.0

0010

-10

20-20

30-30

40-40

50

-50

60

-60

70

-70

80

-80

90

-90

100

-100

110

-110

120

-120

130

-130

140

-140

150

-150

160

-160

170

-170

180

0.

01

0.01

0.02

0.02

0.03

0.03

0.04

0.04

0.05

0.05

0.06

0.06

0.07

0.07

0.08

0.08

0.09

0.09

0.1

0.1

0.11

0.11

0.12

0.12

0.13

0.13

0.14

0.14

0.15

0.15

0.16

0.16

0.17

0.17

0.18

0.18

0.190.19

0.2

0.20.21

0.210.22

0.220.23

0.23

0.24

0.24

0.2

5

0.2

5

0. 26

0.26

0.27

0.27

0.28

0.28

0.29

0.29

0.3

0.3

0.31

0.31

0.32

0.32

0.33

0.33

0.34

0.34

0.35

0.35

0.36

0.36

0.37

0.37

0.38

0.38

0.39

0.39

0.4

0.4

0.41

0.41

0.42

0.42

0.43

0.43

0.44

0.44

0.45

0.45

0.46

0.46

0.47

0.47

0.48

0.48

0.49

0.49

0.0

0.0

zin

zL

A

B

l 1=0.0

55l

l2=0.26l

l1=0.055l

C1=4.37pF ZL

Zin

l2=0.26l

W+= )1030( jZL W+= )8060( jZin

EE3113_L22 1


CIRCUIT DESIGN





EE3113_L22 2

Microstripline Matching Networks

Most commonly used in RF circuits Can be used up to approximately 20 GHz (for

TEM modes) Microstrip lines require typically 6 parameters

dielectric constant eer PCB board height h, strip width w, thickness t resistivity rr and loss tangent d

EE3113_L22 3

Key parameter designations

er , d

wt

h

r

???0 =++

=CjGLjR

ZwwDont use:

EE3113_L22 4

Please keep in mind, there are two issues A) phase velocity and B) characteristic impedance:

effrp

ccv

ee=

1/)41

8ln(60

00 += hwhw

wh

ZZeffe

1/)444.1/ln(667.0393.1/

/120600 +++

= hwhwhw

Z eff

eff

ep

e

Numerical evaluation (Manuscript, page 70):

Z0(er)=F1(w/h) and eeff(er)=F2(w/h)

EE3113_L22 5

Microstriplines have two sources of losses

zcdeZ

VzP )(2

0

2||21

)( aa +-+

+ =

Dielectric losses ad (which are typically small)

and

Conduction losses ac (which can be significant)

Depending on frequency, one may have to deal with radiation losses as well!

EE3113_L22 6

Classes of amplifier operationIC

VBECut-off region

Quiescentpoint

V*

Linear regionIdeal transferfunction

Input waveform

Output waveform

IC

VBE

Quiescentpoint

Q0=180o

IC

VBE

Quiescentpoint

IC

VBE

Quiescentpoint

Class AClass B

Class AB Class C

EE3113_L22 7

Efficiency of an amplifier

%100S

RF

PP

PowerSourcePowerRF

==h

ILI0

0

Q0

Qp 2p 3p

Current through load

ISIQ+I0

0Q0

Qp 2p 3p

IQ

Q0/2

Current from the power supply

EE3113_L22 8

)]2/sin(2)2/cos([2sin

000

00

Q-QQQ-Q

-=h

Conduction angle, Qo

Eff

icie

ncy

, %h h=78.5%

Q=180o

Class B

Class A

Class AB

Class C

EE3113_L23 1


CIRCUIT DESIGN





EE3113_L23 2

Biasing networks Biasing networks are needed to set appropriate

operating conditions for active devicesThere are two types: Passive biasing (or self-biasing)

resistive networks drawback: poor temperature stability

Active biasing additional active components (thermally coupled) drawback: complexity, added power consumption

EE3113_L23 3

Passive biasingVCC

R1

RFCR2

IBI1

RFOUT

RFIN

IC

RFC

CB

CB

Simple two element biasing

blocking capacitors CBand RFCs to isolate RF path

Very sensitive to collector current variations

EE3113_L23 4

Passive biasingVCC

R1

RFCR2

IBRFOUT

RFIN

IC

RFCR3

R4

IX

VX

CB

CB

Voltage divider to stabilize VBE

Freedom to choose suitable voltage and current settings (Vx, Ix)

Higher component count, more noise susceptibility

IB~10 IX

EE3113_L23 5

Active biasingVCC

RFCRC1

RFOUT

RFIN

RFC

VC1Q2

Q1

I1

IB1

IB1

IC2

RB1 RB2

RE1

RC2

IC1

CB

CB

Base current of RF BJT (Q2) is provided by low-frequency BJT Q1

Excellent temperature stability (shared heat sink)

high component count, more complex layout

EE3113_L23 6

Active biasing in common base

VCC

RFC

RC1

RFOUT

RFINRFC

VC1Q2

Q1

I1

IB1

IB1

IC2

RB1 RB2

RE1

RC2

IC1

CB

CB

RFC

VCC

RFC

RC1

RFCQ2

Q1

RB1 RB2

RE1

RC2

CB

CB

RFC

VCC

RFC

RC1

RFOUT

RFINRFCQ2

Q1

RB1 RB2

RE1

RC2

CB

CB

RFC

DC path

RF path

EE3113_L23 7

FET biasingVDVG

CB

RFC

CB

RFC

RFOUTRFIN

VD

VS

CB

CB

RFC

RFOUTRFIN

RFCRFC

VD

RSCB

CB

RFC

RFOUTRFIN

RFC

Bi-polar power supply

Uni-polar power supply

VG0

EE3113_L24 1


CIRCUIT DESIGN





EE3113_L24 2

RF Amplifier Objective:Design a complete class A,

single-stage RF amplifier operated at 1 GHz which includes biasing, matching networks, and RF/DC isolation.

MN1 MN2BJTRFin RFout

biasing

EE3113_L24 3

Strategy Design DC biasing conditions Select S-parameters for given bias and

operating frequency Build input and output matching networks

for desired frequency response include RF/DC isolation simulate amplifier performance on the

computer (OptoteksMMICAD or HPsLibra package)

EE3113_L24 4

Overall approach

PA RFsource

DC bias

InputMatching Network (IMN)

OutputMatching Network (IMN)

LoadPL

GS GL

Gin Gout

PA PL

GS GL

Gin Gout

[ ]SZS

VSZL

b1` a1 b2b1` a2`

b2 a2a1` b2`

ZS

VSZL

b1`b1`

a1`

GS

Gin

For power considerations, matching networks are assumed lossless

EE3113_L24 5

Power Relations

222

2

2221

2

|1||1|)||1(||)||1(

LinS

SLT S

SG

G-GG-G-G-

=

Transducer Power Gain

Available Power Gain ( )*outL G=G

211

2

221

2

|1||||1|||)||1(

Sout

SA S

SG

G-G-G-

=

Operating Power Gain ( )*inS G=G

222

2

221

2

|1||||1|||)||1(

Lin

L

SS

GG-G-

G-=

EE3113_L25 1


CIRCUIT DESIGN





EE3113_L25 2

Stability of active device

1||,1||

EE3113_L25 3

Constant Gain AmplifierG L` =0

Z0

GSVS G0( =0)S12

GL ZL

G S` =0 GS GL

Gin=S11 Gout=S22

222

22

21211

2

|1|||1

|||1|

||1

L

L

S

STU S

SS

GG-

G-

G-G-

=

)()()()( 0 dBGdBGdBGdBG LSTU ++=

EE3113_L25 4

Constant gain circles in the SC

211

max ||11S

GS -=

222

max ||11S

GL -=

)||1(|1|

||1 2112

11

2

max

SSG

Gg

S

S

S

SS -G-

G-==

)||1(|1|

||1 2222

22

2

max

SSG

Gg

L

L

L

LL -G-

G-==

normalize

)||1(|1|

||1 22

2

maxii

iii

i

i

ii SSG

Gg -

G-G-

== This can be written as a circle equation

(see page 511)

EE3113_L25 5

Circle equation and graphical display222 )()(iii g

Ig

Ii

Rg

Ri rdd =-G+-G

)1(||1 2*

iii

iiig gS

Sgd

i --=

)1(||1

)||1(12

2

iii

iiig gS

Sgr

i ----

=

-1dB0dB

1dB

2dB2.6dB

S11*

GL=0.49dB

GL

S22*

Constant source gain circlesConstant load gain circle

See Ex. 9.7 (p. 512)

EE3113_L25 6

Trade-off between gain and noise

0.2

0.5

1.0

2.0

5.0

+0.2

-0.2

+0.5

-0.5

+1.0

-1.0

+2.0

-2.0

+5.0

-5.0

0.0

Fk=1.6dB

G=8dB

VS W Rin

=2

Maximum gain and minimum noise figure are mutually exclusive

0 50 100 150 200 250 300 3501.3

1.4

1.5

1.6

1.7

1.8

1.9

2

2.1

2.2

2.3

Input and output VSWR as a function of GS position

Angle a , deg.

Input

and o

utp

ut

VSW

Rs

VSWRout

VSWRin

Noise figure

Constant gain

EE3113_L26 1


CIRCUIT DESIGN





EE3113_L26 2

RF Amplifier Design Project

Amplifier design passive bias network stability analysis of BJT (k-factor) no feed-back (S12=0) -> unilateral design class A (low-efficiency) BJT configuration S-parameter description (given bias, frequency) discrete, two-element matching networks

EE3113_L26 3

Results of constant gain analysis0.2

0.5

1.0

2.0

5.0

+0.2

-0.2

+0.5

-0.5

+1.0

-1.0

+2.0

-2.0

+5.0

-5.0

0.0

-1dB

0dB0.2dB

GGS opt

= S11*

0.2

0.5

1.0

2.0

5.0

+0.2

-0.2

+0.5

-0.5

+1.0

-1.0

+2.0

-2.0

+5.0

-5.0

0.0

-1dB

0dB

0.5dB

GGL opt

= S22*

Input gain circles Output gain circles

EE3113_L26 4

Required Matching Networks0.2

0.5

1.0

2.0

5.0

+0.2

-0.2

+0.5

-0.5

+1.0

-1.0

+2.0

-2.0

+5.0

-5.0

0.0

0.2dB

0.2

0.5

1.0

2.0

5.0

+0.2

-0.2

+0.5

-0.5

+1.0

-1.0

+2.0

-2.0

+5.0

-5.0

0.0

0.5dB

Input matching network Output matching network

L, C elements

EE3113_L26 5

What to do next?

Additional design improvements multi-stage (dual) configuration microstriplinerealization triple and higher order matching network electric circuit transistor model with feed-back

(bilateral design approach)

EE3113_L26 6

Most recent MQP project

EE3113_L26 7

Actual realization

EE3113_L26 8

Circuit board cutter

EE3113_L26 9

EE 3113 COURSE GOALS MATCHING NETWORK STRATEGY

input matching conjugate complex output matching

TRANSISTOR & DIODE CHARACTERIZATION S-parameter description (supplied by manufacturer) small signal, RF circuit model (BJT, GaAs FET, PIN,

Schottkydiode) DC biasing

NETWORK DESCRIPTION two-port model (S-parameter, Z, Y, hybrid, etc.)

EE3113_L26 10

SIGNAL FLOW CHART MODELING S-PARAMETER THEORY

definitions (based on matched port terminations) measurements with network analyzer

SMITH CHART reflection coefficient/impedance representation impedance transformation as a function of either

length or frequency

TRANSMISSION LINE FUNDAMENTALS distributed circuit theory loaded and source transmission line

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Documents

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high frequency results

outside rf

rfcircuit designlecture

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spatial voltage variations

lumped circuit representation

current distribution