12/6/2004ee 42 fall 2004 lecture 401 lecture #40: review of circuit concepts this week we will be...
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12/6/2004 EE 42 fall 2004 lecture 40 1
Lecture #40: Review of circuit concepts
• This week we will be reviewing the material learned during the course
• Today: review– passive devices– circuit concepts– Load lines – RC transients
12/6/2004 EE 42 fall 2004 lecture 40 2
BRANCHES AND NODES
Circuit with several branches connected at a node:
branch (circuit element)
3i2i
4i1i
(Sum of currents entering node) (Sum of currents leaving node) = 0
q = charge stored at node is zero. If charge is stored, for example in a capacitor, then the capacitor is a branch and the charge is stored there NOT at the node.
KIRCHOFF’s CURRENT LAW
12/6/2004 EE 42 fall 2004 lecture 40 3
GENERALIZATION OF KCL TO SURFACES
Sum of currents entering and leaving any “black box” is zero
Could be a big chunk of circuit in here, e.g., could be a “Black Box”
In other words there can be lots of nodes and branches inside the box.
12/6/2004 EE 42 fall 2004 lecture 40 4
KIRCHHOFF’S CURRENT LAW USING SURFACES
Example
iA 2A 5
entering leaving5 A
2 A i = ?
surface
i must be 50 mA
50 mA
i?
Another example
i=7A
12/6/2004 EE 42 fall 2004 lecture 40 5
BRANCH AND NODE VOLTAGES
The voltage across a circuit element is defined as the difference between the node voltages at its terminals
Specifying node voltages: Use one node as the implicit reference (the “common” node … attach special symbol to label it)Now single subscripts can label voltages:
e.g., vb means vb ve, va means va ve, etc.
c
e
v2v1
d
a
b
+
+
0ve (since it’s the reference)
ad2 vvv
select as ref. “ground”
12/6/2004 EE 42 fall 2004 lecture 40 6
KIRCHHOFF’S VOLTAGE LAW (KVL)
The algebraic sum of the “voltage drops” around any “closed loop” is zero.
Voltage drop defined as the branch voltage if the + sign is encountered first; it is (-) the branch voltage if the sign is encountered first … important bookkeeping
Why? We must return to the same potential (conservation of energy).
+
-
V2
Path“rise” or “step up”(negative drop)
+
-
V1
Path
“drop”
Closed loop: Path beginning and ending on the same node
12/6/2004 EE 42 fall 2004 lecture 40 7
FORMAL CIRCUIT ANALYSIS USING KCL:NODAL ANALYSIS
2 Define unknown node voltages (those not fixed by voltage sources)
1 Choose a Reference Node
4 Solve the set of equations (N equations for N unknown node voltages)
3 Write KCL at each unknown node, expressing current in terms of the node voltages (using the constitutive relationships of branch elements)
12/6/2004 EE 42 fall 2004 lecture 40 8
NODAL ANALYSIS USING KCL–Example: The Voltage Divider –
1 Choose reference node
2 Define unknown node voltages
V2
3 Write KCL at unknown nodes
2
2
1
2SS
R0V
RVV
4 Solve:
21
2SS2 RR
RVV
+
V2
R1
VSS+
i2
i1
R2
This is of course the voltage divider formula and is by itself very useful.
12/6/2004 EE 42 fall 2004 lecture 40 9
GENERALIZED VOLTAGE DIVIDER(solved without Nodal Analysis)
Circuit with several resistors in series
R 2
R 1
VSS
I
R 3
R 4
+
+
+
V1 ?
V3?
• We know
)RRR/(RVI 4321SS
• Thus,
SS4321
11 V
RRRRR
V
and
SS4321
33 V
RRRRR
V
etc.. etc..
12/6/2004 EE 42 fall 2004 lecture 40 10
WHEN IS VOLTAGE DIVIDER FORMULA CORRECT?
R2
R1
V SS
I
R3
R4
+
+
SS
4321
22
V
RRRR
RV
Correct if nothing elseconnected to nodes
3
VSS
I
R2
R1
R3
R4
+
+ZV
R5i
X
SS4321
2Z V
RRRRR
V
because R5 removes condition ofresistors in series – i.e. Ii3
What is VZ?Answer:
SS43521
2 V)RR(RRR
R
V2
12/6/2004 EE 42 fall 2004 lecture 40 11
RESISTORS IN PARALLEL
R2R1 ISS
I2I12 Define unknown node voltages
VX
1 Select Reference Node
21
SSX
R1
R1
1IV
Note: Iss = I1 + I2, i.e.,
2
X
1
XSS R
VRV
I 21
21SS RR
RRI
RESULT 1 EQUIVALENT RESISTANCE:21
2121|| RR
RRR||RR
RESULT 2 CURRENT DIVIDER:
21
1SS
2
X2
21
2SS
1
X1
RRR
I RV
I
RRR
IRV
I
12/6/2004 EE 42 fall 2004 lecture 40 12
IDENTIFYING SERIES AND PARALLEL COMBINATIONSUse series/parallel equivalents to simplify a circuit before starting KVL/KCL
1R
2R3R
eqR
+
V
I
R
R
R
R
2
1
4
R3
R65
K 10RR 21
K20R3
K55R4
K10R6
+
I
RX ?
654321X R||)R(RR||)R(RR K15
21 RR 3R parallel
eq321 RR||)RR(
12/6/2004 EE 42 fall 2004 lecture 40 13
IDENTIFYING SERIES AND PARALLEL COMBINATIONS(cont.)
Some circuits must be analyzed (not amenable to simple inspection)
-
+ R2
R1
V
I
R4
R3
R5
Special cases:R3 = 0 OR R3 =
R1 and R5 are not in series
R1 and R2 are not in ||
OR IF R3 = (R1 + R5) || (R2 + R4)
R1
+
R4R5
R2
V R3
Req = R1 || R2 + R4 || R5
Example: R3 = 0 R1 || R2; R4 || R5 in series;
12/6/2004 EE 42 fall 2004 lecture 40 14
TWO-TERMINAL LINEAR RESISTIVE NETWORKS(“One Port” Circuit)
Model of two-terminal linear resistive elements with only two “accessible” terminals
Replace a complicated circuit with a simple model
+ a
b
12/6/2004 EE 42 fall 2004 lecture 40 15
BASIS OF THÉVENIN THEOREM
• All linear one-ports have linear I-V graph
• A voltage source in series with a resistor can produce any linear I-V graph by suitably adjusting V and I
We define the voltage-source/resistor combination that replicates the I-V graph of a linear circuit to be the Thévenin equivalent of the circuit. The voltage source VT is called the Thévenin equivalent voltage and the resistance RT is called the Thévenin equivalent resistance.
THUS
12/6/2004 EE 42 fall 2004 lecture 40 16
I-V CHARACTERISTICS OF LINEAR TWO-TERMINAL NETWORKS
i
+
v
+
5V
Apply v, measure i, or vice versa
5
.5
1
v(V)
-.5
i(mA)
-1
Associated(i defined in)
5K
Associated
What is the easy way to find the I-V graph?
First find open-circuit V
v=5V if i = 0
Now find Short-circuit I
i = -1mA if v = 0
12/6/2004 EE 42 fall 2004 lecture 40 17
I-V CHARACTERISTICS OF LINEAR TWO-TERMINAL NETWORKS
5
.5
1
v(V)
-.5
i(mA)
-1
If V = 2.5V
If R = 2.5K
i
+
v
+
5V
Apply v, measure i, or vice versa
Consider how the graph changes with differences in V and R.
First consider change in V, eg V= 2.5V, not 5V
5K
Now consider change in R (with V back at 5V)
Clearly by varying V and R we can produce an arbitrary linear graph … in other words this circuit can produce any linear graph
12/6/2004 EE 42 fall 2004 lecture 40 18
Thévenin Equivalent Circuit
+
VT
RT i+
V
Any linear circuit
i+
V
This circuit is equivalent to any circuit, that is by suitably choosing VT and RT it will have the same I-V graph
So how do we choose VT and RT ?
12/6/2004 EE 42 fall 2004 lecture 40 19
NORTON EQUIVALENT CIRCUIT
Corollary to Thévenin: current)circuit -(short II SCN
RN is found the same way as for Thévenin equivalent
RNIN
(associated)
i
+ V -
12/6/2004 EE 42 fall 2004 lecture 40 20
EXAMPLE 1, Continued
In what sense is this circuit
B
A
2 K
+ 2 V
2 K
1K
1V
B
A
+ -
1 K1 mA
B
A
They have identical I-V characteristics and therefore have
The same open circuit voltage
The same short circuit current
For any voltage, they will produce the same current
And visa versa
equivalent to these?
12/6/2004 EE 42 fall 2004 lecture 40 21
Load line method
We can find the currents and voltages in a simple circuit graphically. For example if we apply a voltage of 2.5V to the two resistors of our earlier example:
We draw the I-V of the voltage and the I-V graph of the two resistors on the same axes. Can you guess where the solution is?
At the point where the voltages of the two graphs AND the currents are equal. (Because, after all, the currents are equal, as are the voltages.)
1K
4K2.5V
+
-
Combined 1K + 4K
I
2
4
(ma)
V (Volt)5
2.5VSolution: I = 0.5mA, V = 2.5V
I
+
-
V
12/6/2004 EE 42 fall 2004 lecture 40 22
Another Example of the Load-Line MethodLets hook our 2K resistor + 2V source circuit up to an LED (light-emitting diode), which is a very nonlinear element with the IV graph shown below. Again we draw the I-V graph of the 2V/2K circuit on the same axes as the graph of the LED. Note that we have to get the sign of the voltage and current correct!!
I
2
4
(ma)
V (Volt)5
Solution: I = 0.7mA, V = 1.4V
I
+
-
V
+
-2V
2K
LEDLED
At the point where the two graphs intersect, the voltages and the currents are equal, in other words we have the solution.
12/6/2004 EE 42 fall 2004 lecture 40 23
Simplification for time behavior of RC Circuits Before any input change occurs we have a dc circuit
problem (that is we can use dc circuit analysis to relate the output to the input).
We call the time period during which the output changes the transient
We can predict a lot about the transient behavior from the pre- and
post-transient dc solutions
time
volt
age
input
time
volt
age
output
Long after the input change occurs things “settle down” …. Nothing is changing …. So again we have a dc circuit problem.
12/6/2004 EE 42 fall 2004 lecture 40 24
RC RESPONSE
• Vin “jumps” at t=0, but Vout cannot “jump” like Vin. Why not?
Case 1 – Rising voltage. Capacitor uncharged: Apply + voltage step
Because an instantaneous change in a capacitor voltage would require instantaneous increase in energy stored (1/2CV²), that is, infinite power. (Mathematically, V must be differentiable: I=CdV/dt)
Input node Output node
ground
R
CVin
Vout+
-
V does not “jump” at t=0 , i.e. V(t=0+) = V(t=0-)
time
Vin
0
0
V1
Vout
The dc solution before the transient tells us the capacitor voltage at the beginning of the transient.
12/6/2004 EE 42 fall 2004 lecture 40 25
RC RESPONSECase 1 Continued – Capacitor uncharged: Apply voltage step
After the transient is over (nothing changing anymore) it means d(V)/dt = 0 ; that is all currents must be zero. From Ohm’s law, the voltage across R must be zero, i.e. Vin = Vout.
• Vout approaches its final value asymptotically (It never actually gets exactly to V1, but it gets arbitrarily close). Why?
That is, Vout V1 as t . (Asymptotic behavior)
time
Vin
0
0
V1
Vout
Input node Output node
ground
R
CVin
Vout+
-
Again the dc solution (after the transient) tells us (the asymptotic limit of) the capacitor voltage during the transient.
12/6/2004 EE 42 fall 2004 lecture 40 26
RC RESPONSEExample – Capacitor uncharged: Apply voltage step of 5 V
• We know this because of the pre-transient dc solution (V=0) and post-transient dc solution (V=5V).
• Clearly Vout starts out at 0V ( at t = 0+) and approaches 5V.
time
Vin
0
0
5
Vout
Input node Output node
ground
R
CVin
Vout+
-
So we know a lot about Vout during the transient - namely its initial value, its final value , and we know the general shape .
12/6/2004 EE 42 fall 2004 lecture 40 27
Review of simple exponentials.
Rising Exponential from Zero Falling Exponential to Zero
at t = 0, Vout = 0 , and
at t , Vout V1 also
at t = , Vout = 0.63 V1
8 at t = 0, Vout = V1 , and
at t , Vout 0, also
at t = , Vout = 0.37 V1
8
time
Vout
00
V1
.63V1
Vout
V1
time00
.37V1
Vout = V1(1-e-t/) Vout = V1e-t/
12/6/2004 EE 42 fall 2004 lecture 40 28
Further Review of simple exponentials.
Rising Exponential from Zero Falling Exponential to Zero
We can add a constant (positive or negative)
.63V1+ V2
Vout
0
V1 + V2
time0
V2
time
Vout
00
V1 + V2
.37V1 + V2
V2
Vout = V1(1-e-t/) Vout = V1e-t/
Vout = V1(1-e-t/) + V2 Vout = V1e-t/ + V2
12/6/2004 EE 42 fall 2004 lecture 40 29
Further Review of simple exponentials.Rising Exponential Falling Exponential
Both equations can be written in one simple form:
Thus: if B < 0, rising exponential; if B > 0, falling exponential
Initial value (t=0) : Vout = A + B. Final value (t>>): Vout = A
time
Vout
00
A+B
A
Here B > 0
Vout
0
A
time0
A+B
Here B < 0
Vout = V1(1-e-t/) + V2Vout = V1e-t/ + V2
Vout = A + Be-t/
12/6/2004 EE 42 fall 2004 lecture 40 30
LOGIC GATE DELAY DTime delay D occurs between input and output: “computation” is not instantaneous Value of input at t = 0+ determines value of output at later time t = D
A
B
F
0
1
1
0
Logic State
t
t
D0
0
Input (A and B tied together)
Output (Ideal delayed step-function)
Actual exponential voltage versus time.
Capacitance to Ground
F
12/6/2004 EE 42 fall 2004 lecture 40 31
t
t
t
Logic state
2
0
SIGNAL DELAY: TIMING DIAGRAMS
Show transitions of variables vs time
1
0
t 2 3
Note that C changes two gate delays after A switches.
Note B changes one gate delay after A switches
A B C D
A
B
D
C
Note that D changes three gate delays after A switches.
Oscilloscope Probe