14 lead lag

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Prof. Xun Yu

Department of Mechanical and Industrial Engineering

University of Minnesota, Duluth

14: Lead and Lag compensators

Chap 14.6, and Page 508-526

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Open-loop freq response & Stability

For many real applications,you may not able to findthe mathematical modelsfor the plant, and you willnot able to find the rootlocus.

But, we typically can

experimentally find the open-loop frequency response (bode plot).

How will you design thecontroller?

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Open-loop freq response & Stability

Stable K<2

Open-loop frequency responseExample 2

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Phase and Gain Margin

Phase Margin (PM): angle+180°, when gain=0dB

Gain Margin (GM): 0 – magnitude in dB, when Φ =180°

Positive PM and GM are required for system stability.

Typically: PM> 40°, GM > 10dB

Gain crossover

phasecrossover

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PM and system closed-loop performance

Relationship between PM and closed-loopperformance

Eg: open-loop is a 2nd order sys.

closed-loop freq. response for different PM

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D and I control actions

PD : Adds phase

but increasegain in highfreq.

PI :Smaller gain inhigh freq.

But decreasephase

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Lead and Lag compensators

T s

aT s

C 1

1

+

+

=

Compensator

a>1: lead a<1: lag

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Bode design of lead compensator

m

m

m

m

a

a

a

aT

φ

φ

φ

ω

sin1

sin1

1

1sin

1

−

+=

+

−=

=

1

1

1

1

+

+=

+

+

=

Ts

aTsK

T s

aT s

K C p

Lead Compensator:

(a>1)

1: Determine Kp to satisfy stead state error requirement

or bandwidth requirements

Design steps:

2: Evaluate the phase margin (PM) of the uncompensated system usingthe Kp value in the first step. (plot the bode plot)

3. Allowing for extra 10° margin, determine the needed phase lead Φ m

4. Determine a value from the equation

5. Pick ω m at the crossover frequency. (thus your T is also determined)

6. Draw the compensated frequency response and check the PM

7. Iterate the design, adjust the compensator parameters until meet thespecifications, add another compensator if necessary.

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Bode design of lag compensator

1

1

1

1

+

+=

+

+

=

Ts

aTsKp

T s

aT s

K C

Lag Compensator:

1: Determine Kp to satisfy stead state error requirementor bandwidth requirements

Design steps:

2: Construct the uncompensated system using the Kp value in the firststep. (plot the bode plot)

3. From the bode plot of the uncompensated system, find the frequency

(named as ω’ g)that has the desired phase margin (PM), and determinehow many dB are required to lower the gain to 0 dB. Let this dB numberis m’ >0, then

a = 10 -m’/20

4. Place the frequency 1/aT one decade below the ω’ g ( 0.1* ω’ g )

5. Iterate the design, adjust the compensator parameters until meet thespecifications, add another compensator if necessary.

a<1

14 lead lag

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