2 basic logic gate

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    Should be able to:

    Describe the operation and use of AND andOR gates

    Construct truth table for 2, 3 and 4 input ANDand OR gates

    Draw timing diagrams for AND and OR gates

    Describe the opration, using timing analysis, ofan enable function

    1

    Basic Logic Gates

    Objectives

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    AND Gate

    OR Gate Timing Analysis Enable and Disable Functions

    2

    Outlines

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    A B X

    0 0 0

    0 1 01 0 0

    1 1 1

    3

    Manual & Diodeswitches Truth Table

    BooleanequationX = A.B

    AND Gate

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    4

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    5

    Manual & Transistor switches Truth Table

    BooleanequationX = A + B

    A B X

    0 0 0

    0 1 1

    1 0 1

    1 1 1

    OR Gate

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    6

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    Number of inputs to a logic gate Number of combinations 2n

    Examples forAND function

    n = 2: Y = A B

    n = 3: Y = A B C

    n = 4: Y = A B C D

    7

    Fan-In

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    Useful for visually illustratingthe level attheoutputfor varyinginput-level changes

    Timingwaveformsobservedon anoscilloscopeor a logic analysis

    8

    Timing Analysis

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    Sketch the output waveform

    at X for the three-input AND

    gate shown, with the given

    A, B and C input waveforms

    The input waveform at A

    and the output waveform at

    X are given for the ANDgate. Sketch the input

    waveform that is required at

    B to produce the output at X

    9

    example

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    AND andORgatescanbe usedtoenable/disable a waveformfrombeingtotransmittedfromonepointto another

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    Enable and Disable Functions

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    Using an AND gatetoenable/disable a clockoscillator Active High, 1 enable

    11

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    Using anORgatetoenable/disable a clockoscillator

    Active Low, 0 enable

    12

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    1. Understand the theory and operation of the

    circuit, devices and ICs

    2. Use Logic Pulser and Logic Probe Logic probe state

    Logic

    level

    Indicator

    lamp

    HIGH (1) On

    LOW (0) Off

    Float Dim

    13

    Introduction to

    Troubleshooting Techniques

    Logic probe

    Logic pulser

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    The clock enable circuit shown in figure is not working. The

    enable switch is up in the enable position. A logic probe is

    placed on the following pins and gets the following results. Findthe cause of the problem.

    14

    Probe on pin Indicator lamp Indicator lamp

    1 Flashing Flashing

    2 On Off

    3 Off Off

    7 Off Off

    14 On On

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    example

    An OR gate can be used in all those situations where the occurrence of any one

    or more than one event needs to be detected or acted upon. One such example is

    an industrial plant where any one or more than one parameter exceeding a preset

    limiting value should lead to initiation of some kind of protective action. Figure

    below shows a typical schematic where the OR gate is used to detect either

    temperature or pressure exceeding a preset threshold value and produce the

    necessary command signal for the system.

    15

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    PIN Logic level

    1 HIGH

    2 LOW

    3 LOW

    4 LOW

    5 LOW

    6 HIGH

    7 LOW

    8 HIGH

    9 LOW

    10 LOW

    11 LOW

    12 LOW

    13 HIGH

    14 HIGH

    16

    Power

    supply

    +

    -

    The following data table was built by putting a

    logic probe on every pin of the hex inverter.Are there any problems with the chip? if so,

    which gate(s) are bad?

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    17

    Power

    supply

    Logicprobe

    The logic probe is always OFF

    whether the switch is in the up or

    down position. Is the problem with

    the inverter or the NOR, or there

    is no problem?

    If the logic probe come ON when

    the switch is in the down position.

    Further testing with the probe

    shows that pins 2 and 3 of the

    NOR IC are both LOW. Isanything wrong? If so where is the

    fault?

    quiz