292 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 53, NO. 1, JANUARY 2005

A Highly Efficient Doherty FeedforwardLinear Power Amplifier for W-CDMA

Base-Station ApplicationsKyoung-Joon Cho, Jong-Heon Kim, Member, IEEE, and Shawn P. Stapleton

Abstract—This paper presents a RF high-power Dohertyamplifier for improving the efficiency of a 30-W feedforwardlinear amplifier used in wide-band code-division multiple-access(W-CDMA) base-station applications. A high-power Dohertyamplifier using a single push–pull LDMOS field-effect transistoris proposed as the main amplifier of a feedforward linear amplifier.The peaking amplifier’s compensation line and gate bias effects areanalyzed at the 6-dB backoff point. From the experimental resultsof a forward-link one-carrier W-CDMA, a 2.2% power-added ef-ficiency improvement at an adjacent channel leakage power ratiolinearity of 60 dBc is achieved in comparison to a conventionalfeedforward class-AB amplifier.

Index Terms—Doherty amplifier, efficiency enhancement, feed-forward linear amplifier, wide-band code division multiple access(W-CDMA).

I. INTRODUCTION

CURRENTLY, multichannel high-power power amplifiers(MCPAs) for repeater and base-station applications have

the continual challenge of improving the dc to RF powerefficiency. Power-amplifier efficiency, unlike linearity, is nota specified factor in the design of these applications. Moderndigital communications standards, such as IS-95 and wide-bandcode division multiple access (W-CDMA), can require a highpeak-to-average power ratio (PAR) over a 10-dB backoff,which considerably deteriorates the available power-amplifierefficiency.

Output power levels and demands on efficiency and linearityof power amplifiers are significantly different for handset andbase-station applications. The power amplifier is dependent onthe available battery power in handset applications, where thedemands on the required power and linearity are modest in com-parison to base-station applications. The power amplifier hashigher output power and more stringent linearity requirementsin repeater and base-station applications, although their effi-ciency is significantly decreased. A low efficient MCPA neces-

Manuscript received April 21, 2004; revised August 23, 2004. This work wassupported by the Ministry of Information and Communication of Korea underthe Support Project of University Information Technology Research Center.

K.-J. Cho was with the Department of Radio Science and Engineering,Kwangwoon University, Seoul 139-701, Korea. He is now with the School ofEngineering Science, Simon Fraser University, Burnaby, BC, Canada V5A1SA (e-mail: kyoung_cho@sfu.ca).

J.-H. Kim is with the Department of Radio Science and Engineering,Kwangwoon University, Seoul 139-701, Korea (e-mail: jhkim@kw.ac.kr).

S. P. Stapleton is with the School of Engineering Science, Simon FraserUniversity, Burnaby, BC, Canada V5A 1SA (e-mail: shawn@sfu.ca).

Digital Object Identifier 10.1109/TMTT.2004.839341

sitates the use of additional heat sinking or external cooling dueto the high RF power levels and inherent high temperatures.Large ac/dc and dc/dc power supplies are also required to feedelectrical power to the RF power amplifier. The efficiency ofthe amplifier has a direct bearing on the size and cost of thesecomponents.

To obtain the high efficiency at a high backoff state, numerousefficiency boosting techniques such as envelope elimination andrestoration (EER) (or Kahn) [1], [2], envelope tracking [3], en-velope following [4], linear amplification using nonlinear com-ponents (LINC) [5], and Doherty have been proposed [6].

EER is based on characterization of single-sideband (SSB)signals as independent amplitude- and phase-modulation sig-nals. This technique has the advantage of high efficiency andreasonable linearity over a wide dynamic range. However, ithas numerous drawbacks, such as circuit complexity and beinglimited to narrow-band applications. To date, the EER tech-nique, with feedback, has only been demonstrated for a 30-kHzbaseband application like North American digital cellular(NADC). Both envelope following and tracking techniquesmodulate the power supply voltage of the power amplifier byusing a similar approach to the EER technique. In general,a feedback loop is used, which samples the envelope of thepower-amplifier output signal and compares it to the envelopeof the input signal. However, it is difficult to produce a class-Smodulator with a sufficient high switching frequency for widerbandwidth signals such as W-CDMA. The LINC techniqueconverts the input signal into two constant envelope signals thatare amplified by class-C amplifiers and then combined beforetransmission. LINC is sensitive to component drift and requiresa lossless hybrid combiner.

The primary advantages of the Doherty technique are its:1) circuit simplicity; 2) ease of configuration; and 3) wide band-width when compared with conventional efficiency-boostingtechniques [6], [7]. Previous papers have focused on the anal-ysis and realization of the Doherty amplifier for low-powerhandset applications (i.e., below 30 dBm) [8], [9]. Althoughsome papers have reported its use in single-ended high-powerfield-effect transistors (FETs) [10], -way combining config-urations [11] or harmonic filter technique [12], these methodshad drawbacks because of their size and complexity. Moreover,these Doherty amplifier configurations could not achieve anaccurate peaking point at 6-dB backoff [10], [11]. Recentresults [11] have reported that the efficiency and linearity of theDoherty amplifier can be simultaneously improved. However,the linearity specifications required for W-CDMA base stations

0018-9480/$20.00 © 2005 IEEE

CHO et al.: HIGHLY EFFICIENT DFF LINEAR POWER AMPLIFIER 293

cannot be met by a Doherty amplifier without any externallinearization.

A highly efficient feedforward amplifier using a class-F Do-herty amplifier has recently been reported [12]. The Suzuki et al.paper does not demonstrate the classical Doherty power-addedefficiency (PAE) peaking as one would expect to achieve. Someadditional limitations of [12] are its low-power application,bulky size, complexity, and narrow bandwidth due to the use ofthe harmonic filter circuit.

In this paper, we propose a highly efficient feedforward am-plifier using a RF high-power Doherty amplifier, which gener-ally has a low PAE of 6%–10%. The proposed Doherty amplifierutilizes a single push–pull packaged LDMOS FET. A peakingpoint with maximum efficiency is achieved through optimiza-tion of: 1) the gate bias of the peaking amplifier and 2) the lengthof the peaking compensation line. This high-power Doherty am-plifier is used as the main amplifier in a 30-W feedforwardlinear power amplifier for W-CDMA base-station application.In Section II, the operation principles of the proposed Dohertyamplifier and its peaking point optimization are presented andthe efficiency of Doherty feedforward (DFF) linear amplifier ispredicted in Section III. In Section IV, the design and simulationof the feedforward linear amplifier combined with the Dohertyamplifier are introduced. The experimental results are presentedin Section V.

II. HIGH-POWER DOHERTY AMPLIFIER

A. LDMOS Device for Doherty Amplifier

RF Si LDMOS is a modified -channel MOSFET specificallydesigned for power-amplifier applications. Using a laterally dif-fused p-type implant to create the transistor channel, high supplyvoltages can be tolerated without premature punch through orbreakdown occurring during large-signal swings. RF LDMOSFETs have emerged as the dominant base-station amplifier de-vice, providing high gain and good linearity compared to othersemiconductor devices.

Previous high-power Doherty amplifiers have been designedby using two single-ended RF LDMOS FETs for achievinghigh-output power (i.e., above 10 W), as shown in Fig. 1(a) [10].The disadvantages of this amplifier are the circuit complexityand large size. In this paper, we propose a high-power Dohertyamplifier structure, which uses a push–pull RF LDMOS FET,as shown in Fig. 1(b). Although the push–pull FET is recom-mended for class-AB push–pull operation, Doherty operationcan be obtained by modifying the microstrip lines at theinput and output of the push–pull structure. The size of asingle-ended RF LDMOS FET is 34 14 mm and that of apush–pull FET is 41 10 mm. If a 30-W Doherty amplifieris designed by these devices, four single-ended devices arerequired, as compared to two push–pull devices. This reducesthe Doherty amplifier size by more than 50%.

B. Peaking Compensation Line

The low-power Doherty amplifier application did not requireinput and output impedance matching networks and aimpedance transformer was only needed for obtaining the peakefficiency point at a specific output backoff point [8]. Fig. 2(a)

Fig. 1. Schematic diagram of the Doherty amplifier: (a) using twosingle-ended FETs and (b) using a push–pull FET.

Fig. 2. (a) Schematic diagram and (b) output impedance transformation of theDoherty amplifier for low-power application.

and (b) shows the schematic diagram and output impedancetransformation of a low-power Doherty amplifier (i.e., below30 dBm). The low-output impedance of the main amplifier

is transformed to a high-output impedance of the peakingamplifier by a impedance transformer. It is assumedthat has no reactive component.

294 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 53, NO. 1, JANUARY 2005

Fig. 3. (a) Schematic diagram and (b) output impedances of the Dohertyamplifier using an LDMOS FET for high-power application.

Input and output matching networks are necessary in the caseof high-power Doherty amplifiers that use LDMOS FETs. Inaddition, the impedance transformation from the low to highimpedance is not directly achieved using only a impedancetransformer. Fig. 3(a) and (b) shows the schematic diagram andimpedance relation between the main and peaking amplifier,respectively. The input and output impedance of high-powerLDMOS FET is low, necessitating the use of matching circuits.To transform the low-output impedance of the main amplifier tothe high-output impedance of the peaking amplifier, compen-sation lines and must be inserted along with aimpedance transformer. As shown in Fig. 3(b), the peaking am-plifier has a low-output impedance without the peaking com-pensation lines and, therefore, the output power of the main am-plifier could not be fully delivered to the load. Thus, the peakingcompensation line is necessary to prevent leakage power fromthe main amplifier into the peaking amplifier.

Fig. 4(a) and (b) shows the peaking amplifier schematicand output impedance, on a Smith chart, for determiningthe peaking compensation line and optimum high resistance,respectively. To find the optimum length of the peakingcompensation line and the optimum high resistance ,the output impedance of the peaking amplifier must beobtained. The output impedance moves clockwise through aconstant- circle until the output impedance intersects the realaxis of . This intersected point is the optimum highresistance . The output impedance without the lineis given by , and the corresponding reflectioncoefficient can be easily found as

(1)

Fig. 4. (a) Schematic of peaking amplifier and (b) output impedances fordetermining the peaking compensation line and optimum high resistance.

Therefore, the optimum length of the peaking compen-sation line can be obtained by

(2)

where is the phase constant in radians/unit length ,is the wavelength, and is the phase in degrees.

C. Efficiency for Different Bias Conditions

The ideal Doherty amplifier assumes that both the main andpeaking amplifiers are simultaneously in class-B operation. Inpractical cases, however, the main amplifier is normally biasedin class AB in order to improve linearity and the peaking am-plifier is biased in class C so that the peaking amplifier turns onwhen the main amplifier reaches saturation. The gain expansionof the class-C peaking amplifier compensates for the gain com-pression of the class-AB carrier amplifier.

The efficiency of the ideal Doherty amplifier was already for-mulated by Cripps [5] and Raab [13]. To consider the efficiencyof a practical Doherty amplifier with class-AB main amplifier(CMA) and class-C peaking amplifier, we assume that the con-duction angle of class AB and class C is and , re-spectively. The dc currents are given by

(3)

Class AB

Class C

(4)

CHO et al.: HIGHLY EFFICIENT DFF LINEAR POWER AMPLIFIER 295

Fig. 5. Efficiencies of the Doherty amplifiers using different bias conditions.

Using as a function of the conduction angle, the RFoutput power at medium power levels can be written by

(Class AB)

(5)where is the input voltage drive amplitude and is max-imum voltage amplitude. (Class AB) and (Class C) arethe dc currents for the conduction angles of the class-AB andclass-C amplifiers, respectively. The dc powers consumed bythe main and peaking amplifier in this region are given by

(Class AB) (6)

(Class C) (7)

Therefore, total efficiency of the Doherty amplifier is givenby

(8)

Fig. 5 shows a Doherty amplifier in comparison with class-Aand class-B amplifiers over a nominal 6-dB backoff. Formedium power levels [from 6-dB backoff to peak envelopepower (PEP)], the efficiency of a Doherty II with a class-Cpeaking amplifier is higher than that of a Doherty III with aclass-B peaking amplifier. This insures that the efficiency char-acteristics of a Doherty amplifier can be adjusted via biasingthe peaking amplifier and its input drive level.

III. EFFICIENCY OF A DFF LINEAR AMPLIFIER

In order to maximize the efficiency of the feedfoward linearpower amplifier, the Doherty amplifier is used as the main am-plifier in the feedforward system. Fig. 6 shows a block diagramof a DFF linear amplifier, and its total efficiency can be writtenas a function of five dominant parameters [14]

(9)

Fig. 6. Block diagram of the DFF linear amplifier.

Fig. 7. Efficiency of DFF amplifier as various parameters (� , � , and P ).

where and are the efficiency of the main anderror amplifiers, respectively. dB is the third-order in-termodulation distortion (IMD) characteristics of the Dohertyamplifier. dB is the coupling coefficient of the outputcoupler. dB is the total loss including a delay-line loss andinsertion loss of the couplers at the main amplifier output.

For the analysis of the effect of the Doherty amplifier on theefficiency of the feedfoward amplifier, the parameters , ,and are varied and of 10 dB and of 1.5 dB are con-sidered fixed parameters. Fig. 7 shows the calculated efficiencyof the DFF amplifier. The third-order IMD is a critical pa-rameter for achieving high efficiency since the efficiency of theerror amplifier is strongly influenced by this parameter. If thethird-order IMD of the main amplifier is less than 20 dBc, thetotal efficiency of the DFF amplifier rapidly decreases.

Assuming that the efficiency of the Doherty amplifier is 36%at 10-dB backoff, is 40 dBc and is 5%, the total calcu-lated efficiency of the DFF amplifier is 22.9%. If the efficiencyof the main amplifier is 23%, as for a class-AB amplifier, 14.6%DFF amplifier efficiency is achieved.

IV. DESIGN AND SIMULATION

To design a high-power Doherty amplifier for base-stationapplications, some distinguishing characteristics are describedin this paper as follows:

1) selection of high-power LDMOS FET with a push–pullstructure;

2) adjustment of gate bias of peaking amplifier in class-Coperation;

296 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 53, NO. 1, JANUARY 2005

Fig. 8. Schematic diagram of a new balanced high-power Doherty amplifier.

Fig. 9. (a) Voltages and (b) currents of the main and peaking amplifiers.

3) adjustment of lengths of peaking compensation lines forachieving a peaking point;

4) optimization for a peaking point and adjacent channelleakage power ratio (ACLR).

A. High-Power Doherty Amplifier

Fig. 8 shows the schematic diagram for a balancedhigh-power Doherty amplifier proposed in this paper. TheDoherty amplifier is designed by using a push–pull packaged

Fig. 10. Efficiency of the high-power Doherty amplifier.

Fig. 11. (a) Leakage currents of the peaking amplifier. (b) Efficiencies of theDoherty amplifier with the variations of the compensation line length.

MRF5P21180 with dB of 180 W. One device is used as themain amplifier, while the other is the peaking amplifier. A 90hybrid coupler is used to achieve the 90 phase shift at thepeaking amplifier. The peaking compensation lines are insertedso that the peaking amplifier presents a high impedance tothe main amplifier. Consequently, all power generated by themain amplifier is delivered to the output load during low-powerlevels.

CHO et al.: HIGHLY EFFICIENT DFF LINEAR POWER AMPLIFIER 297

Fig. 12. Leakage currents of the peaking amplifier. (b) Efficiencies of theDoherty amplifier with the variations of the bias voltage.

To find an optimum length of the peaking compensation line,the output impedance of the peaking amplifier is simu-lated as shown in Fig. 4(a). The output impedance

is obtained. The corresponding reflection coeffi-cient, from (1), is 0.709 108 . Therefore, an optimum length of

can be obtained by (2). This corresponds to an optimumhigh resistance 5.812 50 .

The simulation of Doherty circuits was performed usingAgilent ADS. An average power of 30 W at 10-dB backoff wasobtained using two Doherty amplifiers summed through a 90hybrid coupler.

Fig. 9(a) and (b) shows the voltages and currents of the mainand peaking amplifiers, respectively. Over the upper 47-dBmpower range, the voltage of the main amplifier is saturated andthe current in the peaking amplifier rapidly increases. The morethe leakage current is reduced, which is generated when thepeaking amplifier is turned on, more of a peaking point appears.

Fig. 10 shows the performance of the high-power Dohertyamplifier, at 6-dB backoff, an efficiency of 36% is obtained. Thisis an efficiency improvement of approximately 10% in compar-ison to the class-AB amplifier using the same LDMOS devices.

The effect of the variations of the peaking compensation linelength on the current of the peaking amplifier and the efficiencyof the Doherty amplifier is simulated. For the optimum compen-sation line length of 10 mm, the current of the peaking amplifier

Fig. 13. Lineup of a 30-W high-power Doherty amplifier for the feedfowardamplifier.

Fig. 14. Simulated ACLR of the DMA and DFF amplifier for a 1-FA WCDMAsignal.

Fig. 15. Simulated efficiencies of the CFF and DFF amplifier.

has a relatively low leakage current [see Fig. 11(a)]. Without thecompensation lines, there is a high leakage current, which is thereason for the lack of an efficiency peaking point. The optimizedefficiency peaking point at 6-dB backoff gradually disappears asthe compensation line length is reduced [see Fig. 11(b)].

Fig. 12(a) and (b) shows the leakage current of the peakingamplifier and the efficiencies under various gate-biasing condi-tions. As the gate bias of the class C is increased in 0.3-V steps

, the peak efficiency pointgradually disappears in the same manner as with the peakingcompensation line.

It is clear that the optimum compensation line length andoptimum bias voltage are the most critical parameters for the

298 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 53, NO. 1, JANUARY 2005

Fig. 16. Photograph of the fabricated: (a) Doherty amplifier and (b) DFFamplifier.

achieving the peak efficiency point of the Doherty amplifierdesign.

B. DFF Linear Amplifier

The feedforward linear amplifiers, as shown in Fig. 5, arealso simulated using Agilent ADS. For comparative purposes,the performances of the feedforward amplifier using a Dohertymain amplifier (DMA) and a conventional class-AB amplifierare designed and simulated. Fig. 13 shows the Doherty ampli-fier lineup for the feedforward amplifier. The drive amplifiersconsisted of three stages using MHL21336, MRF21010, andMRF21045 Motorola devices. An error amplifier of a feedfor-ward amplifier is also designed by using the same configurationof the drive amplifier.

Fig. 14 shows the simulated ACLRs of the DMA and DFFamplifier in the lower ( 5 MHz) and upper band ( 5 MHz), fora 1-FA WCDMA signal. At an average output power of 30 W,an ACLR of 60 dBc was achieved, with an ACLR improve-ment of 22 dB was achieved from the feedforward linearization.Consequently, the third-generation partnership project (3GPP)

Fig. 17. Measured PAE of the Doherty amplifier with the variations of: (a) thecompensation line length and (b) the bias voltage of the peaking amplifier.

Fig. 18. Measured PAE of the balanced class-AB amplifier and Dohertyamplifier.

ACLR specification, which is more than 45 dBc at 5-MHzoffset frequency, is satisfied by the feedforward linearizationtechnique. Fig. 15 shows the simulated efficiency of a class-ABfeedforward (CFF) amplifier along with a DFF amplifier. Theefficiency of the DFF amplifier improved by 2% in comparisonto the CFF at the output power of 30 W. Total current consump-tion is reduced by 2.02 A from 12.8 to 10.78 A.

CHO et al.: HIGHLY EFFICIENT DFF LINEAR POWER AMPLIFIER 299

Fig. 19. Measured ACLR characteristics of: (a) CFF amplifier and (b) DFFamplifier as a function of output power.

V. EXPERIMENTAL RESULTS

A Doherty amplifier and a class-AB amplifier using anMRF5P21180 were fabricated and measured at the frequencyband of 2140 MHz. Fig. 16(a) and (b) shows a photographof the high-power Doherty amplifier and the DFF amplifier atan output power of 30 W. The physical sizes of the Dohertyamplifier and DFF amplifier are 15 11 cm and 30 26 cm,respectively.

A. Single-Tone Test

The effect of the peaking compensation line length and thebias voltage variations, on the efficiency of the Doherty ampli-fier, is measured. The DMAs’ 13-dB gain is measured at a centerfrequency of 2140 MHz. Fig. 17(a) and (b) shows that the mea-sured results have the same tendency as the simulated results.The peak efficiency point is achieved through optimization ofthe compensation line length and the bias voltage of peaking am-plifier. The main amplifier is biased as class AB ( V,

mA) and the peaking amplifier operates in class CV . Fig. 18 shows the PAE comparison of a bal-

anced CMA with a balanced DMA. At an average output powerof 30 W, the PAE of the DMA improved by 9.1% in comparisonto the class-AB amplifier.

B. 1-FA Test

The fabricated high-power DMA and CMA are used ina feedforward linearizer. The test signal is a single carrier

Fig. 20. Measured linearization result of: (a) CFF amplifier and (b) DFFamplifier at 30-W 1-FA W-CDMA test.

Fig. 21. Measured PAE comparison of class-AB and DFF linear amplifier.

W-CDMA source centered at 2140 MHz with a channelspacing of 3.84 MHz. Fig. 19(a) and (b) shows the ACLR char-acteristics of the CFF and DFF amplifiers as a function of theoutput power, respectively. Using the feedforward linearizer,the ACLR characteristics of the Doherty amplifier improvedby over 20 dB at high-output power ranges. The ACLRs ofthe CMA, DMA, CFF, and DFF are measured at an offsetfrequency of 5 and 10 MHz, respectively.

300 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 53, NO. 1, JANUARY 2005

TABLE ICOMPARISON OF SIMULATED AND MEASURED RESULTS OF W-CDMA 1-FA

Fig. 20(a) and (b) shows the ACLR reduction of the CFFand DFF, at the 30-W operating point, using a 1-FA W-CDMAsignal. An ACLR of 60 dBc at the offset frequency of 5 MHzand an ACLR of 66 dBc at an offset frequency of 10 MHzwere achieved. Fig. 21 shows the PAE comparison of a CFF witha DFF amplifier. The DFF achieved a PAE of 10.9%, producinga 2.2% improvement in comparison to the CFF. The total gain ofthe CFF and DFF is approximately 55 dB with gain flatness lessthan 0.2 dB within the operating bandwidth. Table I shows thecomparison between the simulated and measured results. Fromthe measured results, it is clear that the Doherty technique is aneffective method for improving the efficiency of a feedforwardlinear amplifier.

VI. CONCLUSION

A high-power Doherty amplifier using a single push–pullLDMOS FET has been simulated and measured. A peakingpoint at 6-dB backoff has been obtained through optimizationof the peaking compensation line and gate bias on the peakingamplifier. From the measured results, the Doherty amplifierachieved a PAE of 30% at an average W-CDMA output powerof 30 W. The Doherty amplifier embedded in a feedforwardlinearizer achieved an overall efficiency of 10.9% with anACLR linearity of 60 dBc.

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Kyoung-Joon Cho received the B.S. degree ininformation and communication engineering fromAnyang University, Anyang, Korea, in 1998, andthe M.S. and Ph.D. degrees in radio science andengineering from Kwangwoon University, Seoul,Korea, in 2000 and 2004, respectively.

In 2004, he joined the Simon Fraser University,Burnaby, BC, Canada, as Post-Doctoral Fellowwith the School of Engineering Science, wherehe is currently involved with RF integrated circuit(RFIC) and monolithic-microwave integrated-circuit

(MMIC) power-amplifier developments. His research interests are highlyefficient power-amplifier design and linearization techniques.

Jong-Heon Kim (M’95) received the B.S. degree inelectronic communication engineering from Kwang-woon University, Seoul, Korea, in 1984, the M.S. de-gree in electronic engineering from Ruhr University,Bochum, Germany, in 1990, and the Ph.D. degreein electronic engineering from Dortmund University,Dortmund, Germany, in 1994.

Since 1995, he has been a Professor with the De-partment of Radio Science and Engineering, Kwang-woon University. He is also currently a Research As-sociate with Simon Fraser University, Burnaby, BC,

Canada, where he is involved with digital signal processing (DSP) techniques ofpower amplifiers for the wireless industry. His current interests include digitallinearization of power amplifiers and transmitters, smart power amplifiers, andintegrated RF/DSP design.

Shawn P. Stapleton received the B.S., M.S., andPh.D. degrees in engineering from Carleton Univer-sity, Ottawa, ON, Canada, in 1982, 1984, and 1988,respectively.

Since 1988, he has been a Professor with theSchool of Engineering Science, Simon FraserUniversity, Burnaby, BC, Canada. His researchhas focused on integrated RF/DSP applications forwireless communications, GaAs MMIC circuits, andpower-amplifier linearization. Before joining SimonFraser University, he was involved in a wide variety

of projects including optical communications, RF/microwave communicationssystems, and adaptive array antennas. While with Simon Fraser University,he has developed numerous adaptive linearization techniques ranging fromfeedforward active-biasing work-function predistortion to digital baseband pre-distorters. He has developed phase-locked loop (PLL), linearization, amplifier,and communications design software for the wireless industry. He has been aStaff Scientist with Scientific Atlanta (an external partner to Agilent Technolo-gies), founder of Prophesi Technologies, and a consultant on power-amplifierenhancement techniques. He has authored or coauthored numerous technicalpapers on linearization and has given many presentations at various companies.