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primarionTRANSCRIPT
1
6-Sep-06
Digital Today Smart Power Management
Tomorrow
September 2006
Stephen PullenVice President System
EngineeringPrimarion Corporation
6-Sep-06 p. 2
Agenda
o Brief History of transistor development
o Analog PWM controllers
o CMOS Historical perspective
o System Requirements
o Digital PWM controllers
o True Digital Power Management solutions
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6-Sep-06 p. 3
In the Beginning
• 1953 Man created the transistor• 1965 Moore’s law postulated• 1975 100K transistors on a die• 1976 Silicon General introduces the industry's first PWM controller IC, the SG1524,designer, Bob Mammano.• 1976 National Semiconductor introduces the first three-terminal linear regulator designed by Bob Dobkin.• 1979 GM introduced its computer-controlled closed-loop carburetor system using a micro-processor.
6-Sep-06 p. 4
In the Middle
• 1970’s-As of the close of the 70’s, the first “PC” has not been announced.
• 1981- 1st PC is released- Model 5150 by IBM• 1982- SGS introduces the L296, the first monolithic
switching regulator.• 1984- BiMOS- The power transistor was a bipolar
device and the smarts were in CMOS transistors initially developed at Motorola
• 1984- Vicor released 1Mhz full brick with custom analog chip. Design only had about 90 parts total.
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Into the Present• 1990’s- Bi-CMOS becomes a preferred choice of analog PWM
controllers. CMOS is changing PWM internal architecture.• 1992- Linear Technology introduces the first synchronous
switching regulator.• 1998- Semtech release first monolithic multiphase controller• 1999- Volterra announces a mixed signal controller for
creating multiphase circuits• 2001- Primarion releases its first digital multiphase controller• 2005- CMOS One billion transistors on a die
6-Sep-06 p. 6
SG3525 Functionality- 1985
• Current mode and voltage modes• Up to 500Khz operation• 50nsec propagation delays to output• 1.5 amp totem pole drivers• Wide bandwidth amplifier- 10Mhz• Latched logic for double pulse suppression• Pulse by Pulse current limiting• Soft start and max duty cycle control• Under voltage lockout• 1.1mA start up current• Trimmed band gap +/-1 %
State of the ArtAnalog Bandwidth?
5 GHz
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SG3525 Block Diagram
6-Sep-06 p. 8
1990’s functionalitySimilar to 1985
• PWM control- Current and Voltage mode control• Internal reference• OVP, OCP fault conditions• Current sharing• Up to 1 MHz operation• Wide 10MHz bandwidth• Soft Start, Max duty cycle• Power good• Under voltage lockouts• Synchronous timing drives- high current output drivers
CMOS begins tochange inside architecture of the analog control chip
In the 90’s
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Analog Product Exploded
• Analog PWM for power supply applications– Specific chips for varied topologies– Half bridge drivers, high side drivers– Sync FET drivers, synchronous FET timing– Peak and average current mode control– Resonant PWM– Buck- Multiphase, dual phase, single phase– Battery charging applications– Cell phones– Camera, video, and handheld products
6-Sep-06 p. 10
Present Analog Architecture Changed by CMOS
• CMOS circuitry- replaces large portions of the analog design– Comparators for power good, OVP,UV etc– Clocks-– Timing and logic– PWM signal processing
• Analog circuitry- provides interface to the CMOS circuitry– Error Amplifier, compensation, current sense, and voltage
sense are still analog circuits– Analog circuits connect the outside circuitry to the internal
CMOS functions
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SG3525 Block Diagram
CMOSToday
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CMOS Historical Advancements
• CMOS Driven by lithography advances: – 1981 to 1998-1u to .25u– 1999 to 2006- .18u to 45 nm– Maximum die size relatively constant– 100 gates fit inside the diameter of a human blood cell
• Moore’s law strongly in force since 1965.– 1 Transistor: 1 dollar in 1965– 1 Transistor: 1 penny in 1975- 100K per die– 1 Transistor: 1/10,000 penny- 2005-1 billion per die
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• Intel is developing 3D dimensional die stacking • By 2015- Hundreds of cores per processor die.• The cores will support 100’s to 1000’s of
simultaneous execution threads.• Memory to processor connections from 100’s or
1000’s of pins to million to 10 million connections. Bandwidth is still increasing
• All while the cost per gate is decreasing• All the while the speed is increasing
The Future of CMOS
6-Sep-06 p. 14
Where are We Headed“If steel was the raw material for the 20th century, silicon is for the 21st century. And the silicon semiconductor industry—led in large part by Intel’s technology advances—has delivered a dramatic spiral of rapid cost reduction and exponential value creation that is unequalled in history. Because of the cumulative impact of these spiraling increases in capability, silicon—the raw material of the microprocessor—powers today’s economy and the Internet, running everything from digital phones and PCs to stock markets and spacecraft—and enables today’s information-rich, converged, digital world.” Technology@Intel Magazine April 2005
From Moore’s Law to Intel Innovation—Prediction to RealityRadhakrishna Hiremane Technical Marketing Engineer – Intel Corporation
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Process and Price for PWM Controllers
100%0.00065$ 1.00 200,000.18uCMOSFuture
100%0.0013$ 1.30 100,000.25uCMOSPresent
98%0.033$ 1.00 30000.35uBi-CmosPresent
60%0.5$ 2.00 4001uBi-Cmos1990's
0%2$ 2.00 1003u to 7uAnalog1980's
CMOSCent/gateASPGatesSizeProcessYear
6-Sep-06 p. 16
Digital Trends for Power Management
• I2C communication bus definition - ex. PMbus• Transistor cost still going downward• Each CMOS process improvement step can give 2x
real-estate reduction• Functionality constant at approximately half the cost• Future digital power management will take
advantage of low cost high volume CMOS processor roadmaps
• System costs with digital power management will continue downward
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System Power Management Requirements
• System Power management complexity continues to increase-Up to 16 POL modules on system board required in various applications.
• Timing, delays, sequencing, tracking, hot swap functionality • System characterization of processors and ASICS needs simplification• Communication of faults to system• Fault reporting of each power device• Communication with other power devices and load IC• Optimization of power consumption on system boards, dynamic phasing• Reporting of voltage, power, current, temperature parameters to system • Diagnostics- Anticipation of faults, monitoring and correcting parameter drifts • Idle modes- Management of power to meet Green Power requirements• High Transient load environments- smaller windows of deviation• High speed bus communication adaptability
6-Sep-06 p. 18
Analog and Digital Difference?
• Today's PWM controllers:– First process signals in the analog domain and then
process PWM logic in the digital domain.– Process internal information externally by digitizing
signals with another device or add on digital wrappers– More costly system implementation
• True digital controllers:– Convert signals immediately into the digital domain – The digitized signals are placed into registers– All subsequent signal processing is done digitally– Information can be directly communicated to the system– Less costly system implementation
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Digital Power Management
Since all information is digitized:• One can multiply, divide, filter, compensate, compare,
calibrate, store and communicate each piece of information • I2C flexibility built in- PMBus, SST, Future Bus choices easily
adapted• Specific algorithms define total functionality for power device• Asynchronous and non-linear control loop algorithms can be
easily implemented for optimal fast transient response or advance functions
• Digital power management can enable system communication and control of power delivery to the load IC
6-Sep-06 p. 20
True Digital implementation• Provides design Flexibility
– Compensation can be optimized for each rails capacitance and inductance
– All design parameters are programmable– No discrete components for design implementation– Component calibration and drift monitoring
• Provides Personalization for each power stage– Each rail can be uniquely defined for its requirements– One chip can provide multi-faceted design options– Full telemetry of power stage is available to system– Full custom programmability with one standard part
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Typical Block DiagramDigital Power Management controller
PID/PWMController
Current Sense
TempSense
Reference &
Oscillator
SMBus Non-Volatile Memory(NVM)
Fault Handler
State Machine
IOUT/ISH
SMB_AL_N
SCLKSDATA
FSET
FAULT1
ADC
VSET
PWM
SADDR
VCC
PWRGD
MUX
OUTEN
TEMPSEN
ISENP
VSENNVSENP
ISENN
V12SEN
Voltage Sense
SYNC_IN
VTRIM
IMAXSET
DAC
FAULT2
SYNC_OUT
ISH_GND
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Basic Buck Circuit Block
VOUT
RTN
PMBus I/F
PowerManagement
I/F
FaultOutputs
+5V
PX7510
VCC
GND
PWM
ISENN
ISENP
SDATA
SCLK
SMB_ALRT_N
PWRGD
OUTEN
SYNC_IN
SYNC_OUT
VSENP
VSENN
TEMPSEN
ISH_GND
FAULT1
FAULT2
VSET
FSET
VTRIM
IMAXSET
V12SEN
MultiphaseOperation
+5V to +12V
LOAD
IOUT/ISHI-share
SADDR
RSENSE
RBCB
D1RCM
R1
R2
4.7µF
8
7
5
6
1
2
4
3
UGATE
BOOT
PWM
GND
PHASE
EN
VCC
LGATE
Very Few Parts - Driver, FETS, inductorcapacitors, snubbers and current sense:
enable high density power solutions
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Multiphase VRM Circuit
Digital provides key Solutions with Low
Part Content
6-Sep-06 p. 24
Digital Manager
Analog Systems TodayAnalog Systems with Digital ManagerDigital Systems TodayDigital Systems Tomorrow
System Implementation
SystemSupervisor
POL1.8V
POL5.0V
POL1.5V
POL1.5V
POL1.8V Multiphase VRD
12 volt Bus
MemoryChip 1 Chip 2 Memory Memory Memory Processor
SystemBus
SystemManagement
POL3.3V
Local Control Bus (i.e. PMBus)
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6-Sep-06 p. 25
Summary• Analog power management has been central to power
management growth in the past but must adapt to the future.
• Digital power management solutions will continue to take advantage of the CMOS lithography advancements using low cost, high volume processes.
• Digital power management has the scalability and flexibility to innovate future system solutions
Smart digital power management will enable lower cost system implementation with intelligence that
will grow with the increased complexity of power delivery